watchdog: w83627hf: Enable watchdog only once

[~andy/linux] / drivers / watchdog / w83627hf_wdt.c

diff --git a/drivers/watchdog/w83627hf_wdt.c b/drivers/watchdog/w83627hf_wdt.c
index ab5ec6d84b16d00d852d2d4f97e68a2a6343c2f0..910d437368219c8278152e985693c503f144092c 100644 (file)
--- a/drivers/watchdog/w83627hf_wdt.c
+++ b/drivers/watchdog/w83627hf_wdt.c
@@ -72,28 +72,10 @@ MODULE_PARM_DESC(nowayout,
 
 static void w83627hf_select_wd_register(void)
 {
-       unsigned char c;
        outb_p(0x87, WDT_EFER); /* Enter extended function mode */
        outb_p(0x87, WDT_EFER); /* Again according to manual */
-
-       outb(0x20, WDT_EFER);   /* check chip version   */
-       c = inb(WDT_EFDR);
-       if (c == 0x82) {        /* W83627THF            */
-               outb_p(0x2b, WDT_EFER); /* select GPIO3 */
-               c = ((inb_p(WDT_EFDR) & 0xf7) | 0x04); /* select WDT0 */
-               outb_p(0x2b, WDT_EFER);
-               outb_p(c, WDT_EFDR);    /* set GPIO3 to WDT0 */
-       } else if (c == 0x88 || c == 0xa0) {    /* W83627EHF / W83627DHG */
-               outb_p(0x2d, WDT_EFER); /* select GPIO5 */
-               c = inb_p(WDT_EFDR) & ~0x01; /* PIN77 -> WDT0# */
-               outb_p(0x2d, WDT_EFER);
-               outb_p(c, WDT_EFDR); /* set GPIO5 to WDT0 */
-       }
-
        outb_p(0x07, WDT_EFER); /* point to logical device number reg */
        outb_p(0x08, WDT_EFDR); /* select logical device 8 (GPIO2) */
-       outb_p(0x30, WDT_EFER); /* select CR30 */
-       outb_p(0x01, WDT_EFDR); /* set bit 0 to activate GPIO2 */
 }
 
 static void w83627hf_unselect_wd_register(void)
@@ -110,6 +92,23 @@ static void w83627hf_init(struct watchdog_device *wdog)
 
        w83627hf_select_wd_register();
 
+       outb(0x20, WDT_EFER);   /* check chip version   */
+       t = inb(WDT_EFDR);
+       if (t == 0x82) {        /* W83627THF            */
+               outb_p(0x2b, WDT_EFER); /* select GPIO3 */
+               t = ((inb_p(WDT_EFDR) & 0xf7) | 0x04); /* select WDT0 */
+               outb_p(0x2b, WDT_EFER);
+               outb_p(t, WDT_EFDR);    /* set GPIO3 to WDT0 */
+       } else if (t == 0x88 || t == 0xa0) {    /* W83627EHF / W83627DHG */
+               outb_p(0x2d, WDT_EFER); /* select GPIO5 */
+               t = inb_p(WDT_EFDR) & ~0x01; /* PIN77 -> WDT0# */
+               outb_p(0x2d, WDT_EFER);
+               outb_p(t, WDT_EFDR); /* set GPIO5 to WDT0 */
+       }
+
+       outb_p(0x30, WDT_EFER); /* select CR30 */
+       outb_p(0x01, WDT_EFDR); /* set bit 0 to activate GPIO2 */
+
        outb_p(0xF6, WDT_EFER); /* Select CRF6 */
        t = inb_p(WDT_EFDR);      /* read CRF6 */
        if (t != 0) {