]> Pileus Git - ~andy/linux/blobdiff - drivers/video/tgafb.c
Merge branch 'for_paulus' of master.kernel.org:/pub/scm/linux/kernel/git/galak/powerpc
[~andy/linux] / drivers / video / tgafb.c
index 0a00a6cc7c2b9cf4d9463ed6e1a9df22d2b5464b..b604859b4ddbcd3ed2b4619284b7daa3b562d932 100644 (file)
@@ -43,8 +43,9 @@ static void tgafb_imageblit(struct fb_info *, const struct fb_image *);
 static void tgafb_fillrect(struct fb_info *, const struct fb_fillrect *);
 static void tgafb_copyarea(struct fb_info *, const struct fb_copyarea *);
 
-static int tgafb_pci_register(struct pci_dev *, const struct pci_device_id *);
-static void tgafb_pci_unregister(struct pci_dev *);
+static int __devinit tgafb_pci_register(struct pci_dev *,
+                                       const struct pci_device_id *);
+static void __devexit tgafb_pci_unregister(struct pci_dev *);
 
 static const char *mode_option = "640x480@60";
 
@@ -70,9 +71,10 @@ static struct fb_ops tgafb_ops = {
  */
 
 static struct pci_device_id const tgafb_pci_table[] = {
-       { PCI_VENDOR_ID_DEC, PCI_DEVICE_ID_DEC_TGA, PCI_ANY_ID, PCI_ANY_ID,
-         0, 0, 0 }
+       { PCI_DEVICE(PCI_VENDOR_ID_DEC, PCI_DEVICE_ID_DEC_TGA) },
+       { }
 };
+MODULE_DEVICE_TABLE(pci, tgafb_pci_table);
 
 static struct pci_driver tgafb_driver = {
        .name                   = "tgafb",
@@ -99,6 +101,12 @@ tgafb_check_var(struct fb_var_screeninfo *var, struct fb_info *info)
                if (var->bits_per_pixel != 32)
                        return -EINVAL;
        }
+       var->red.length = var->green.length = var->blue.length = 8;
+       if (var->bits_per_pixel == 32) {
+               var->red.offset = 16;
+               var->green.offset = 8;
+               var->blue.offset = 0;
+       }
 
        if (var->xres_virtual != var->xres || var->yres_virtual != var->yres)
                return -EINVAL;
@@ -137,10 +145,10 @@ tgafb_set_par(struct fb_info *info)
                0x00000303
        };
        static unsigned int const mode_presets[4] = {
-               0x00002000,
-               0x00002300,
+               0x00000000,
+               0x00000300,
                0xffffffff,
-               0x00002300
+               0x00000300
        };
        static unsigned int const base_addr_presets[4] = {
                0x00000000,
@@ -152,7 +160,7 @@ tgafb_set_par(struct fb_info *info)
        struct tga_par *par = (struct tga_par *) info->par;
        u32 htimings, vtimings, pll_freq;
        u8 tga_type;
-       int i, j;
+       int i;
 
        /* Encode video timings.  */
        htimings = (((info->var.xres/4) & TGA_HORIZ_ACT_LSB)
@@ -190,7 +198,9 @@ tgafb_set_par(struct fb_info *info)
        while (TGA_READ_REG(par, TGA_CMD_STAT_REG) & 1) /* wait for not busy */
                continue;
        mb();
-       TGA_WRITE_REG(par, deep_presets[tga_type], TGA_DEEP_REG);
+       TGA_WRITE_REG(par, deep_presets[tga_type] |
+                          (par->sync_on_green ? 0x0 : 0x00010000),
+                     TGA_DEEP_REG);
        while (TGA_READ_REG(par, TGA_CMD_STAT_REG) & 1) /* wait for not busy */
                continue;
        mb();
@@ -227,8 +237,10 @@ tgafb_set_par(struct fb_info *info)
                BT485_WRITE(par, 0x00, BT485_ADDR_PAL_WRITE);
                TGA_WRITE_REG(par, BT485_DATA_PAL, TGA_RAMDAC_SETUP_REG);
 
+#ifdef CONFIG_HW_CONSOLE
                for (i = 0; i < 16; i++) {
-                       j = color_table[i];
+                       int j = color_table[i];
+
                        TGA_WRITE_REG(par, default_red[j]|(BT485_DATA_PAL<<8),
                                      TGA_RAMDAC_REG);
                        TGA_WRITE_REG(par, default_grn[j]|(BT485_DATA_PAL<<8),
@@ -236,24 +248,27 @@ tgafb_set_par(struct fb_info *info)
                        TGA_WRITE_REG(par, default_blu[j]|(BT485_DATA_PAL<<8),
                                      TGA_RAMDAC_REG);
                }
-               for (i = 0; i < 240*3; i += 4) {
-                       TGA_WRITE_REG(par, 0x55|(BT485_DATA_PAL<<8),
+               for (i = 0; i < 240 * 3; i += 4) {
+#else
+               for (i = 0; i < 256 * 3; i += 4) {
+#endif
+                       TGA_WRITE_REG(par, 0x55 | (BT485_DATA_PAL << 8),
                                      TGA_RAMDAC_REG);
-                       TGA_WRITE_REG(par, 0x00|(BT485_DATA_PAL<<8),
+                       TGA_WRITE_REG(par, 0x00 | (BT485_DATA_PAL << 8),
                                      TGA_RAMDAC_REG);
-                       TGA_WRITE_REG(par, 0x00|(BT485_DATA_PAL<<8),
+                       TGA_WRITE_REG(par, 0x00 | (BT485_DATA_PAL << 8),
                                      TGA_RAMDAC_REG);
-                       TGA_WRITE_REG(par, 0x00|(BT485_DATA_PAL<<8),
+                       TGA_WRITE_REG(par, 0x00 | (BT485_DATA_PAL << 8),
                                      TGA_RAMDAC_REG);
                }
 
        } else { /* 24-plane or 24plusZ */
 
-               /* Init BT463 registers.  */
+               /* Init BT463 RAMDAC registers.  */
                BT463_WRITE(par, BT463_REG_ACC, BT463_CMD_REG_0, 0x40);
                BT463_WRITE(par, BT463_REG_ACC, BT463_CMD_REG_1, 0x08);
                BT463_WRITE(par, BT463_REG_ACC, BT463_CMD_REG_2,
-                           (par->sync_on_green ? 0x80 : 0x40));
+                           (par->sync_on_green ? 0xc0 : 0x40));
 
                BT463_WRITE(par, BT463_REG_ACC, BT463_READ_MASK_0, 0xff);
                BT463_WRITE(par, BT463_REG_ACC, BT463_READ_MASK_1, 0xff);
@@ -267,26 +282,24 @@ tgafb_set_par(struct fb_info *info)
 
                /* Fill the palette.  */
                BT463_LOAD_ADDR(par, 0x0000);
-               TGA_WRITE_REG(par, BT463_PALETTE<<2, TGA_RAMDAC_REG);
+               TGA_WRITE_REG(par, BT463_PALETTE << 2, TGA_RAMDAC_SETUP_REG);
 
+#ifdef CONFIG_HW_CONSOLE
                for (i = 0; i < 16; i++) {
-                       j = color_table[i];
-                       TGA_WRITE_REG(par, default_red[j]|(BT463_PALETTE<<10),
-                                     TGA_RAMDAC_REG);
-                       TGA_WRITE_REG(par, default_grn[j]|(BT463_PALETTE<<10),
-                                     TGA_RAMDAC_REG);
-                       TGA_WRITE_REG(par, default_blu[j]|(BT463_PALETTE<<10),
-                                     TGA_RAMDAC_REG);
+                       int j = color_table[i];
+
+                       TGA_WRITE_REG(par, default_red[j], TGA_RAMDAC_REG);
+                       TGA_WRITE_REG(par, default_grn[j], TGA_RAMDAC_REG);
+                       TGA_WRITE_REG(par, default_blu[j], TGA_RAMDAC_REG);
                }
-               for (i = 0; i < 512*3; i += 4) {
-                       TGA_WRITE_REG(par, 0x55|(BT463_PALETTE<<10),
-                                     TGA_RAMDAC_REG);
-                       TGA_WRITE_REG(par, 0x00|(BT463_PALETTE<<10),
-                                     TGA_RAMDAC_REG);
-                       TGA_WRITE_REG(par, 0x00|(BT463_PALETTE<<10),
-                                     TGA_RAMDAC_REG);
-                       TGA_WRITE_REG(par, 0x00|(BT463_PALETTE<<10),
-                                     TGA_RAMDAC_REG);
+               for (i = 0; i < 512 * 3; i += 4) {
+#else
+               for (i = 0; i < 528 * 3; i += 4) {
+#endif
+                       TGA_WRITE_REG(par, 0x55, TGA_RAMDAC_REG);
+                       TGA_WRITE_REG(par, 0x00, TGA_RAMDAC_REG);
+                       TGA_WRITE_REG(par, 0x00, TGA_RAMDAC_REG);
+                       TGA_WRITE_REG(par, 0x00, TGA_RAMDAC_REG);
                }
 
                /* Fill window type table after start of vertical retrace.  */
@@ -299,15 +312,12 @@ tgafb_set_par(struct fb_info *info)
                TGA_WRITE_REG(par, 0x01, TGA_INTR_STAT_REG);
 
                BT463_LOAD_ADDR(par, BT463_WINDOW_TYPE_BASE);
-               TGA_WRITE_REG(par, BT463_REG_ACC<<2, TGA_RAMDAC_SETUP_REG);
+               TGA_WRITE_REG(par, BT463_REG_ACC << 2, TGA_RAMDAC_SETUP_REG);
 
                for (i = 0; i < 16; i++) {
-                       TGA_WRITE_REG(par, 0x00|(BT463_REG_ACC<<10),
-                                     TGA_RAMDAC_REG);
-                       TGA_WRITE_REG(par, 0x01|(BT463_REG_ACC<<10),
-                                     TGA_RAMDAC_REG);
-                       TGA_WRITE_REG(par, 0x80|(BT463_REG_ACC<<10),
-                                     TGA_RAMDAC_REG);
+                       TGA_WRITE_REG(par, 0x00, TGA_RAMDAC_REG);
+                       TGA_WRITE_REG(par, 0x01, TGA_RAMDAC_REG);
+                       TGA_WRITE_REG(par, 0x00, TGA_RAMDAC_REG);
                }
 
        }
@@ -435,9 +445,16 @@ tgafb_setcolreg(unsigned regno, unsigned red, unsigned green, unsigned blue,
                TGA_WRITE_REG(par, red|(BT485_DATA_PAL<<8),TGA_RAMDAC_REG);
                TGA_WRITE_REG(par, green|(BT485_DATA_PAL<<8),TGA_RAMDAC_REG);
                TGA_WRITE_REG(par, blue|(BT485_DATA_PAL<<8),TGA_RAMDAC_REG);
-       } else if (regno < 16) {
-               u32 value = (red << 16) | (green << 8) | blue;
-               ((u32 *)info->pseudo_palette)[regno] = value;
+       } else {
+               if (regno < 16) {
+                       u32 value = (regno << 16) | (regno << 8) | regno;
+                       ((u32 *)info->pseudo_palette)[regno] = value;
+               }
+               BT463_LOAD_ADDR(par, regno);
+               TGA_WRITE_REG(par, BT463_PALETTE << 2, TGA_RAMDAC_SETUP_REG);
+               TGA_WRITE_REG(par, red, TGA_RAMDAC_REG);
+               TGA_WRITE_REG(par, green, TGA_RAMDAC_REG);
+               TGA_WRITE_REG(par, blue, TGA_RAMDAC_REG);
        }
 
        return 0;
@@ -885,7 +902,7 @@ copyarea_line_8bpp(struct fb_info *info, u32 dy, u32 sy,
 
        n64 = (height * width) / 64;
 
-       if (dy < sy) {
+       if (sy < dy) {
                spos = (sy + height) * width;
                dpos = (dy + height) * width;
 
@@ -933,7 +950,7 @@ copyarea_line_32bpp(struct fb_info *info, u32 dy, u32 sy,
 
        n16 = (height * width) / 16;
 
-       if (dy < sy) {
+       if (sy < dy) {
                src = tga_fb + (sy + height) * width * 4;
                dst = tga_fb + (dy + height) * width * 4;
 
@@ -1317,7 +1334,7 @@ tgafb_init_fix(struct fb_info *info)
        info->fix.type_aux = 0;
        info->fix.visual = (tga_type == TGA_TYPE_8PLANE
                            ? FB_VISUAL_PSEUDOCOLOR
-                           : FB_VISUAL_TRUECOLOR);
+                           : FB_VISUAL_DIRECTCOLOR);
 
        info->fix.line_length = par->xres * (par->bits_per_pixel >> 3);
        info->fix.smem_start = (size_t) par->tga_fb_base;
@@ -1441,7 +1458,7 @@ tgafb_pci_register(struct pci_dev *pdev, const struct pci_device_id *ent)
        return ret;
 }
 
-static void __exit
+static void __devexit
 tgafb_pci_unregister(struct pci_dev *pdev)
 {
        struct fb_info *info = pci_get_drvdata(pdev);
@@ -1457,16 +1474,14 @@ tgafb_pci_unregister(struct pci_dev *pdev)
        framebuffer_release(info);
 }
 
-#ifdef MODULE
-static void __exit
+static void __devexit
 tgafb_exit(void)
 {
        pci_unregister_driver(&tgafb_driver);
 }
-#endif /* MODULE */
 
 #ifndef MODULE
-int __init
+static int __devinit
 tgafb_setup(char *arg)
 {
        char *this_opt;
@@ -1488,7 +1503,7 @@ tgafb_setup(char *arg)
 }
 #endif /* !MODULE */
 
-int __init
+static int __devinit
 tgafb_init(void)
 {
 #ifndef MODULE
@@ -1506,10 +1521,7 @@ tgafb_init(void)
  */
 
 module_init(tgafb_init);
-
-#ifdef MODULE
 module_exit(tgafb_exit);
-#endif
 
 MODULE_DESCRIPTION("framebuffer driver for TGA chipset");
 MODULE_LICENSE("GPL");