]> Pileus Git - ~andy/linux/blobdiff - drivers/tty/serial/pch_uart.c
Merge branch 'mnt_devname' of git://git.kernel.org/pub/scm/linux/kernel/git/viro...
[~andy/linux] / drivers / tty / serial / pch_uart.c
index 189886122516694b02f45608e705b77f62a29ca9..a9ad7f33526d0553605a41cbf661e85b82d7b7c0 100644 (file)
@@ -21,6 +21,7 @@
 #include <linux/serial_core.h>
 #include <linux/interrupt.h>
 #include <linux/io.h>
+#include <linux/dmi.h>
 
 #include <linux/dmaengine.h>
 #include <linux/pch_dma.h>
@@ -218,6 +219,7 @@ struct eg20t_port {
        struct pch_uart_buffer rxbuf;
        unsigned int dmsr;
        unsigned int fcr;
+       unsigned int mcr;
        unsigned int use_dma;
        unsigned int use_dma_flag;
        struct dma_async_tx_descriptor  *desc_tx;
@@ -234,6 +236,36 @@ struct eg20t_port {
        dma_addr_t                      rx_buf_dma;
 };
 
+/**
+ * struct pch_uart_driver_data - private data structure for UART-DMA
+ * @port_type:                 The number of DMA channel
+ * @line_no:                   UART port line number (0, 1, 2...)
+ */
+struct pch_uart_driver_data {
+       int port_type;
+       int line_no;
+};
+
+enum pch_uart_num_t {
+       pch_et20t_uart0 = 0,
+       pch_et20t_uart1,
+       pch_et20t_uart2,
+       pch_et20t_uart3,
+       pch_ml7213_uart0,
+       pch_ml7213_uart1,
+       pch_ml7213_uart2,
+};
+
+static struct pch_uart_driver_data drv_dat[] = {
+       [pch_et20t_uart0] = {PCH_UART_8LINE, 0},
+       [pch_et20t_uart1] = {PCH_UART_2LINE, 1},
+       [pch_et20t_uart2] = {PCH_UART_2LINE, 2},
+       [pch_et20t_uart3] = {PCH_UART_2LINE, 3},
+       [pch_ml7213_uart0] = {PCH_UART_8LINE, 0},
+       [pch_ml7213_uart1] = {PCH_UART_2LINE, 1},
+       [pch_ml7213_uart2] = {PCH_UART_2LINE, 2},
+};
+
 static unsigned int default_baud = 9600;
 static const int trigger_level_256[4] = { 1, 64, 128, 224 };
 static const int trigger_level_64[4] = { 1, 16, 32, 56 };
@@ -567,7 +599,8 @@ static void pch_request_dma(struct uart_port *port)
        /* Set Tx DMA */
        param = &priv->param_tx;
        param->dma_dev = &dma_dev->dev;
-       param->chan_id = priv->port.line;
+       param->chan_id = priv->port.line * 2; /* Tx = 0, 2, 4, ... */
+
        param->tx_reg = port->mapbase + UART_TX;
        chan = dma_request_channel(mask, filter, param);
        if (!chan) {
@@ -580,7 +613,8 @@ static void pch_request_dma(struct uart_port *port)
        /* Set Rx DMA */
        param = &priv->param_rx;
        param->dma_dev = &dma_dev->dev;
-       param->chan_id = priv->port.line + 1; /* Rx = Tx + 1 */
+       param->chan_id = priv->port.line * 2 + 1; /* Rx = Tx + 1 */
+
        param->rx_reg = port->mapbase + UART_RX;
        chan = dma_request_channel(mask, filter, param);
        if (!chan) {
@@ -635,8 +669,7 @@ static void pch_dma_tx_complete(void *arg)
        priv->tx_dma_use = 0;
        priv->nent = 0;
        kfree(priv->sg_tx_p);
-       if (uart_circ_chars_pending(xmit))
-               pch_uart_hal_enable_interrupt(priv, PCH_UART_HAL_TX_INT);
+       pch_uart_hal_enable_interrupt(priv, PCH_UART_HAL_TX_INT);
 }
 
 static int pop_tx(struct eg20t_port *priv, int size)
@@ -792,6 +825,14 @@ static unsigned int dma_handle_tx(struct eg20t_port *priv)
                return 0;
        }
 
+       if (priv->tx_dma_use) {
+               dev_dbg(priv->port.dev, "%s:Tx is not completed. (%lu)\n",
+                       __func__, jiffies);
+               pch_uart_hal_disable_interrupt(priv, PCH_UART_HAL_TX_INT);
+               priv->tx_empty = 1;
+               return 0;
+       }
+
        fifo_size = max(priv->fifo_size, 1);
        tx_empty = 1;
        if (pop_tx_x(priv, xmit->buf)) {
@@ -1007,7 +1048,6 @@ static unsigned int pch_uart_get_mctrl(struct uart_port *port)
 static void pch_uart_set_mctrl(struct uart_port *port, unsigned int mctrl)
 {
        u32 mcr = 0;
-       unsigned int dat;
        struct eg20t_port *priv = container_of(port, struct eg20t_port, port);
 
        if (mctrl & TIOCM_DTR)
@@ -1017,11 +1057,11 @@ static void pch_uart_set_mctrl(struct uart_port *port, unsigned int mctrl)
        if (mctrl & TIOCM_LOOP)
                mcr |= UART_MCR_LOOP;
 
-       if (mctrl) {
-               dat = pch_uart_get_mctrl(port);
-               dat |= mcr;
-               iowrite8(dat, priv->membase + UART_MCR);
-       }
+       if (priv->mcr & UART_MCR_AFE)
+               mcr |= UART_MCR_AFE;
+
+       if (mctrl)
+               iowrite8(mcr, priv->membase + UART_MCR);
 }
 
 static void pch_uart_stop_tx(struct uart_port *port)
@@ -1215,6 +1255,13 @@ static void pch_uart_set_termios(struct uart_port *port,
        } else {
                parity = PCH_UART_HAL_PARITY_NONE;
        }
+
+       /* Only UART0 has auto hardware flow function */
+       if ((termios->c_cflag & CRTSCTS) && (priv->fifo_size == 256))
+               priv->mcr |= UART_MCR_AFE;
+       else
+               priv->mcr &= ~UART_MCR_AFE;
+
        termios->c_cflag &= ~CMSPAR; /* Mark/Space parity is not supported */
 
        baud = uart_get_baud_rate(port, termios, old, 0, port->uartclk / 16);
@@ -1344,8 +1391,11 @@ static struct eg20t_port *pch_uart_init_port(struct pci_dev *pdev,
        unsigned int mapbase;
        unsigned char *rxbuf;
        int fifosize, base_baud;
-       static int num;
-       int port_type = id->driver_data;
+       int port_type;
+       struct pch_uart_driver_data *board;
+
+       board = &drv_dat[id->driver_data];
+       port_type = board->port_type;
 
        priv = kzalloc(sizeof(struct eg20t_port), GFP_KERNEL);
        if (priv == NULL)
@@ -1355,14 +1405,18 @@ static struct eg20t_port *pch_uart_init_port(struct pci_dev *pdev,
        if (!rxbuf)
                goto init_port_free_txbuf;
 
+       base_baud = 1843200; /* 1.8432MHz */
+
+       /* quirk for CM-iTC board */
+       if (strstr(dmi_get_system_info(DMI_BOARD_NAME), "CM-iTC"))
+               base_baud = 192000000; /* 192.0MHz */
+
        switch (port_type) {
        case PORT_UNKNOWN:
                fifosize = 256; /* EG20T/ML7213: UART0 */
-               base_baud = 1843200; /* 1.8432MHz */
                break;
        case PORT_8250:
                fifosize = 64; /* EG20T:UART1~3  ML7213: UART1~2*/
-               base_baud = 1843200; /* 1.8432MHz */
                break;
        default:
                dev_err(&pdev->dev, "Invalid Port Type(=%d)\n", port_type);
@@ -1390,7 +1444,7 @@ static struct eg20t_port *pch_uart_init_port(struct pci_dev *pdev,
        priv->port.ops = &pch_uart_ops;
        priv->port.flags = UPF_BOOT_AUTOCONF;
        priv->port.fifosize = fifosize;
-       priv->port.line = num++;
+       priv->port.line = board->line_no;
        priv->trigger = PCH_UART_HAL_TRIGGER_M;
 
        spin_lock_init(&priv->port.lock);
@@ -1468,19 +1522,19 @@ static int pch_uart_pci_resume(struct pci_dev *pdev)
 
 static DEFINE_PCI_DEVICE_TABLE(pch_uart_pci_id) = {
        {PCI_DEVICE(PCI_VENDOR_ID_INTEL, 0x8811),
-        .driver_data = PCH_UART_8LINE},
+        .driver_data = pch_et20t_uart0},
        {PCI_DEVICE(PCI_VENDOR_ID_INTEL, 0x8812),
-        .driver_data = PCH_UART_2LINE},
+        .driver_data = pch_et20t_uart1},
        {PCI_DEVICE(PCI_VENDOR_ID_INTEL, 0x8813),
-        .driver_data = PCH_UART_2LINE},
+        .driver_data = pch_et20t_uart2},
        {PCI_DEVICE(PCI_VENDOR_ID_INTEL, 0x8814),
-        .driver_data = PCH_UART_2LINE},
+        .driver_data = pch_et20t_uart3},
        {PCI_DEVICE(PCI_VENDOR_ID_ROHM, 0x8027),
-        .driver_data = PCH_UART_8LINE},
+        .driver_data = pch_ml7213_uart0},
        {PCI_DEVICE(PCI_VENDOR_ID_ROHM, 0x8028),
-        .driver_data = PCH_UART_2LINE},
+        .driver_data = pch_ml7213_uart1},
        {PCI_DEVICE(PCI_VENDOR_ID_ROHM, 0x8029),
-        .driver_data = PCH_UART_2LINE},
+        .driver_data = pch_ml7213_uart2},
        {0,},
 };