Merge git://git.kernel.org/pub/scm/linux/kernel/git/cmetcalf/linux-tile

[~andy/linux] / drivers / ssb / driver_pcicore.c

diff --git a/drivers/ssb/driver_pcicore.c b/drivers/ssb/driver_pcicore.c
index 32a9b61f008dc75d6f949b65c85a35eeec12596a..82feb348c8bbf3762195aaf2cf07668792f72721 100644 (file)
--- a/drivers/ssb/driver_pcicore.c
+++ b/drivers/ssb/driver_pcicore.c
@@ -21,8 +21,6 @@ static u16 ssb_pcie_mdio_read(struct ssb_pcicore *pc, u8 device, u8 address);
 static void ssb_pcie_mdio_write(struct ssb_pcicore *pc, u8 device,
                                u8 address, u16 data);
 
-static void ssb_commit_settings(struct ssb_bus *bus);
-
 static inline
 u32 pcicore_read32(struct ssb_pcicore *pc, u16 offset)
 {
@@ -414,6 +412,16 @@ static int pcicore_is_in_hostmode(struct ssb_pcicore *pc)
  * Workarounds.
  **************************************************/
 
+static void ssb_pcicore_fix_sprom_core_index(struct ssb_pcicore *pc)
+{
+       u16 tmp = pcicore_read16(pc, SSB_PCICORE_SPROM(0));
+       if (((tmp & 0xF000) >> 12) != pc->dev->core_index) {
+               tmp &= ~0xF000;
+               tmp |= (pc->dev->core_index << 12);
+               pcicore_write16(pc, SSB_PCICORE_SPROM(0), tmp);
+       }
+}
+
 static u8 ssb_pcicore_polarity_workaround(struct ssb_pcicore *pc)
 {
        return (ssb_pcie_read(pc, 0x204) & 0x10) ? 0xC0 : 0x80;
@@ -521,6 +529,8 @@ void ssb_pcicore_init(struct ssb_pcicore *pc)
        if (!ssb_device_is_enabled(dev))
                ssb_device_enable(dev, 0);
 
+       ssb_pcicore_fix_sprom_core_index(pc);
+
 #ifdef CONFIG_SSB_PCICORE_HOSTMODE
        pc->hostmode = pcicore_is_in_hostmode(pc);
        if (pc->hostmode)
@@ -647,30 +657,6 @@ static void ssb_pcie_mdio_write(struct ssb_pcicore *pc, u8 device,
        pcicore_write32(pc, mdio_control, 0);
 }
 
-static void ssb_broadcast_value(struct ssb_device *dev,
-                               u32 address, u32 data)
-{
-       /* This is used for both, PCI and ChipCommon core, so be careful. */
-       BUILD_BUG_ON(SSB_PCICORE_BCAST_ADDR != SSB_CHIPCO_BCAST_ADDR);
-       BUILD_BUG_ON(SSB_PCICORE_BCAST_DATA != SSB_CHIPCO_BCAST_DATA);
-
-       ssb_write32(dev, SSB_PCICORE_BCAST_ADDR, address);
-       ssb_read32(dev, SSB_PCICORE_BCAST_ADDR); /* flush */
-       ssb_write32(dev, SSB_PCICORE_BCAST_DATA, data);
-       ssb_read32(dev, SSB_PCICORE_BCAST_DATA); /* flush */
-}
-
-static void ssb_commit_settings(struct ssb_bus *bus)
-{
-       struct ssb_device *dev;
-
-       dev = bus->chipco.dev ? bus->chipco.dev : bus->pcicore.dev;
-       if (WARN_ON(!dev))
-               return;
-       /* This forces an update of the cached registers. */
-       ssb_broadcast_value(dev, 0xFD8, 0);
-}
-
 int ssb_pcicore_dev_irqvecs_enable(struct ssb_pcicore *pc,
                                   struct ssb_device *dev)
 {