drivers/rapidio/devices/tsi721.c: fix error return code

[~andy/linux] / drivers / rapidio / devices / tsi721.c

diff --git a/drivers/rapidio/devices/tsi721.c b/drivers/rapidio/devices/tsi721.c
index 5d44252b7342f3d72dd5060770f2b42ef3bb2e8f..78dff6f407367a21eed9495b523ee4ca7e03cfc3 100644 (file)
--- a/drivers/rapidio/devices/tsi721.c
+++ b/drivers/rapidio/devices/tsi721.c
@@ -2165,7 +2165,8 @@ static int __devinit tsi721_setup_mport(struct tsi721_device *priv)
        rio_init_dbell_res(&mport->riores[RIO_DOORBELL_RESOURCE], 0, 0xffff);
        rio_init_mbox_res(&mport->riores[RIO_INB_MBOX_RESOURCE], 0, 3);
        rio_init_mbox_res(&mport->riores[RIO_OUTB_MBOX_RESOURCE], 0, 3);
-       strcpy(mport->name, "Tsi721 mport");
+       snprintf(mport->name, RIO_MAX_MPORT_NAME, "%s(%s)",
+                dev_driver_string(&pdev->dev), dev_name(&pdev->dev));
 
        /* Hook up interrupt handler */
 
@@ -2219,9 +2220,7 @@ static int __devinit tsi721_probe(struct pci_dev *pdev,
                                  const struct pci_device_id *id)
 {
        struct tsi721_device *priv;
-       int cap;
        int err;
-       u32 regval;
 
        priv = kzalloc(sizeof(struct tsi721_device), GFP_KERNEL);
        if (priv == NULL) {
@@ -2317,7 +2316,8 @@ static int __devinit tsi721_probe(struct pci_dev *pdev,
 
        /* Configure DMA attributes. */
        if (pci_set_dma_mask(pdev, DMA_BIT_MASK(64))) {
-               if (pci_set_dma_mask(pdev, DMA_BIT_MASK(32))) {
+               err = pci_set_dma_mask(pdev, DMA_BIT_MASK(32));
+               if (err) {
                        dev_info(&pdev->dev, "Unable to set DMA mask\n");
                        goto err_unmap_bars;
                }
@@ -2330,20 +2330,16 @@ static int __devinit tsi721_probe(struct pci_dev *pdev,
                        dev_info(&pdev->dev, "Unable to set consistent DMA mask\n");
        }
 
-       cap = pci_pcie_cap(pdev);
-       BUG_ON(cap == 0);
+       BUG_ON(!pci_is_pcie(pdev));
 
        /* Clear "no snoop" and "relaxed ordering" bits, use default MRRS. */
-       pci_read_config_dword(pdev, cap + PCI_EXP_DEVCTL, &regval);
-       regval &= ~(PCI_EXP_DEVCTL_READRQ | PCI_EXP_DEVCTL_RELAX_EN |
-                   PCI_EXP_DEVCTL_NOSNOOP_EN);
-       regval |= 0x2 << MAX_READ_REQUEST_SZ_SHIFT;
-       pci_write_config_dword(pdev, cap + PCI_EXP_DEVCTL, regval);
+       pcie_capability_clear_and_set_word(pdev, PCI_EXP_DEVCTL,
+               PCI_EXP_DEVCTL_READRQ | PCI_EXP_DEVCTL_RELAX_EN |
+               PCI_EXP_DEVCTL_NOSNOOP_EN,
+               0x2 << MAX_READ_REQUEST_SZ_SHIFT);
 
        /* Adjust PCIe completion timeout. */
-       pci_read_config_dword(pdev, cap + PCI_EXP_DEVCTL2, &regval);
-       regval &= ~(0x0f);
-       pci_write_config_dword(pdev, cap + PCI_EXP_DEVCTL2, regval | 0x2);
+       pcie_capability_clear_and_set_word(pdev, PCI_EXP_DEVCTL2, 0xf, 0x2);
 
        /*
         * FIXUP: correct offsets of MSI-X tables in the MSI-X Capability Block