PCI: quirk amd_8131_mmrbc: Omit reading pci revision ID

[~andy/linux] / drivers / pci / pci.c

diff --git a/drivers/pci/pci.c b/drivers/pci/pci.c
index 1bb879959a20998137728259e0a43ac09d42df8c..19a64a36ecab6449c074d6797f296b55c18c8aba 100644 (file)
--- a/drivers/pci/pci.c
+++ b/drivers/pci/pci.c
@@ -17,6 +17,7 @@
 #include <linux/module.h>
 #include <linux/spinlock.h>
 #include <linux/string.h>
+#include <linux/log2.h>
 #include <asm/dma.h>   /* isa_dma_bridge_buggy */
 #include "pci.h"
 
@@ -406,6 +407,13 @@ pci_set_power_state(struct pci_dev *dev, pci_power_t state)
        if ((state == PCI_D1 || state == PCI_D2) && pci_no_d1d2(dev))
                return 0;
 
+       /* find PCI PM capability in list */
+       pm = pci_find_capability(dev, PCI_CAP_ID_PM);
+
+       /* abort if the device doesn't support PM capabilities */
+       if (!pm)
+               return -EIO;
+
        /* Validate current state:
         * Can enter D0 from any state, but if we can only go deeper 
         * to sleep if we're already in a low power state
@@ -418,13 +426,6 @@ pci_set_power_state(struct pci_dev *dev, pci_power_t state)
                return 0;        /* we're already there */
 
 
-       /* find PCI PM capability in list */
-       pm = pci_find_capability(dev, PCI_CAP_ID_PM);
-       
-       /* abort if the device doesn't support PM capabilities */
-       if (!pm)
-               return -EIO; 
-
        pci_read_config_word(dev,pm + PCI_PM_PMC,&pmc);
        if ((pmc & PCI_PM_CAP_VER_MASK) > 3) {
                printk(KERN_DEBUG
@@ -499,7 +500,7 @@ pci_set_power_state(struct pci_dev *dev, pci_power_t state)
        return 0;
 }
 
-int (*platform_pci_choose_state)(struct pci_dev *dev, pm_message_t state);
+pci_power_t (*platform_pci_choose_state)(struct pci_dev *dev, pm_message_t state);
  
 /**
  * pci_choose_state - Choose the power state of a PCI device
@@ -513,15 +514,15 @@ int (*platform_pci_choose_state)(struct pci_dev *dev, pm_message_t state);
 
 pci_power_t pci_choose_state(struct pci_dev *dev, pm_message_t state)
 {
-       int ret;
+       pci_power_t ret;
 
        if (!pci_find_capability(dev, PCI_CAP_ID_PM))
                return PCI_D0;
 
        if (platform_pci_choose_state) {
                ret = platform_pci_choose_state(dev, state);
-               if (ret >= 0)
-                       state.event = ret;
+               if (ret != PCI_POWER_ERROR)
+                       return ret;
        }
 
        switch (state.event) {
@@ -695,14 +696,13 @@ static int do_pci_enable_device(struct pci_dev *dev, int bars)
 }
 
 /**
- * __pci_reenable_device - Resume abandoned device
+ * pci_reenable_device - Resume abandoned device
  * @dev: PCI device to be resumed
  *
  *  Note this function is a backend of pci_default_resume and is not supposed
  *  to be called by normal code, write proper resume handler and use it instead.
  */
-int
-__pci_reenable_device(struct pci_dev *dev)
+int pci_reenable_device(struct pci_dev *dev)
 {
        if (atomic_read(&dev->enable_cnt))
                return do_pci_enable_device(dev, (1 << PCI_NUM_RESOURCES) - 1);
@@ -1186,6 +1186,11 @@ int pci_set_mwi(struct pci_dev *dev)
        return 0;
 }
 
+int pci_try_set_mwi(struct pci_dev *dev)
+{
+       return 0;
+}
+
 void pci_clear_mwi(struct pci_dev *dev)
 {
 }
@@ -1242,9 +1247,7 @@ pci_set_cacheline_size(struct pci_dev *dev)
  * pci_set_mwi - enables memory-write-invalidate PCI transaction
  * @dev: the PCI device for which MWI is enabled
  *
- * Enables the Memory-Write-Invalidate transaction in %PCI_COMMAND,
- * and then calls @pcibios_set_mwi to do the needed arch specific
- * operations or a generic mwi-prep function.
+ * Enables the Memory-Write-Invalidate transaction in %PCI_COMMAND.
  *
  * RETURNS: An appropriate -ERRNO error value on error, or zero for success.
  */
@@ -1260,7 +1263,8 @@ pci_set_mwi(struct pci_dev *dev)
 
        pci_read_config_word(dev, PCI_COMMAND, &cmd);
        if (! (cmd & PCI_COMMAND_INVALIDATE)) {
-               pr_debug("PCI: Enabling Mem-Wr-Inval for device %s\n", pci_name(dev));
+               pr_debug("PCI: Enabling Mem-Wr-Inval for device %s\n",
+                       pci_name(dev));
                cmd |= PCI_COMMAND_INVALIDATE;
                pci_write_config_word(dev, PCI_COMMAND, cmd);
        }
@@ -1268,6 +1272,21 @@ pci_set_mwi(struct pci_dev *dev)
        return 0;
 }
 
+/**
+ * pci_try_set_mwi - enables memory-write-invalidate PCI transaction
+ * @dev: the PCI device for which MWI is enabled
+ *
+ * Enables the Memory-Write-Invalidate transaction in %PCI_COMMAND.
+ * Callers are not required to check the return value.
+ *
+ * RETURNS: An appropriate -ERRNO error value on error, or zero for success.
+ */
+int pci_try_set_mwi(struct pci_dev *dev)
+{
+       int rc = pci_set_mwi(dev);
+       return rc;
+}
+
 /**
  * pci_clear_mwi - disables Memory-Write-Invalidate for device dev
  * @dev: the PCI device to disable
@@ -1383,7 +1402,7 @@ pci_set_consistent_dma_mask(struct pci_dev *dev, u64 mask)
  */
 int pcix_get_max_mmrbc(struct pci_dev *dev)
 {
-       int ret, err, cap;
+       int err, cap;
        u32 stat;
 
        cap = pci_find_capability(dev, PCI_CAP_ID_PCIX);
@@ -1394,9 +1413,7 @@ int pcix_get_max_mmrbc(struct pci_dev *dev)
        if (err)
                return -EINVAL;
 
-       ret = (stat & PCI_X_STATUS_MAX_READ) >> 12;
-
-       return ret;
+       return (stat & PCI_X_STATUS_MAX_READ) >> 12;
 }
 EXPORT_SYMBOL(pcix_get_max_mmrbc);
 
@@ -1438,7 +1455,7 @@ int pcix_set_mmrbc(struct pci_dev *dev, int mmrbc)
        int cap, err = -EINVAL;
        u32 stat, cmd, v, o;
 
-       if (mmrbc < 512 || mmrbc > 4096 || (mmrbc & (mmrbc-1)))
+       if (mmrbc < 512 || mmrbc > 4096 || !is_power_of_2(mmrbc))
                goto out;
 
        v = ffs(mmrbc) - 10;
@@ -1500,7 +1517,7 @@ EXPORT_SYMBOL(pcie_get_readrq);
 /**
  * pcie_set_readrq - set PCI Express maximum memory read request
  * @dev: PCI device to query
- * @count: maximum memory read count in bytes
+ * @rq: maximum memory read count in bytes
  *    valid values are 128, 256, 512, 1024, 2048, 4096
  *
  * If possible sets maximum read byte count
@@ -1510,7 +1527,7 @@ int pcie_set_readrq(struct pci_dev *dev, int rq)
        int cap, err = -EINVAL;
        u16 ctl, v;
 
-       if (rq < 128 || rq > 4096 || (rq & (rq-1)))
+       if (rq < 128 || rq > 4096 || !is_power_of_2(rq))
                goto out;
 
        v = (ffs(rq) - 8) << 12;
@@ -1587,6 +1604,7 @@ early_param("pci", pci_setup);
 device_initcall(pci_init);
 
 EXPORT_SYMBOL_GPL(pci_restore_bars);
+EXPORT_SYMBOL(pci_reenable_device);
 EXPORT_SYMBOL(pci_enable_device_bars);
 EXPORT_SYMBOL(pci_enable_device);
 EXPORT_SYMBOL(pcim_enable_device);
@@ -1602,6 +1620,7 @@ EXPORT_SYMBOL(pci_release_selected_regions);
 EXPORT_SYMBOL(pci_request_selected_regions);
 EXPORT_SYMBOL(pci_set_master);
 EXPORT_SYMBOL(pci_set_mwi);
+EXPORT_SYMBOL(pci_try_set_mwi);
 EXPORT_SYMBOL(pci_clear_mwi);
 EXPORT_SYMBOL_GPL(pci_intx);
 EXPORT_SYMBOL(pci_set_dma_mask);