Merge git://git.kernel.org/pub/scm/linux/kernel/git/davem/net

[~andy/linux] / drivers / net / wireless / ath / ath9k / hw.c

diff --git a/drivers/net/wireless/ath/ath9k/hw.c b/drivers/net/wireless/ath/ath9k/hw.c
index 4faf0a3958765bd07ae683fdd6dceb879a5adbfd..40f57aa2564e4b5038478f36d09490ca74fb0a53 100644 (file)
--- a/drivers/net/wireless/ath/ath9k/hw.c
+++ b/drivers/net/wireless/ath/ath9k/hw.c
@@ -355,7 +355,7 @@ static void ath9k_hw_read_revisions(struct ath_hw *ah)
                        (val & AR_SREV_VERSION2) >> AR_SREV_TYPE2_S;
                ah->hw_version.macRev = MS(val, AR_SREV_REVISION2);
 
-               if (AR_SREV_9462(ah))
+               if (AR_SREV_9462(ah) || AR_SREV_9565(ah))
                        ah->is_pciexpress = true;
                else
                        ah->is_pciexpress = (val &
@@ -602,6 +602,11 @@ static int __ath9k_hw_init(struct ath_hw *ah)
        if (AR_SREV_9462(ah))
                ah->WARegVal &= ~AR_WA_D3_L1_DISABLE;
 
+       if (AR_SREV_9565(ah)) {
+               ah->WARegVal |= AR_WA_BIT22;
+               REG_WRITE(ah, AR_WA, ah->WARegVal);
+       }
+
        ath9k_hw_init_defaults(ah);
        ath9k_hw_init_config(ah);
 
@@ -647,6 +652,7 @@ static int __ath9k_hw_init(struct ath_hw *ah)
        case AR_SREV_VERSION_9340:
        case AR_SREV_VERSION_9462:
        case AR_SREV_VERSION_9550:
+       case AR_SREV_VERSION_9565:
                break;
        default:
                ath_err(common,
@@ -708,7 +714,7 @@ int ath9k_hw_init(struct ath_hw *ah)
        int ret;
        struct ath_common *common = ath9k_hw_common(ah);
 
-       /* These are all the AR5008/AR9001/AR9002 hardware family of chipsets */
+       /* These are all the AR5008/AR9001/AR9002/AR9003 hardware family of chipsets */
        switch (ah->hw_version.devid) {
        case AR5416_DEVID_PCI:
        case AR5416_DEVID_PCIE:
@@ -728,6 +734,7 @@ int ath9k_hw_init(struct ath_hw *ah)
        case AR9300_DEVID_AR9580:
        case AR9300_DEVID_AR9462:
        case AR9485_DEVID_AR1111:
+       case AR9300_DEVID_AR9565:
                break;
        default:
                if (common->bus_ops->ath_bus_type == ATH_USB)
@@ -800,8 +807,7 @@ static void ath9k_hw_init_pll(struct ath_hw *ah,
 {
        u32 pll;
 
-       if (AR_SREV_9485(ah)) {
-
+       if (AR_SREV_9485(ah) || AR_SREV_9565(ah)) {
                /* program BB PLL ki and kd value, ki=0x4, kd=0x40 */
                REG_RMW_FIELD(ah, AR_CH0_BB_DPLL2,
                              AR_CH0_BB_DPLL2_PLL_PWD, 0x1);
@@ -912,7 +918,8 @@ static void ath9k_hw_init_pll(struct ath_hw *ah,
        }
 
        pll = ath9k_hw_compute_pll_control(ah, chan);
-
+       if (AR_SREV_9565(ah))
+               pll |= 0x40000;
        REG_WRITE(ah, AR_RTC_PLL_CONTROL, pll);
 
        if (AR_SREV_9485(ah) || AR_SREV_9340(ah) || AR_SREV_9330(ah) ||
@@ -2034,7 +2041,7 @@ static void ath9k_set_power_sleep(struct ath_hw *ah)
 {
        REG_SET_BIT(ah, AR_STA_ID1, AR_STA_ID1_PWR_SAV);
 
-       if (AR_SREV_9462(ah)) {
+       if (AR_SREV_9462(ah) || AR_SREV_9565(ah)) {
                REG_CLR_BIT(ah, AR_TIMER_MODE, 0xff);
                REG_CLR_BIT(ah, AR_NDP2_TIMER_MODE, 0xff);
                REG_CLR_BIT(ah, AR_SLP32_INC, 0xfffff);
@@ -2401,7 +2408,10 @@ int ath9k_hw_fill_cap_info(struct ath_hw *ah)
        if (eeval & AR5416_OPFLAGS_11G)
                pCap->hw_caps |= ATH9K_HW_CAP_2GHZ;
 
-       if (AR_SREV_9485(ah) || AR_SREV_9285(ah) || AR_SREV_9330(ah))
+       if (AR_SREV_9485(ah) ||
+           AR_SREV_9285(ah) ||
+           AR_SREV_9330(ah) ||
+           AR_SREV_9565(ah))
                chip_chainmask = 1;
        else if (AR_SREV_9462(ah))
                chip_chainmask = 3;
@@ -2489,7 +2499,7 @@ int ath9k_hw_fill_cap_info(struct ath_hw *ah)
 
        if (AR_SREV_9300_20_OR_LATER(ah)) {
                pCap->hw_caps |= ATH9K_HW_CAP_EDMA | ATH9K_HW_CAP_FASTCLOCK;
-               if (!AR_SREV_9330(ah) && !AR_SREV_9485(ah))
+               if (!AR_SREV_9330(ah) && !AR_SREV_9485(ah) && !AR_SREV_9565(ah))
                        pCap->hw_caps |= ATH9K_HW_CAP_LDPC;
 
                pCap->rx_hp_qdepth = ATH9K_HW_RX_HP_QDEPTH;
@@ -2568,14 +2578,12 @@ int ath9k_hw_fill_cap_info(struct ath_hw *ah)
                        ah->enabled_cals |= TX_IQ_ON_AGC_CAL;
        }
 
-       if (AR_SREV_9462(ah)) {
-
+       if (AR_SREV_9462(ah) || AR_SREV_9565(ah)) {
                if (!(ah->ent_mode & AR_ENT_OTP_49GHZ_DISABLE))
                        pCap->hw_caps |= ATH9K_HW_CAP_MCI;
 
                if (AR_SREV_9462_20(ah))
                        pCap->hw_caps |= ATH9K_HW_CAP_RTT;
-
        }
 
 
@@ -2741,7 +2749,7 @@ void ath9k_hw_setrxfilter(struct ath_hw *ah, u32 bits)
 
        ENABLE_REGWRITE_BUFFER(ah);
 
-       if (AR_SREV_9462(ah))
+       if (AR_SREV_9462(ah) || AR_SREV_9565(ah))
                bits |= ATH9K_RX_FILTER_CONTROL_WRAPPER;
 
        REG_WRITE(ah, AR_RX_FILTER, bits);
@@ -3038,7 +3046,7 @@ void ath9k_hw_gen_timer_start(struct ath_hw *ah,
        REG_SET_BIT(ah, gen_tmr_configuration[timer->index].mode_addr,
                    gen_tmr_configuration[timer->index].mode_mask);
 
-       if (AR_SREV_9462(ah)) {
+       if (AR_SREV_9462(ah) || AR_SREV_9565(ah)) {
                /*
                 * Starting from AR9462, each generic timer can select which tsf
                 * to use. But we still follow the old rule, 0 - 7 use tsf and
@@ -3072,6 +3080,16 @@ void ath9k_hw_gen_timer_stop(struct ath_hw *ah, struct ath_gen_timer *timer)
        REG_CLR_BIT(ah, gen_tmr_configuration[timer->index].mode_addr,
                        gen_tmr_configuration[timer->index].mode_mask);
 
+       if (AR_SREV_9462(ah) || AR_SREV_9565(ah)) {
+               /*
+                * Need to switch back to TSF if it was using TSF2.
+                */
+               if ((timer->index >= AR_GEN_TIMER_BANK_1_LEN)) {
+                       REG_CLR_BIT(ah, AR_MAC_PCU_GEN_TIMER_TSF_SEL,
+                                   (1 << timer->index));
+               }
+       }
+
        /* Disable both trigger and thresh interrupt masks */
        REG_CLR_BIT(ah, AR_IMR_S5,
                (SM(AR_GENTMR_BIT(timer->index), AR_IMR_S5_GENTIMER_THRESH) |
@@ -3153,6 +3171,7 @@ static struct {
        { AR_SREV_VERSION_9485,         "9485" },
        { AR_SREV_VERSION_9462,         "9462" },
        { AR_SREV_VERSION_9550,         "9550" },
+       { AR_SREV_VERSION_9565,         "9565" },
 };
 
 /* For devices with external radios */