Merge git://git.kernel.org/pub/scm/linux/kernel/git/pkl/squashfs-linus

[~andy/linux] / drivers / net / wireless / ath / ath9k / ar5008_phy.c

diff --git a/drivers/net/wireless/ath/ath9k/ar5008_phy.c b/drivers/net/wireless/ath/ath9k/ar5008_phy.c
index 106c0b06cf55b6b31bae3442c0642d15262b9e04..441bb33f17adb705af53f5a04f764a6cfa911f46 100644 (file)
--- a/drivers/net/wireless/ath/ath9k/ar5008_phy.c
+++ b/drivers/net/wireless/ath/ath9k/ar5008_phy.c
@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2008-2010 Atheros Communications Inc.
+ * Copyright (c) 2008-2011 Atheros Communications Inc.
  *
  * Permission to use, copy, modify, and/or distribute this software for any
  * purpose with or without fee is hereby granted, provided that the above
@@ -44,6 +44,34 @@ static const int m1ThreshExt_off = 127;
 static const int m2ThreshExt_off = 127;
 
 
+static void ar5008_rf_bank_setup(u32 *bank, struct ar5416IniArray *array,
+                                int col)
+{
+       int i;
+
+       for (i = 0; i < array->ia_rows; i++)
+               bank[i] = INI_RA(array, i, col);
+}
+
+
+#define REG_WRITE_RF_ARRAY(iniarray, regData, regWr) \
+       ar5008_write_rf_array(ah, iniarray, regData, &(regWr))
+
+static void ar5008_write_rf_array(struct ath_hw *ah, struct ar5416IniArray *array,
+                                 u32 *data, unsigned int *writecnt)
+{
+       int r;
+
+       ENABLE_REGWRITE_BUFFER(ah);
+
+       for (r = 0; r < array->ia_rows; r++) {
+               REG_WRITE(ah, INI_RA(array, r, 0), data[r]);
+               DO_DELAY(*writecnt);
+       }
+
+       REGWRITE_BUFFER_FLUSH(ah);
+}
+
 /**
  * ar5008_hw_phy_modify_rx_buffer() - perform analog swizzling of parameters
  * @rfbuf:
@@ -530,16 +558,16 @@ static bool ar5008_hw_set_rf_regs(struct ath_hw *ah,
        eepMinorRev = ah->eep_ops->get_eeprom(ah, EEP_MINOR_REV);
 
        /* Setup Bank 0 Write */
-       RF_BANK_SETUP(ah->analogBank0Data, &ah->iniBank0, 1);
+       ar5008_rf_bank_setup(ah->analogBank0Data, &ah->iniBank0, 1);
 
        /* Setup Bank 1 Write */
-       RF_BANK_SETUP(ah->analogBank1Data, &ah->iniBank1, 1);
+       ar5008_rf_bank_setup(ah->analogBank1Data, &ah->iniBank1, 1);
 
        /* Setup Bank 2 Write */
-       RF_BANK_SETUP(ah->analogBank2Data, &ah->iniBank2, 1);
+       ar5008_rf_bank_setup(ah->analogBank2Data, &ah->iniBank2, 1);
 
        /* Setup Bank 6 Write */
-       RF_BANK_SETUP(ah->analogBank3Data, &ah->iniBank3,
+       ar5008_rf_bank_setup(ah->analogBank3Data, &ah->iniBank3,
                      modesIndex);
        {
                int i;
@@ -569,7 +597,7 @@ static bool ar5008_hw_set_rf_regs(struct ath_hw *ah,
        }
 
        /* Setup Bank 7 Setup */
-       RF_BANK_SETUP(ah->analogBank7Data, &ah->iniBank7, 1);
+       ar5008_rf_bank_setup(ah->analogBank7Data, &ah->iniBank7, 1);
 
        /* Write Analog registers */
        REG_WRITE_RF_ARRAY(&ah->iniBank0, ah->analogBank0Data,
@@ -729,6 +757,7 @@ static int ar5008_hw_process_ini(struct ath_hw *ah,
                                 struct ath9k_channel *chan)
 {
        struct ath_regulatory *regulatory = ath9k_hw_regulatory(ah);
+       struct ath_common *common = ath9k_hw_common(ah);
        int i, regWrites = 0;
        struct ieee80211_channel *channel = chan->chan;
        u32 modesIndex, freqIndex;
@@ -805,7 +834,8 @@ static int ar5008_hw_process_ini(struct ath_hw *ah,
                REG_WRITE(ah, reg, val);
 
                if (reg >= 0x7800 && reg < 0x78a0
-                   && ah->config.analog_shiftreg) {
+                   && ah->config.analog_shiftreg
+                   && (common->bus_ops->ath_bus_type != ATH_USB)) {
                        udelay(100);
                }
 
@@ -835,7 +865,8 @@ static int ar5008_hw_process_ini(struct ath_hw *ah,
                REG_WRITE(ah, reg, val);
 
                if (reg >= 0x7800 && reg < 0x78a0
-                   && ah->config.analog_shiftreg) {
+                   && ah->config.analog_shiftreg
+                   && (common->bus_ops->ath_bus_type != ATH_USB)) {
                        udelay(100);
                }