ixgbe: define IXGBE_MAX_VFS_DRV_LIMIT macro and cleanup const 63

[~andy/linux] / drivers / net / ethernet / intel / ixgbe / ixgbe_sriov.c

diff --git a/drivers/net/ethernet/intel/ixgbe/ixgbe_sriov.c b/drivers/net/ethernet/intel/ixgbe/ixgbe_sriov.c
index d6f0c0d8cf11ddb395617e2749bbf25329cae42c..dff0977876f75448ee67ef6e1305bdc8b5e8be22 100644 (file)
--- a/drivers/net/ethernet/intel/ixgbe/ixgbe_sriov.c
+++ b/drivers/net/ethernet/intel/ixgbe/ixgbe_sriov.c
@@ -148,7 +148,7 @@ void ixgbe_enable_sriov(struct ixgbe_adapter *adapter)
                 * physical function.  If the user requests greater thn
                 * 63 VFs then it is an error - reset to default of zero.
                 */
-               adapter->num_vfs = min_t(unsigned int, adapter->num_vfs, 63);
+               adapter->num_vfs = min_t(unsigned int, adapter->num_vfs, IXGBE_MAX_VFS_DRV_LIMIT);
 
                err = pci_enable_sriov(adapter->pdev, adapter->num_vfs);
                if (err) {
@@ -257,7 +257,7 @@ static int ixgbe_pci_sriov_enable(struct pci_dev *dev, int num_vfs)
         * PF.  The PCI bus driver already checks for other values out of
         * range.
         */
-       if (num_vfs > 63) {
+       if (num_vfs > IXGBE_MAX_VFS_DRV_LIMIT) {
                err = -EPERM;
                goto err_out;
        }
@@ -291,7 +291,9 @@ static int ixgbe_pci_sriov_disable(struct pci_dev *dev)
 {
        struct ixgbe_adapter *adapter = pci_get_drvdata(dev);
        int err;
+#ifdef CONFIG_PCI_IOV
        u32 current_flags = adapter->flags;
+#endif
 
        err = ixgbe_disable_sriov(adapter);
 
@@ -629,11 +631,14 @@ int ixgbe_vf_configuration(struct pci_dev *pdev, unsigned int event_mask)
 
 static int ixgbe_vf_reset_msg(struct ixgbe_adapter *adapter, u32 vf)
 {
+       struct ixgbe_ring_feature *vmdq = &adapter->ring_feature[RING_F_VMDQ];
        struct ixgbe_hw *hw = &adapter->hw;
        unsigned char *vf_mac = adapter->vfinfo[vf].vf_mac_addresses;
        u32 reg, reg_offset, vf_shift;
        u32 msgbuf[4] = {0, 0, 0, 0};
        u8 *addr = (u8 *)(&msgbuf[1]);
+       u32 q_per_pool = __ALIGN_MASK(1, ~vmdq->mask);
+       int i;
 
        e_info(probe, "VF Reset msg received from vf %d\n", vf);
 
@@ -652,6 +657,17 @@ static int ixgbe_vf_reset_msg(struct ixgbe_adapter *adapter, u32 vf)
        reg |= 1 << vf_shift;
        IXGBE_WRITE_REG(hw, IXGBE_VFTE(reg_offset), reg);
 
+       /* force drop enable for all VF Rx queues */
+       for (i = vf * q_per_pool; i < ((vf + 1) * q_per_pool); i++) {
+               /* flush previous write */
+               IXGBE_WRITE_FLUSH(hw);
+
+               /* indicate to hardware that we want to set drop enable */
+               reg = IXGBE_QDE_WRITE | IXGBE_QDE_ENABLE;
+               reg |= i <<  IXGBE_QDE_IDX_SHIFT;
+               IXGBE_WRITE_REG(hw, IXGBE_QDE, reg);
+       }
+
        /* enable receive for vf */
        reg = IXGBE_READ_REG(hw, IXGBE_VFRE(reg_offset));
        reg |= 1 << vf_shift;
@@ -682,6 +698,15 @@ static int ixgbe_vf_reset_msg(struct ixgbe_adapter *adapter, u32 vf)
        reg |= (1 << vf_shift);
        IXGBE_WRITE_REG(hw, IXGBE_VMECM(reg_offset), reg);
 
+       /*
+        * Reset the VFs TDWBAL and TDWBAH registers
+        * which are not cleared by an FLR
+        */
+       for (i = 0; i < q_per_pool; i++) {
+               IXGBE_WRITE_REG(hw, IXGBE_PVFTDWBAHn(q_per_pool, vf, i), 0);
+               IXGBE_WRITE_REG(hw, IXGBE_PVFTDWBALn(q_per_pool, vf, i), 0);
+       }
+
        /* reply to reset with ack and vf mac address */
        msgbuf[0] = IXGBE_VF_RESET;
        if (!is_zero_ether_addr(vf_mac)) {
@@ -715,8 +740,7 @@ static int ixgbe_set_vf_mac_addr(struct ixgbe_adapter *adapter,
        }
 
        if (adapter->vfinfo[vf].pf_set_mac &&
-           memcmp(adapter->vfinfo[vf].vf_mac_addresses, new_mac,
-                  ETH_ALEN)) {
+           !ether_addr_equal(adapter->vfinfo[vf].vf_mac_addresses, new_mac)) {
                e_warn(drv,
                       "VF %d attempted to override administratively set MAC address\n"
                       "Reload the VF driver to resume operations\n",