#include <linux/types.h>
#include <linux/slab.h>
#include <linux/delay.h>
-#include <linux/platform_device.h>
#include <linux/clk.h>
#include <linux/dma-mapping.h>
#include <linux/spinlock.h>
/* OMAP USBHOST Register addresses */
-/* TLL Register Set */
-#define OMAP_USBTLL_REVISION (0x00)
-#define OMAP_USBTLL_SYSCONFIG (0x10)
-#define OMAP_USBTLL_SYSCONFIG_CACTIVITY (1 << 8)
-#define OMAP_USBTLL_SYSCONFIG_SIDLEMODE (1 << 3)
-#define OMAP_USBTLL_SYSCONFIG_ENAWAKEUP (1 << 2)
-#define OMAP_USBTLL_SYSCONFIG_SOFTRESET (1 << 1)
-#define OMAP_USBTLL_SYSCONFIG_AUTOIDLE (1 << 0)
-
-#define OMAP_USBTLL_SYSSTATUS (0x14)
-#define OMAP_USBTLL_SYSSTATUS_RESETDONE (1 << 0)
-
-#define OMAP_USBTLL_IRQSTATUS (0x18)
-#define OMAP_USBTLL_IRQENABLE (0x1C)
-
-#define OMAP_TLL_SHARED_CONF (0x30)
-#define OMAP_TLL_SHARED_CONF_USB_90D_DDR_EN (1 << 6)
-#define OMAP_TLL_SHARED_CONF_USB_180D_SDR_EN (1 << 5)
-#define OMAP_TLL_SHARED_CONF_USB_DIVRATION (1 << 2)
-#define OMAP_TLL_SHARED_CONF_FCLK_REQ (1 << 1)
-#define OMAP_TLL_SHARED_CONF_FCLK_IS_ON (1 << 0)
-
-#define OMAP_TLL_CHANNEL_CONF(num) (0x040 + 0x004 * num)
-#define OMAP_TLL_CHANNEL_CONF_FSLSMODE_SHIFT 24
-#define OMAP_TLL_CHANNEL_CONF_ULPINOBITSTUFF (1 << 11)
-#define OMAP_TLL_CHANNEL_CONF_ULPI_ULPIAUTOIDLE (1 << 10)
-#define OMAP_TLL_CHANNEL_CONF_UTMIAUTOIDLE (1 << 9)
-#define OMAP_TLL_CHANNEL_CONF_ULPIDDRMODE (1 << 8)
-#define OMAP_TLL_CHANNEL_CONF_CHANMODE_FSLS (1 << 1)
-#define OMAP_TLL_CHANNEL_CONF_CHANEN (1 << 0)
-
-#define OMAP_TLL_FSLSMODE_6PIN_PHY_DAT_SE0 0x0
-#define OMAP_TLL_FSLSMODE_6PIN_PHY_DP_DM 0x1
-#define OMAP_TLL_FSLSMODE_3PIN_PHY 0x2
-#define OMAP_TLL_FSLSMODE_4PIN_PHY 0x3
-#define OMAP_TLL_FSLSMODE_6PIN_TLL_DAT_SE0 0x4
-#define OMAP_TLL_FSLSMODE_6PIN_TLL_DP_DM 0x5
-#define OMAP_TLL_FSLSMODE_3PIN_TLL 0x6
-#define OMAP_TLL_FSLSMODE_4PIN_TLL 0x7
-#define OMAP_TLL_FSLSMODE_2PIN_TLL_DAT_SE0 0xA
-#define OMAP_TLL_FSLSMODE_2PIN_DAT_DP_DM 0xB
-
-#define OMAP_TLL_ULPI_FUNCTION_CTRL(num) (0x804 + 0x100 * num)
-#define OMAP_TLL_ULPI_INTERFACE_CTRL(num) (0x807 + 0x100 * num)
-#define OMAP_TLL_ULPI_OTG_CTRL(num) (0x80A + 0x100 * num)
-#define OMAP_TLL_ULPI_INT_EN_RISE(num) (0x80D + 0x100 * num)
-#define OMAP_TLL_ULPI_INT_EN_FALL(num) (0x810 + 0x100 * num)
-#define OMAP_TLL_ULPI_INT_STATUS(num) (0x813 + 0x100 * num)
-#define OMAP_TLL_ULPI_INT_LATCH(num) (0x814 + 0x100 * num)
-#define OMAP_TLL_ULPI_DEBUG(num) (0x815 + 0x100 * num)
-#define OMAP_TLL_ULPI_SCRATCH_REGISTER(num) (0x816 + 0x100 * num)
-
-#define OMAP_TLL_CHANNEL_COUNT 3
-#define OMAP_TLL_CHANNEL_1_EN_MASK (1 << 0)
-#define OMAP_TLL_CHANNEL_2_EN_MASK (1 << 1)
-#define OMAP_TLL_CHANNEL_3_EN_MASK (1 << 2)
-
/* UHH Register Set */
#define OMAP_UHH_REVISION (0x00)
#define OMAP_UHH_SYSCONFIG (0x10)
#define OMAP4_P2_MODE_TLL (1 << 18)
#define OMAP4_P2_MODE_HSIC (3 << 18)
-#define OMAP_REV2_TLL_CHANNEL_COUNT 2
-
#define OMAP_UHH_DEBUG_CSR (0x44)
/* Values of UHH_REVISION - Note: these are not given in the TRM */
struct clk *xclk60mhsp2_ck;
struct clk *utmi_p1_fck;
struct clk *usbhost_p1_fck;
- struct clk *usbtll_p1_fck;
struct clk *utmi_p2_fck;
struct clk *usbhost_p2_fck;
- struct clk *usbtll_p2_fck;
struct clk *init_60m_fclk;
struct clk *ehci_logic_fck;
void __iomem *uhh_base;
- void __iomem *tll_base;
struct usbhs_omap_platform_data platdata;
}
}
-/*
- * convert the port-mode enum to a value we can use in the FSLSMODE
- * field of USBTLL_CHANNEL_CONF
- */
-static unsigned ohci_omap3_fslsmode(enum usbhs_omap_port_mode mode)
-{
- switch (mode) {
- case OMAP_USBHS_PORT_MODE_UNUSED:
- case OMAP_OHCI_PORT_MODE_PHY_6PIN_DATSE0:
- return OMAP_TLL_FSLSMODE_6PIN_PHY_DAT_SE0;
-
- case OMAP_OHCI_PORT_MODE_PHY_6PIN_DPDM:
- return OMAP_TLL_FSLSMODE_6PIN_PHY_DP_DM;
-
- case OMAP_OHCI_PORT_MODE_PHY_3PIN_DATSE0:
- return OMAP_TLL_FSLSMODE_3PIN_PHY;
-
- case OMAP_OHCI_PORT_MODE_PHY_4PIN_DPDM:
- return OMAP_TLL_FSLSMODE_4PIN_PHY;
-
- case OMAP_OHCI_PORT_MODE_TLL_6PIN_DATSE0:
- return OMAP_TLL_FSLSMODE_6PIN_TLL_DAT_SE0;
-
- case OMAP_OHCI_PORT_MODE_TLL_6PIN_DPDM:
- return OMAP_TLL_FSLSMODE_6PIN_TLL_DP_DM;
-
- case OMAP_OHCI_PORT_MODE_TLL_3PIN_DATSE0:
- return OMAP_TLL_FSLSMODE_3PIN_TLL;
-
- case OMAP_OHCI_PORT_MODE_TLL_4PIN_DPDM:
- return OMAP_TLL_FSLSMODE_4PIN_TLL;
-
- case OMAP_OHCI_PORT_MODE_TLL_2PIN_DATSE0:
- return OMAP_TLL_FSLSMODE_2PIN_TLL_DAT_SE0;
-
- case OMAP_OHCI_PORT_MODE_TLL_2PIN_DPDM:
- return OMAP_TLL_FSLSMODE_2PIN_DAT_DP_DM;
- default:
- pr_warning("Invalid port mode, using default\n");
- return OMAP_TLL_FSLSMODE_6PIN_PHY_DAT_SE0;
- }
-}
-
-static void usbhs_omap_tll_init(struct device *dev, u8 tll_channel_count)
-{
- struct usbhs_hcd_omap *omap = dev_get_drvdata(dev);
- struct usbhs_omap_platform_data *pdata = dev->platform_data;
- unsigned reg;
- int i;
-
- /* Program Common TLL register */
- reg = usbhs_read(omap->tll_base, OMAP_TLL_SHARED_CONF);
- reg |= (OMAP_TLL_SHARED_CONF_FCLK_IS_ON
- | OMAP_TLL_SHARED_CONF_USB_DIVRATION);
- reg &= ~OMAP_TLL_SHARED_CONF_USB_90D_DDR_EN;
- reg &= ~OMAP_TLL_SHARED_CONF_USB_180D_SDR_EN;
-
- usbhs_write(omap->tll_base, OMAP_TLL_SHARED_CONF, reg);
-
- /* Enable channels now */
- for (i = 0; i < tll_channel_count; i++) {
- reg = usbhs_read(omap->tll_base,
- OMAP_TLL_CHANNEL_CONF(i));
-
- if (is_ohci_port(pdata->port_mode[i])) {
- reg |= ohci_omap3_fslsmode(pdata->port_mode[i])
- << OMAP_TLL_CHANNEL_CONF_FSLSMODE_SHIFT;
- reg |= OMAP_TLL_CHANNEL_CONF_CHANMODE_FSLS;
- } else if (pdata->port_mode[i] == OMAP_EHCI_PORT_MODE_TLL) {
-
- /* Disable AutoIdle, BitStuffing and use SDR Mode */
- reg &= ~(OMAP_TLL_CHANNEL_CONF_UTMIAUTOIDLE
- | OMAP_TLL_CHANNEL_CONF_ULPINOBITSTUFF
- | OMAP_TLL_CHANNEL_CONF_ULPIDDRMODE);
-
- } else
- continue;
-
- reg |= OMAP_TLL_CHANNEL_CONF_CHANEN;
- usbhs_write(omap->tll_base,
- OMAP_TLL_CHANNEL_CONF(i), reg);
-
- usbhs_writeb(omap->tll_base,
- OMAP_TLL_ULPI_SCRATCH_REGISTER(i), 0xbe);
- }
-}
-
static int usbhs_runtime_resume(struct device *dev)
{
struct usbhs_hcd_omap *omap = dev_get_drvdata(dev);
return -ENODEV;
}
+ omap_tll_enable();
spin_lock_irqsave(&omap->lock, flags);
if (omap->ehci_logic_fck && !IS_ERR(omap->ehci_logic_fck))
clk_enable(omap->ehci_logic_fck);
- if (is_ehci_tll_mode(pdata->port_mode[0])) {
+ if (is_ehci_tll_mode(pdata->port_mode[0]))
clk_enable(omap->usbhost_p1_fck);
- clk_enable(omap->usbtll_p1_fck);
- }
- if (is_ehci_tll_mode(pdata->port_mode[1])) {
+ if (is_ehci_tll_mode(pdata->port_mode[1]))
clk_enable(omap->usbhost_p2_fck);
- clk_enable(omap->usbtll_p2_fck);
- }
+
clk_enable(omap->utmi_p1_fck);
clk_enable(omap->utmi_p2_fck);
spin_lock_irqsave(&omap->lock, flags);
- if (is_ehci_tll_mode(pdata->port_mode[0])) {
+ if (is_ehci_tll_mode(pdata->port_mode[0]))
clk_disable(omap->usbhost_p1_fck);
- clk_disable(omap->usbtll_p1_fck);
- }
- if (is_ehci_tll_mode(pdata->port_mode[1])) {
+ if (is_ehci_tll_mode(pdata->port_mode[1]))
clk_disable(omap->usbhost_p2_fck);
- clk_disable(omap->usbtll_p2_fck);
- }
+
clk_disable(omap->utmi_p2_fck);
clk_disable(omap->utmi_p1_fck);
clk_disable(omap->ehci_logic_fck);
spin_unlock_irqrestore(&omap->lock, flags);
+ omap_tll_disable();
return 0;
}
dev_dbg(dev, "starting TI HSUSB Controller\n");
- pm_runtime_get_sync(dev);
-
if (pdata->ehci_data->phy_reset) {
if (gpio_is_valid(pdata->ehci_data->reset_gpio_port[0]))
gpio_request_one(pdata->ehci_data->reset_gpio_port[0],
udelay(10);
}
+ pm_runtime_get_sync(dev);
spin_lock_irqsave(&omap->lock, flags);
omap->usbhs_rev = usbhs_read(omap->uhh_base, OMAP_UHH_REVISION);
dev_dbg(dev, "OMAP UHH_REVISION 0x%x\n", omap->usbhs_rev);
usbhs_write(omap->uhh_base, OMAP_UHH_HOSTCONFIG, reg);
dev_dbg(dev, "UHH setup done, uhh_hostconfig=%x\n", reg);
- if (is_ehci_tll_mode(pdata->port_mode[0]) ||
- is_ehci_tll_mode(pdata->port_mode[1]) ||
- is_ehci_tll_mode(pdata->port_mode[2]) ||
- (is_ohci_port(pdata->port_mode[0])) ||
- (is_ohci_port(pdata->port_mode[1])) ||
- (is_ohci_port(pdata->port_mode[2]))) {
-
- /* Enable UTMI mode for required TLL channels */
- if (is_omap_usbhs_rev2(omap))
- usbhs_omap_tll_init(dev, OMAP_REV2_TLL_CHANNEL_COUNT);
- else
- usbhs_omap_tll_init(dev, OMAP_TLL_CHANNEL_COUNT);
- }
-
spin_unlock_irqrestore(&omap->lock, flags);
+ pm_runtime_put_sync(dev);
if (pdata->ehci_data->phy_reset) {
/* Hold the PHY in RESET for enough time till
* PHY is settled and ready
gpio_set_value_cansleep
(pdata->ehci_data->reset_gpio_port[1], 1);
}
-
- pm_runtime_put_sync(dev);
}
static void omap_usbhs_deinit(struct device *dev)
goto err_xclk60mhsp2_ck;
}
- omap->usbtll_p1_fck = clk_get(dev, "usb_tll_hs_usb_ch0_clk");
- if (IS_ERR(omap->usbtll_p1_fck)) {
- ret = PTR_ERR(omap->usbtll_p1_fck);
- dev_err(dev, "usbtll_p1_fck failed error:%d\n", ret);
- goto err_usbhost_p1_fck;
- }
-
omap->usbhost_p2_fck = clk_get(dev, "usb_host_hs_utmi_p2_clk");
if (IS_ERR(omap->usbhost_p2_fck)) {
ret = PTR_ERR(omap->usbhost_p2_fck);
dev_err(dev, "usbhost_p2_fck failed error:%d\n", ret);
- goto err_usbtll_p1_fck;
- }
-
- omap->usbtll_p2_fck = clk_get(dev, "usb_tll_hs_usb_ch1_clk");
- if (IS_ERR(omap->usbtll_p2_fck)) {
- ret = PTR_ERR(omap->usbtll_p2_fck);
- dev_err(dev, "usbtll_p2_fck failed error:%d\n", ret);
- goto err_usbhost_p2_fck;
+ goto err_usbhost_p1_fck;
}
omap->init_60m_fclk = clk_get(dev, "init_60m_fclk");
if (IS_ERR(omap->init_60m_fclk)) {
ret = PTR_ERR(omap->init_60m_fclk);
dev_err(dev, "init_60m_fclk failed error:%d\n", ret);
- goto err_usbtll_p2_fck;
+ goto err_usbhost_p2_fck;
}
if (is_ehci_phy_mode(pdata->port_mode[0])) {
goto err_init_60m_fclk;
}
- res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "tll");
- if (!res) {
- dev_err(dev, "UHH EHCI get resource failed\n");
- ret = -ENODEV;
- goto err_tll;
- }
-
- omap->tll_base = ioremap(res->start, resource_size(res));
- if (!omap->tll_base) {
- dev_err(dev, "TLL ioremap failed\n");
- ret = -ENOMEM;
- goto err_tll;
- }
-
platform_set_drvdata(pdev, omap);
omap_usbhs_init(dev);
err_alloc:
omap_usbhs_deinit(&pdev->dev);
- iounmap(omap->tll_base);
-
-err_tll:
iounmap(omap->uhh_base);
err_init_60m_fclk:
clk_put(omap->init_60m_fclk);
-err_usbtll_p2_fck:
- clk_put(omap->usbtll_p2_fck);
-
err_usbhost_p2_fck:
clk_put(omap->usbhost_p2_fck);
-err_usbtll_p1_fck:
- clk_put(omap->usbtll_p1_fck);
-
err_usbhost_p1_fck:
clk_put(omap->usbhost_p1_fck);
struct usbhs_hcd_omap *omap = platform_get_drvdata(pdev);
omap_usbhs_deinit(&pdev->dev);
- iounmap(omap->tll_base);
iounmap(omap->uhh_base);
clk_put(omap->init_60m_fclk);
- clk_put(omap->usbtll_p2_fck);
clk_put(omap->usbhost_p2_fck);
- clk_put(omap->usbtll_p1_fck);
clk_put(omap->usbhost_p1_fck);
clk_put(omap->xclk60mhsp2_ck);
clk_put(omap->utmi_p2_fck);
* init before ehci and ohci drivers;
* The usbhs core driver should be initialized much before
* the omap ehci and ohci probe functions are called.
+ * This usbhs core driver should be initialized after
+ * usb tll driver
*/
-fs_initcall(omap_usbhs_drvinit);
+fs_initcall_sync(omap_usbhs_drvinit);
static void __exit omap_usbhs_drvexit(void)
{
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