]> Pileus Git - ~andy/linux/blobdiff - drivers/gpu/drm/radeon/rv770d.h
Merge branch 'board-specific' of git://github.com/hzhuang1/linux into late/board
[~andy/linux] / drivers / gpu / drm / radeon / rv770d.h
index 9c549f702f2f35e995db4b88ffb31ad5b4d21e9b..b0adfc595d7541cdeb782c903101cf92c6d1ce37 100644 (file)
 #define                BACKEND_MAP(x)                                  ((x) << 16)
 
 #define GB_TILING_CONFIG                               0x98F0
+#define     PIPE_TILING__SHIFT              1
+#define     PIPE_TILING__MASK               0x0000000e
 
 #define        GC_USER_SHADER_PIPE_CONFIG                      0x8954
 #define                INACTIVE_QD_PIPES(x)                            ((x) << 8)
 #define                INACTIVE_QD_PIPES_MASK                          0x0000FF00
+#define                INACTIVE_QD_PIPES_SHIFT                     8
 #define                INACTIVE_SIMDS(x)                               ((x) << 16)
 #define                INACTIVE_SIMDS_MASK                             0x00FF0000
 
 #define        MC_VM_MD_L1_TLB0_CNTL                           0x2654
 #define        MC_VM_MD_L1_TLB1_CNTL                           0x2658
 #define        MC_VM_MD_L1_TLB2_CNTL                           0x265C
+#define        MC_VM_MD_L1_TLB3_CNTL                           0x2698
 #define        MC_VM_SYSTEM_APERTURE_DEFAULT_ADDR              0x203C
 #define        MC_VM_SYSTEM_APERTURE_HIGH_ADDR                 0x2038
 #define        MC_VM_SYSTEM_APERTURE_LOW_ADDR                  0x2034
 #define        SCRATCH_UMSK                                    0x8540
 #define        SCRATCH_ADDR                                    0x8544
 
+#define        SMX_SAR_CTL0                                    0xA008
 #define        SMX_DC_CTL0                                     0xA020
 #define                USE_HASH_FUNCTION                               (1 << 0)
 #define                CACHE_DEPTH(x)                                  ((x) << 1)
 #define        TCP_CNTL                                        0x9610
 #define        TCP_CHAN_STEER                                  0x9614
 
+#define        VC_ENHANCE                                      0x9714
+
 #define        VGT_CACHE_INVALIDATION                          0x88C4
 #define                CACHE_INVALIDATION(x)                           ((x)<<0)
 #define                        VC_ONLY                                         0