]> Pileus Git - ~andy/linux/blobdiff - drivers/gpu/drm/nouveau/core/engine/fifo/nv84.c
Merge branch 'stable/for-jens-3.13-take-two' of git://git.kernel.org/pub/scm/linux...
[~andy/linux] / drivers / gpu / drm / nouveau / core / engine / fifo / nv84.c
index 7f53196cff52ea176802a5d2df579507ae33c2fe..0908dc834c84c48ac34f91afde1984ed593531bd 100644 (file)
@@ -28,7 +28,6 @@
 #include <core/ramht.h>
 #include <core/event.h>
 #include <core/class.h>
-#include <core/math.h>
 
 #include <subdev/timer.h>
 #include <subdev/bar.h>
@@ -57,6 +56,7 @@ nv84_fifo_context_attach(struct nouveau_object *parent,
        case NVDEV_ENGINE_SW   : return 0;
        case NVDEV_ENGINE_GR   : addr = 0x0020; break;
        case NVDEV_ENGINE_VP   : addr = 0x0040; break;
+       case NVDEV_ENGINE_PPP  :
        case NVDEV_ENGINE_MPEG : addr = 0x0060; break;
        case NVDEV_ENGINE_BSP  : addr = 0x0080; break;
        case NVDEV_ENGINE_CRYPT: addr = 0x00a0; break;
@@ -92,6 +92,7 @@ nv84_fifo_context_detach(struct nouveau_object *parent, bool suspend,
        case NVDEV_ENGINE_SW   : return 0;
        case NVDEV_ENGINE_GR   : engn = 0; addr = 0x0020; break;
        case NVDEV_ENGINE_VP   : engn = 3; addr = 0x0040; break;
+       case NVDEV_ENGINE_PPP  :
        case NVDEV_ENGINE_MPEG : engn = 1; addr = 0x0060; break;
        case NVDEV_ENGINE_BSP  : engn = 5; addr = 0x0080; break;
        case NVDEV_ENGINE_CRYPT: engn = 4; addr = 0x00a0; break;
@@ -143,7 +144,7 @@ nv84_fifo_object_attach(struct nouveau_object *parent,
        case NVDEV_ENGINE_COPY0 : context |= 0x00300000; break;
        case NVDEV_ENGINE_VP    : context |= 0x00400000; break;
        case NVDEV_ENGINE_CRYPT :
-       case NVDEV_ENGINE_UNK1C1: context |= 0x00500000; break;
+       case NVDEV_ENGINE_VIC   : context |= 0x00500000; break;
        case NVDEV_ENGINE_BSP   : context |= 0x00600000; break;
        default:
                return -EINVAL;
@@ -179,7 +180,7 @@ nv84_fifo_chan_ctor_dma(struct nouveau_object *parent,
                                          (1ULL << NVDEV_ENGINE_BSP) |
                                          (1ULL << NVDEV_ENGINE_PPP) |
                                          (1ULL << NVDEV_ENGINE_COPY0) |
-                                         (1ULL << NVDEV_ENGINE_UNK1C1), &chan);
+                                         (1ULL << NVDEV_ENGINE_VIC), &chan);
        *pobject = nv_object(chan);
        if (ret)
                return ret;
@@ -242,7 +243,7 @@ nv84_fifo_chan_ctor_ind(struct nouveau_object *parent,
                                          (1ULL << NVDEV_ENGINE_BSP) |
                                          (1ULL << NVDEV_ENGINE_PPP) |
                                          (1ULL << NVDEV_ENGINE_COPY0) |
-                                         (1ULL << NVDEV_ENGINE_UNK1C1), &chan);
+                                         (1ULL << NVDEV_ENGINE_VIC), &chan);
        *pobject = nv_object(chan);
        if (ret)
                return ret;
@@ -258,7 +259,7 @@ nv84_fifo_chan_ctor_ind(struct nouveau_object *parent,
        nv_parent(chan)->object_detach = nv50_fifo_object_detach;
 
        ioffset = args->ioffset;
-       ilength = log2i(args->ilength / 8);
+       ilength = order_base_2(args->ilength / 8);
 
        nv_wo32(base->ramfc, 0x3c, 0x403f6078);
        nv_wo32(base->ramfc, 0x44, 0x01003fff);
@@ -434,8 +435,8 @@ nv84_fifo_ctor(struct nouveau_object *parent, struct nouveau_object *engine,
        return 0;
 }
 
-struct nouveau_oclass
-nv84_fifo_oclass = {
+struct nouveau_oclass *
+nv84_fifo_oclass = &(struct nouveau_oclass) {
        .handle = NV_ENGINE(FIFO, 0x84),
        .ofuncs = &(struct nouveau_ofuncs) {
                .ctor = nv84_fifo_ctor,