]> Pileus Git - ~andy/linux/blobdiff - drivers/gpu/drm/i915/intel_lvds.c
drm/i915: Remove the redundant check for a fixed_panel_mode
[~andy/linux] / drivers / gpu / drm / i915 / intel_lvds.c
index 31df55f0a0a7950a0e59ebce556fc30cde35b891..6ef9388c54d3c1a5c7f88a1c334ec6556eaf5769 100644 (file)
@@ -200,27 +200,25 @@ static bool intel_lvds_mode_fixup(struct drm_encoder *encoder,
        if (dev_priv->panel_fixed_mode == NULL)
                return true;
        /*
-        * If we have timings from the BIOS for the panel, put them in
+        * We have timings from the BIOS for the panel, put them in
         * to the adjusted mode.  The CRTC will be set up for this mode,
         * with the panel scaling set up to source from the H/VDisplay
         * of the original mode.
         */
-       if (dev_priv->panel_fixed_mode != NULL) {
-               adjusted_mode->hdisplay = dev_priv->panel_fixed_mode->hdisplay;
-               adjusted_mode->hsync_start =
-                       dev_priv->panel_fixed_mode->hsync_start;
-               adjusted_mode->hsync_end =
-                       dev_priv->panel_fixed_mode->hsync_end;
-               adjusted_mode->htotal = dev_priv->panel_fixed_mode->htotal;
-               adjusted_mode->vdisplay = dev_priv->panel_fixed_mode->vdisplay;
-               adjusted_mode->vsync_start =
-                       dev_priv->panel_fixed_mode->vsync_start;
-               adjusted_mode->vsync_end =
-                       dev_priv->panel_fixed_mode->vsync_end;
-               adjusted_mode->vtotal = dev_priv->panel_fixed_mode->vtotal;
-               adjusted_mode->clock = dev_priv->panel_fixed_mode->clock;
-               drm_mode_set_crtcinfo(adjusted_mode, CRTC_INTERLACE_HALVE_V);
-       }
+       adjusted_mode->hdisplay = dev_priv->panel_fixed_mode->hdisplay;
+       adjusted_mode->hsync_start =
+               dev_priv->panel_fixed_mode->hsync_start;
+       adjusted_mode->hsync_end =
+               dev_priv->panel_fixed_mode->hsync_end;
+       adjusted_mode->htotal = dev_priv->panel_fixed_mode->htotal;
+       adjusted_mode->vdisplay = dev_priv->panel_fixed_mode->vdisplay;
+       adjusted_mode->vsync_start =
+               dev_priv->panel_fixed_mode->vsync_start;
+       adjusted_mode->vsync_end =
+               dev_priv->panel_fixed_mode->vsync_end;
+       adjusted_mode->vtotal = dev_priv->panel_fixed_mode->vtotal;
+       adjusted_mode->clock = dev_priv->panel_fixed_mode->clock;
+       drm_mode_set_crtcinfo(adjusted_mode, CRTC_INTERLACE_HALVE_V);
 
        /* Make sure pre-965s set dither correctly */
        if (!IS_I965G(dev)) {
@@ -599,6 +597,26 @@ static int intel_lvds_get_modes(struct drm_connector *connector)
        return 0;
 }
 
+static int intel_no_modeset_on_lid_dmi_callback(const struct dmi_system_id *id)
+{
+       DRM_DEBUG_KMS("Skipping forced modeset for %s\n", id->ident);
+       return 1;
+}
+
+/* The GPU hangs up on these systems if modeset is performed on LID open */
+static const struct dmi_system_id intel_no_modeset_on_lid[] = {
+       {
+               .callback = intel_no_modeset_on_lid_dmi_callback,
+               .ident = "Toshiba Tecra A11",
+               .matches = {
+                       DMI_MATCH(DMI_SYS_VENDOR, "TOSHIBA"),
+                       DMI_MATCH(DMI_PRODUCT_NAME, "TECRA A11"),
+               },
+       },
+
+       { }     /* terminating entry */
+};
+
 /*
  * Lid events. Note the use of 'modeset_on_lid':
  *  - we set it on lid close, and reset it on open
@@ -622,6 +640,9 @@ static int intel_lid_notify(struct notifier_block *nb, unsigned long val,
         */
        if (connector)
                connector->status = connector->funcs->detect(connector);
+       /* Don't force modeset on machines where it causes a GPU lockup */
+       if (dmi_check_system(intel_no_modeset_on_lid))
+               return NOTIFY_OK;
        if (!acpi_lid_open()) {
                dev_priv->modeset_on_lid = 1;
                return NOTIFY_OK;