drm/i915: adjust framebuffer base address on gen4+

[~andy/linux] / drivers / gpu / drm / i915 / i915_reg.h

diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
index 4ddc62ecf839d01d3392da70c5f878c541b67762..da7484ec3bfbfde72bc6de9ecfaabeb85d417095 100644 (file)
--- a/drivers/gpu/drm/i915/i915_reg.h
+++ b/drivers/gpu/drm/i915/i915_reg.h
@@ -2979,13 +2979,14 @@
 #define DSPSIZE(plane) _PIPE(plane, _DSPASIZE, _DSPBSIZE)
 #define DSPSURF(plane) _PIPE(plane, _DSPASURF, _DSPBSURF)
 #define DSPTILEOFF(plane) _PIPE(plane, _DSPATILEOFF, _DSPBTILEOFF)
+#define DSPLINOFF(plane) DSPADDR(plane)
 
 /* Display/Sprite base address macros */
 #define DISP_BASEADDR_MASK     (0xfffff000)
 #define I915_LO_DISPBASE(val)  (val & ~DISP_BASEADDR_MASK)
 #define I915_HI_DISPBASE(val)  (val & DISP_BASEADDR_MASK)
 #define I915_MODIFY_DISPBASE(reg, gfx_addr) \
-               (I915_WRITE(reg, gfx_addr | I915_LO_DISPBASE(I915_READ(reg))))
+               (I915_WRITE((reg), (gfx_addr) | I915_LO_DISPBASE(I915_READ(reg))))
 
 /* VBIOS flags */
 #define SWF00                  0x71410
@@ -4283,7 +4284,7 @@
                                        PIPE_DDI_FUNC_CTL_B)
 #define  PIPE_DDI_FUNC_ENABLE          (1<<31)
 /* Those bits are ignored by pipe EDP since it can only connect to DDI A */
-#define  PIPE_DDI_PORT_MASK                            (0xf<<28)
+#define  PIPE_DDI_PORT_MASK                    (7<<28)
 #define  PIPE_DDI_SELECT_PORT(x)               ((x)<<28)
 #define  PIPE_DDI_MODE_SELECT_HDMI             (0<<24)
 #define  PIPE_DDI_MODE_SELECT_DVI              (1<<24)