Merge tag 'omap-for-v3.11/fixes-for-merge-window' of git://git.kernel.org/pub/scm...

[~andy/linux] / drivers / gpio / gpio-ich.c

diff --git a/drivers/gpio/gpio-ich.c b/drivers/gpio/gpio-ich.c
index f9dbd503fc40fb0f1bccd0fa8f0995816a06b538..2729e3d2d5bbe9da7781be8cf8de34be26d19535 100644 (file)
--- a/drivers/gpio/gpio-ich.c
+++ b/drivers/gpio/gpio-ich.c
@@ -41,12 +41,14 @@ enum GPIO_REG {
        GPIO_USE_SEL = 0,
        GPIO_IO_SEL,
        GPIO_LVL,
+       GPO_BLINK
 };
 
-static const u8 ichx_regs[3][3] = {
+static const u8 ichx_regs[4][3] = {
        {0x00, 0x30, 0x40},     /* USE_SEL[1-3] offsets */
        {0x04, 0x34, 0x44},     /* IO_SEL[1-3] offsets */
        {0x0c, 0x38, 0x48},     /* LVL[1-3] offsets */
+       {0x18, 0x18, 0x18},     /* BLINK offset */
 };
 
 static const u8 ichx_reglen[3] = {
@@ -130,14 +132,11 @@ static int ichx_read_bit(int reg, unsigned nr)
 
 static bool ichx_gpio_check_available(struct gpio_chip *gpio, unsigned nr)
 {
-       return ichx_priv.use_gpio & (1 << (nr / 32));
+       return !!(ichx_priv.use_gpio & (1 << (nr / 32)));
 }
 
 static int ichx_gpio_direction_input(struct gpio_chip *gpio, unsigned nr)
 {
-       if (!ichx_gpio_check_available(gpio, nr))
-               return -ENXIO;
-
        /*
         * Try setting pin as an input and verify it worked since many pins
         * are output-only.
@@ -151,8 +150,9 @@ static int ichx_gpio_direction_input(struct gpio_chip *gpio, unsigned nr)
 static int ichx_gpio_direction_output(struct gpio_chip *gpio, unsigned nr,
                                        int val)
 {
-       if (!ichx_gpio_check_available(gpio, nr))
-               return -ENXIO;
+       /* Disable blink hardware which is available for GPIOs from 0 to 31. */
+       if (nr < 32)
+               ichx_write_bit(GPO_BLINK, nr, 0, 0);
 
        /* Set GPIO output value. */
        ichx_write_bit(GPIO_LVL, nr, val, 0);
@@ -169,9 +169,6 @@ static int ichx_gpio_direction_output(struct gpio_chip *gpio, unsigned nr,
 
 static int ichx_gpio_get(struct gpio_chip *chip, unsigned nr)
 {
-       if (!ichx_gpio_check_available(chip, nr))
-               return -ENXIO;
-
        return ichx_read_bit(GPIO_LVL, nr);
 }
 
@@ -180,9 +177,6 @@ static int ich6_gpio_get(struct gpio_chip *chip, unsigned nr)
        unsigned long flags;
        u32 data;
 
-       if (!ichx_gpio_check_available(chip, nr))
-               return -ENXIO;
-
        /*
         * GPI 0 - 15 need to be read from the power management registers on
         * a ICH6/3100 bridge.
@@ -207,6 +201,9 @@ static int ich6_gpio_get(struct gpio_chip *chip, unsigned nr)
 
 static int ichx_gpio_request(struct gpio_chip *chip, unsigned nr)
 {
+       if (!ichx_gpio_check_available(chip, nr))
+               return -ENXIO;
+
        /*
         * Note we assume the BIOS properly set a bridge's USE value.  Some
         * chips (eg Intel 3100) have bogus USE values though, so first see if
@@ -214,7 +211,7 @@ static int ichx_gpio_request(struct gpio_chip *chip, unsigned nr)
         * If it can't be trusted, assume that the pin can be used as a GPIO.
         */
        if (ichx_priv.desc->use_sel_ignore[nr / 32] & (1 << (nr & 0x1f)))
-               return 1;
+               return 0;
 
        return ichx_read_bit(GPIO_USE_SEL, nr) ? 0 : -ENODEV;
 }