dmaengine: consolidate tx_status functions

[~andy/linux] / drivers / dma / coh901318.c

diff --git a/drivers/dma/coh901318.c b/drivers/dma/coh901318.c
index 4234f416ef115055cb425822a2c411a73dd41590..f3505178ff4156201ccde652dd90777237d07ec8 100644 (file)
--- a/drivers/dma/coh901318.c
+++ b/drivers/dma/coh901318.c
@@ -24,6 +24,7 @@
 #include <mach/coh901318.h>
 
 #include "coh901318_lli.h"
+#include "dmaengine.h"
 
 #define COHC_2_DEV(cohc) (&cohc->chan.dev->device)
 
@@ -39,7 +40,7 @@ struct coh901318_desc {
        struct scatterlist *sg;
        unsigned int sg_len;
        struct coh901318_lli *lli;
-       enum dma_data_direction dir;
+       enum dma_transfer_direction dir;
        unsigned long flags;
        u32 head_config;
        u32 head_ctrl;
@@ -59,7 +60,6 @@ struct coh901318_base {
 struct coh901318_chan {
        spinlock_t lock;
        int allocated;
-       int completed;
        int id;
        int stopped;
 
@@ -318,20 +318,6 @@ static int coh901318_prep_linked_list(struct coh901318_chan *cohc,
 
        return 0;
 }
-static dma_cookie_t
-coh901318_assign_cookie(struct coh901318_chan *cohc,
-                       struct coh901318_desc *cohd)
-{
-       dma_cookie_t cookie = cohc->chan.cookie;
-
-       if (++cookie < 0)
-               cookie = 1;
-
-       cohc->chan.cookie = cookie;
-       cohd->desc.cookie = cookie;
-
-       return cookie;
-}
 
 static struct coh901318_desc *
 coh901318_desc_get(struct coh901318_chan *cohc)
@@ -705,7 +691,7 @@ static void dma_tasklet(unsigned long data)
        callback_param = cohd_fin->desc.callback_param;
 
        /* sign this job as completed on the channel */
-       cohc->completed = cohd_fin->desc.cookie;
+       dma_cookie_complete(&cohd_fin->desc);
 
        /* release the lli allocation and remove the descriptor */
        coh901318_lli_free(&cohc->base->pool, &cohd_fin->lli);
@@ -929,7 +915,7 @@ static int coh901318_alloc_chan_resources(struct dma_chan *chan)
        coh901318_config(cohc, NULL);
 
        cohc->allocated = 1;
-       cohc->completed = chan->cookie = 1;
+       chan->completed_cookie = chan->cookie = 1;
 
        spin_unlock_irqrestore(&cohc->lock, flags);
 
@@ -966,16 +952,16 @@ coh901318_tx_submit(struct dma_async_tx_descriptor *tx)
                                                   desc);
        struct coh901318_chan *cohc = to_coh901318_chan(tx->chan);
        unsigned long flags;
+       dma_cookie_t cookie;
 
        spin_lock_irqsave(&cohc->lock, flags);
-
-       tx->cookie = coh901318_assign_cookie(cohc, cohd);
+       cookie = dma_cookie_assign(tx);
 
        coh901318_desc_queue(cohc, cohd);
 
        spin_unlock_irqrestore(&cohc->lock, flags);
 
-       return tx->cookie;
+       return cookie;
 }
 
 static struct dma_async_tx_descriptor *
@@ -1034,7 +1020,7 @@ coh901318_prep_memcpy(struct dma_chan *chan, dma_addr_t dest, dma_addr_t src,
 
 static struct dma_async_tx_descriptor *
 coh901318_prep_slave_sg(struct dma_chan *chan, struct scatterlist *sgl,
-                       unsigned int sg_len, enum dma_data_direction direction,
+                       unsigned int sg_len, enum dma_transfer_direction direction,
                        unsigned long flags)
 {
        struct coh901318_chan *cohc = to_coh901318_chan(chan);
@@ -1077,7 +1063,7 @@ coh901318_prep_slave_sg(struct dma_chan *chan, struct scatterlist *sgl,
        ctrl_last |= cohc->runtime_ctrl;
        ctrl |= cohc->runtime_ctrl;
 
-       if (direction == DMA_TO_DEVICE) {
+       if (direction == DMA_MEM_TO_DEV) {
                u32 tx_flags = COH901318_CX_CTRL_PRDD_SOURCE |
                        COH901318_CX_CTRL_SRC_ADDR_INC_ENABLE;
 
@@ -1085,7 +1071,7 @@ coh901318_prep_slave_sg(struct dma_chan *chan, struct scatterlist *sgl,
                ctrl_chained |= tx_flags;
                ctrl_last |= tx_flags;
                ctrl |= tx_flags;
-       } else if (direction == DMA_FROM_DEVICE) {
+       } else if (direction == DMA_DEV_TO_MEM) {
                u32 rx_flags = COH901318_CX_CTRL_PRDD_DEST |
                        COH901318_CX_CTRL_DST_ADDR_INC_ENABLE;
 
@@ -1165,17 +1151,12 @@ coh901318_tx_status(struct dma_chan *chan, dma_cookie_t cookie,
                 struct dma_tx_state *txstate)
 {
        struct coh901318_chan *cohc = to_coh901318_chan(chan);
-       dma_cookie_t last_used;
-       dma_cookie_t last_complete;
-       int ret;
-
-       last_complete = cohc->completed;
-       last_used = chan->cookie;
+       enum dma_status ret;
 
-       ret = dma_async_is_complete(cookie, last_complete, last_used);
+       ret = dma_cookie_status(chan, cookie, txstate);
+       /* FIXME: should be conditional on ret != DMA_SUCCESS? */
+       dma_set_residue(txstate, coh901318_get_bytes_left(chan));
 
-       dma_set_tx_state(txstate, last_complete, last_used,
-                        coh901318_get_bytes_left(chan));
        if (ret == DMA_IN_PROGRESS && cohc->stopped)
                ret = DMA_PAUSED;
 
@@ -1274,11 +1255,11 @@ static void coh901318_dma_set_runtimeconfig(struct dma_chan *chan,
        int i = 0;
 
        /* We only support mem to per or per to mem transfers */
-       if (config->direction == DMA_FROM_DEVICE) {
+       if (config->direction == DMA_DEV_TO_MEM) {
                addr = config->src_addr;
                addr_width = config->src_addr_width;
                maxburst = config->src_maxburst;
-       } else if (config->direction == DMA_TO_DEVICE) {
+       } else if (config->direction == DMA_MEM_TO_DEV) {
                addr = config->dst_addr;
                addr_width = config->dst_addr_width;
                maxburst = config->dst_maxburst;