]> Pileus Git - ~andy/linux/blobdiff - drivers/clocksource/sunxi_timer.c
Merge tag 'pci-v3.9-changes' of git://git.kernel.org/pub/scm/linux/kernel/git/helgaas/pci
[~andy/linux] / drivers / clocksource / sunxi_timer.c
index 6c2ed56e8b1414492a5727347884f9252157e21d..4086b9167159391d07418e0d8b75509779bad6df 100644 (file)
@@ -23,7 +23,7 @@
 #include <linux/of_address.h>
 #include <linux/of_irq.h>
 #include <linux/sunxi_timer.h>
-#include <linux/clk/sunxi.h>
+#include <linux/clk-provider.h>
 
 #define TIMER_CTL_REG          0x00
 #define TIMER_CTL_ENABLE               (1 << 0)
@@ -74,7 +74,6 @@ static int sunxi_clkevt_next_event(unsigned long evt,
 
 static struct clock_event_device sunxi_clockevent = {
        .name = "sunxi_tick",
-       .shift = 32,
        .rating = 300,
        .features = CLOCK_EVT_FEAT_PERIODIC | CLOCK_EVT_FEAT_ONESHOT,
        .set_mode = sunxi_clkevt_mode,
@@ -124,7 +123,7 @@ void __init sunxi_timer_init(void)
        if (irq <= 0)
                panic("Can't parse IRQ");
 
-       sunxi_init_clocks();
+       of_clk_init(NULL);
 
        clk = of_clk_get(node, 0);
        if (IS_ERR(clk))
@@ -154,14 +153,8 @@ void __init sunxi_timer_init(void)
        val = readl(timer_base + TIMER_CTL_REG);
        writel(val | TIMER_CTL_ENABLE, timer_base + TIMER_CTL_REG);
 
-       sunxi_clockevent.mult = div_sc(rate / TIMER_SCAL,
-                               NSEC_PER_SEC,
-                               sunxi_clockevent.shift);
-       sunxi_clockevent.max_delta_ns = clockevent_delta2ns(0xff,
-                                                           &sunxi_clockevent);
-       sunxi_clockevent.min_delta_ns = clockevent_delta2ns(0x1,
-                                                           &sunxi_clockevent);
        sunxi_clockevent.cpumask = cpumask_of(0);
 
-       clockevents_register_device(&sunxi_clockevent);
+       clockevents_config_and_register(&sunxi_clockevent, rate / TIMER_SCAL,
+                                       0x1, 0xff);
 }