Merge branches 'cleanup-udc' and 'cleanup-dma' into cleanup

[~andy/linux] / drivers / clocksource / sh_mtu2.c

diff --git a/drivers/clocksource/sh_mtu2.c b/drivers/clocksource/sh_mtu2.c
index a2172f6904180fd9f30d63cfd3cab2448ab9c856..d9b76ca64a611327c0ea79d979482f638e3c14d3 100644 (file)
--- a/drivers/clocksource/sh_mtu2.c
+++ b/drivers/clocksource/sh_mtu2.c
@@ -43,7 +43,7 @@ struct sh_mtu2_priv {
        struct clock_event_device ced;
 };
 
-static DEFINE_SPINLOCK(sh_mtu2_lock);
+static DEFINE_RAW_SPINLOCK(sh_mtu2_lock);
 
 #define TSTR -1 /* shared register */
 #define TCR  0 /* channel register */
@@ -107,7 +107,7 @@ static void sh_mtu2_start_stop_ch(struct sh_mtu2_priv *p, int start)
        unsigned long flags, value;
 
        /* start stop register shared by multiple timer channels */
-       spin_lock_irqsave(&sh_mtu2_lock, flags);
+       raw_spin_lock_irqsave(&sh_mtu2_lock, flags);
        value = sh_mtu2_read(p, TSTR);
 
        if (start)
@@ -116,7 +116,7 @@ static void sh_mtu2_start_stop_ch(struct sh_mtu2_priv *p, int start)
                value &= ~(1 << cfg->timer_bit);
 
        sh_mtu2_write(p, TSTR, value);
-       spin_unlock_irqrestore(&sh_mtu2_lock, flags);
+       raw_spin_unlock_irqrestore(&sh_mtu2_lock, flags);
 }
 
 static int sh_mtu2_enable(struct sh_mtu2_priv *p)