Merge tag 'clk-for-linus-3.12' of git://git.linaro.org/people/mturquette/linux

[~andy/linux] / drivers / clk / tegra / clk-tegra114.c

diff --git a/drivers/clk/tegra/clk-tegra114.c b/drivers/clk/tegra/clk-tegra114.c
index 806d80366c543707db13e10a873815ce2d1ed5df..9467da7dee4918a60762700442d9685fc658ab3c 100644 (file)
--- a/drivers/clk/tegra/clk-tegra114.c
+++ b/drivers/clk/tegra/clk-tegra114.c
@@ -1566,7 +1566,8 @@ static void __init tegra114_audio_clk_init(void __iomem *clk_base)
 
        /* audio0 */
        clk = clk_register_mux(NULL, "audio0_mux", mux_audio_sync_clk,
-                              ARRAY_SIZE(mux_audio_sync_clk), 0,
+                              ARRAY_SIZE(mux_audio_sync_clk),
+                              CLK_SET_RATE_NO_REPARENT,
                               clk_base + AUDIO_SYNC_CLK_I2S0, 0, 3, 0,
                               NULL);
        clks[audio0_mux] = clk;
@@ -1578,7 +1579,8 @@ static void __init tegra114_audio_clk_init(void __iomem *clk_base)
 
        /* audio1 */
        clk = clk_register_mux(NULL, "audio1_mux", mux_audio_sync_clk,
-                              ARRAY_SIZE(mux_audio_sync_clk), 0,
+                              ARRAY_SIZE(mux_audio_sync_clk),
+                              CLK_SET_RATE_NO_REPARENT,
                               clk_base + AUDIO_SYNC_CLK_I2S1, 0, 3, 0,
                               NULL);
        clks[audio1_mux] = clk;
@@ -1590,7 +1592,8 @@ static void __init tegra114_audio_clk_init(void __iomem *clk_base)
 
        /* audio2 */
        clk = clk_register_mux(NULL, "audio2_mux", mux_audio_sync_clk,
-                              ARRAY_SIZE(mux_audio_sync_clk), 0,
+                              ARRAY_SIZE(mux_audio_sync_clk),
+                              CLK_SET_RATE_NO_REPARENT,
                               clk_base + AUDIO_SYNC_CLK_I2S2, 0, 3, 0,
                               NULL);
        clks[audio2_mux] = clk;
@@ -1602,7 +1605,8 @@ static void __init tegra114_audio_clk_init(void __iomem *clk_base)
 
        /* audio3 */
        clk = clk_register_mux(NULL, "audio3_mux", mux_audio_sync_clk,
-                              ARRAY_SIZE(mux_audio_sync_clk), 0,
+                              ARRAY_SIZE(mux_audio_sync_clk),
+                              CLK_SET_RATE_NO_REPARENT,
                               clk_base + AUDIO_SYNC_CLK_I2S3, 0, 3, 0,
                               NULL);
        clks[audio3_mux] = clk;
@@ -1614,7 +1618,8 @@ static void __init tegra114_audio_clk_init(void __iomem *clk_base)
 
        /* audio4 */
        clk = clk_register_mux(NULL, "audio4_mux", mux_audio_sync_clk,
-                              ARRAY_SIZE(mux_audio_sync_clk), 0,
+                              ARRAY_SIZE(mux_audio_sync_clk),
+                              CLK_SET_RATE_NO_REPARENT,
                               clk_base + AUDIO_SYNC_CLK_I2S4, 0, 3, 0,
                               NULL);
        clks[audio4_mux] = clk;
@@ -1626,7 +1631,8 @@ static void __init tegra114_audio_clk_init(void __iomem *clk_base)
 
        /* spdif */
        clk = clk_register_mux(NULL, "spdif_mux", mux_audio_sync_clk,
-                              ARRAY_SIZE(mux_audio_sync_clk), 0,
+                              ARRAY_SIZE(mux_audio_sync_clk),
+                              CLK_SET_RATE_NO_REPARENT,
                               clk_base + AUDIO_SYNC_CLK_SPDIF, 0, 3, 0,
                               NULL);
        clks[spdif_mux] = clk;
@@ -1721,7 +1727,8 @@ static void __init tegra114_pmc_clk_init(void __iomem *pmc_base)
 
        /* clk_out_1 */
        clk = clk_register_mux(NULL, "clk_out_1_mux", clk_out1_parents,
-                              ARRAY_SIZE(clk_out1_parents), 0,
+                              ARRAY_SIZE(clk_out1_parents),
+                              CLK_SET_RATE_NO_REPARENT,
                               pmc_base + PMC_CLK_OUT_CNTRL, 6, 3, 0,
                               &clk_out_lock);
        clks[clk_out_1_mux] = clk;
@@ -1733,7 +1740,8 @@ static void __init tegra114_pmc_clk_init(void __iomem *pmc_base)
 
        /* clk_out_2 */
        clk = clk_register_mux(NULL, "clk_out_2_mux", clk_out2_parents,
-                              ARRAY_SIZE(clk_out2_parents), 0,
+                              ARRAY_SIZE(clk_out2_parents),
+                              CLK_SET_RATE_NO_REPARENT,
                               pmc_base + PMC_CLK_OUT_CNTRL, 14, 3, 0,
                               &clk_out_lock);
        clks[clk_out_2_mux] = clk;
@@ -1745,7 +1753,8 @@ static void __init tegra114_pmc_clk_init(void __iomem *pmc_base)
 
        /* clk_out_3 */
        clk = clk_register_mux(NULL, "clk_out_3_mux", clk_out3_parents,
-                              ARRAY_SIZE(clk_out3_parents), 0,
+                              ARRAY_SIZE(clk_out3_parents),
+                              CLK_SET_RATE_NO_REPARENT,
                               pmc_base + PMC_CLK_OUT_CNTRL, 22, 3, 0,
                               &clk_out_lock);
        clks[clk_out_3_mux] = clk;
@@ -2063,7 +2072,8 @@ static __init void tegra114_periph_clk_init(void __iomem *clk_base)
 
        /* dsia */
        clk = clk_register_mux(NULL, "dsia_mux", mux_plld_out0_plld2_out0,
-                              ARRAY_SIZE(mux_plld_out0_plld2_out0), 0,
+                              ARRAY_SIZE(mux_plld_out0_plld2_out0),
+                              CLK_SET_RATE_NO_REPARENT,
                               clk_base + PLLD_BASE, 25, 1, 0, &pll_d_lock);
        clks[dsia_mux] = clk;
        clk = tegra_clk_register_periph_gate("dsia", "dsia_mux", 0, clk_base,
@@ -2073,7 +2083,8 @@ static __init void tegra114_periph_clk_init(void __iomem *clk_base)
 
        /* dsib */
        clk = clk_register_mux(NULL, "dsib_mux", mux_plld_out0_plld2_out0,
-                              ARRAY_SIZE(mux_plld_out0_plld2_out0), 0,
+                              ARRAY_SIZE(mux_plld_out0_plld2_out0),
+                              CLK_SET_RATE_NO_REPARENT,
                               clk_base + PLLD2_BASE, 25, 1, 0, &pll_d2_lock);
        clks[dsib_mux] = clk;
        clk = tegra_clk_register_periph_gate("dsib", "dsib_mux", 0, clk_base,
@@ -2110,7 +2121,8 @@ static __init void tegra114_periph_clk_init(void __iomem *clk_base)
 
        /* emc */
        clk = clk_register_mux(NULL, "emc_mux", mux_pllmcp_clkm,
-                              ARRAY_SIZE(mux_pllmcp_clkm), 0,
+                              ARRAY_SIZE(mux_pllmcp_clkm),
+                              CLK_SET_RATE_NO_REPARENT,
                               clk_base + CLK_SOURCE_EMC,
                               29, 3, 0, NULL);
        clk = tegra_clk_register_periph_gate("emc", "emc_mux", 0, clk_base,
@@ -2194,7 +2206,7 @@ static const struct of_device_id pmc_match[] __initconst = {
  * dfll_soc/dfll_ref apparently must be kept enabled, otherwise I2C5
  * breaks
  */
-static __initdata struct tegra_clk_init_table init_table[] = {
+static struct tegra_clk_init_table init_table[] __initdata = {
        {uarta, pll_p, 408000000, 0},
        {uartb, pll_p, 408000000, 0},
        {uartc, pll_p, 408000000, 0},