]> Pileus Git - ~andy/linux/blobdiff - arch/x86/lib/delay_64.c
x86: explicitly use edx in const delay function.
[~andy/linux] / arch / x86 / lib / delay_64.c
index 45cdd3fbd91c514f38e2c2782f7dbc0dcecd8e90..ff3dfecdb6f9c49589155771c02b8359a08ae3ec 100644 (file)
 
 #include <linux/module.h>
 #include <linux/sched.h>
+#include <linux/timex.h>
 #include <linux/preempt.h>
 #include <linux/delay.h>
+#include <linux/init.h>
 
 #include <asm/delay.h>
 #include <asm/msr.h>
 #include <asm/smp.h>
 #endif
 
-int read_current_timer(unsigned long *timer_value)
+/* simple loop based delay: */
+static void delay_loop(unsigned long loops)
 {
-       rdtscll(*timer_value);
-       return 0;
+       asm volatile(
+               "       test %0,%0      \n"
+               "       jz 3f           \n"
+               "       jmp 1f          \n"
+
+               ".align 16              \n"
+               "1:     jmp 2f          \n"
+
+               ".align 16              \n"
+               "2:     dec %0          \n"
+               "       jnz 2b          \n"
+               "3:     dec %0          \n"
+
+               : /* we don't need output */
+               :"a" (loops)
+       );
 }
 
-void __delay(unsigned long loops)
+static void delay_tsc(unsigned long loops)
 {
        unsigned bclock, now;
+       int cpu;
 
-       preempt_disable();              /* TSC's are pre-cpu */
+       preempt_disable();
+       cpu = smp_processor_id();
        rdtscl(bclock);
-       do {
-               rep_nop(); 
+       for (;;) {
                rdtscl(now);
+               if ((now - bclock) >= loops)
+                       break;
+
+               /* Allow RT tasks to run */
+               preempt_enable();
+               rep_nop();
+               preempt_disable();
+
+               /*
+                * It is possible that we moved to another CPU, and
+                * since TSC's are per-cpu we need to calculate
+                * that. The delay must guarantee that we wait "at
+                * least" the amount of time. Being moved to another
+                * CPU could make the wait longer but we just need to
+                * make sure we waited long enough. Rebalance the
+                * counter for this CPU.
+                */
+               if (unlikely(cpu != smp_processor_id())) {
+                       loops -= (now - bclock);
+                       cpu = smp_processor_id();
+                       rdtscl(bclock);
+               }
        }
-       while ((now-bclock) < loops);
        preempt_enable();
 }
+
+static void (*delay_fn)(unsigned long) = delay_loop;
+
+void use_tsc_delay(void)
+{
+       delay_fn = delay_tsc;
+}
+
+int __devinit read_current_timer(unsigned long *timer_value)
+{
+       if (delay_fn == delay_tsc) {
+               rdtscll(*timer_value);
+               return 0;
+       }
+       return -1;
+}
+
+void __delay(unsigned long loops)
+{
+       delay_fn(loops);
+}
 EXPORT_SYMBOL(__delay);
 
 inline void __const_udelay(unsigned long xloops)
 {
-       __delay(((xloops * HZ *
-               cpu_data(raw_smp_processor_id()).loops_per_jiffy) >> 32) + 1);
+       int d0;
+       xloops *= 4;
+       __asm__("mull %%edx"
+               :"=d" (xloops), "=&a" (d0)
+               :"1" (xloops), "0"
+               (cpu_data(raw_smp_processor_id()).loops_per_jiffy * (HZ/4)));
+
+       __delay(++xloops);
 }
+
 EXPORT_SYMBOL(__const_udelay);
 
 void __udelay(unsigned long usecs)