]> Pileus Git - ~andy/linux/blobdiff - arch/x86/kernel/apic/apic.c
Merge branch 'linus' into x86/urgent
[~andy/linux] / arch / x86 / kernel / apic / apic.c
index 159740decc41c4e9296208fd06c0912380fb9d90..a58ef98be1557164860c689473eb1b6959fc7b18 100644 (file)
@@ -36,6 +36,7 @@
 #include <linux/mm.h>
 
 #include <asm/perf_counter.h>
+#include <asm/x86_init.h>
 #include <asm/pgalloc.h>
 #include <asm/atomic.h>
 #include <asm/mpspec.h>
@@ -61,7 +62,7 @@ unsigned int boot_cpu_physical_apicid = -1U;
 /*
  * The highest APIC ID seen during enumeration.
  *
- * This determines the messaging protocol we can use: if all APIC IDs
+ * On AMD, this determines the messaging protocol we can use: if all APIC IDs
  * are in the 0 ... 7 range, then we can use logical addressing which
  * has some performance advantages (better broadcasting).
  *
@@ -978,7 +979,7 @@ void lapic_shutdown(void)
 {
        unsigned long flags;
 
-       if (!cpu_has_apic)
+       if (!cpu_has_apic && !apic_from_smp_config())
                return;
 
        local_irq_save(flags);
@@ -1196,8 +1197,7 @@ void __cpuinit setup_local_APIC(void)
         * Double-check whether this APIC is really registered.
         * This is meaningless in clustered apic mode, so we skip it.
         */
-       if (!apic->apic_id_registered())
-               BUG();
+       BUG_ON(!apic->apic_id_registered());
 
        /*
         * Intel recommends to set DFR, LDR and TPR before enabling
@@ -1709,7 +1709,7 @@ int __init APIC_init_uniprocessor(void)
        localise_nmi_watchdog();
 #endif
 
-       setup_boot_clock();
+       x86_init.timers.setup_percpu_clockev();
 #ifdef CONFIG_X86_64
        check_nmi_watchdog();
 #endif
@@ -1916,24 +1916,14 @@ void __cpuinit generic_processor_info(int apicid, int version)
                max_physical_apicid = apicid;
 
 #ifdef CONFIG_X86_32
-       /*
-        * Would be preferable to switch to bigsmp when CONFIG_HOTPLUG_CPU=y
-        * but we need to work other dependencies like SMP_SUSPEND etc
-        * before this can be done without some confusion.
-        * if (CPU_HOTPLUG_ENABLED || num_processors > 8)
-        *       - Ashok Raj <ashok.raj@intel.com>
-        */
-       if (max_physical_apicid >= 8) {
-               switch (boot_cpu_data.x86_vendor) {
-               case X86_VENDOR_INTEL:
-                       if (!APIC_XAPIC(version)) {
-                               def_to_bigsmp = 0;
-                               break;
-                       }
-                       /* If P4 and above fall through */
-               case X86_VENDOR_AMD:
+       switch (boot_cpu_data.x86_vendor) {
+       case X86_VENDOR_INTEL:
+               if (num_processors > 8)
+                       def_to_bigsmp = 1;
+               break;
+       case X86_VENDOR_AMD:
+               if (max_physical_apicid >= 8)
                        def_to_bigsmp = 1;
-               }
        }
 #endif