Merge branch 'fixes' of git://git.linaro.org/people/rmk/linux-arm

[~andy/linux] / arch / x86 / kernel / amd_nb.c

diff --git a/arch/x86/kernel/amd_nb.c b/arch/x86/kernel/amd_nb.c
index 3048ded1b5983a9a3e7f511fc30066f672721383..59554dca96ec8945c1d7f514a1281e06c6e7e771 100644 (file)
--- a/arch/x86/kernel/amd_nb.c
+++ b/arch/x86/kernel/amd_nb.c
@@ -20,6 +20,7 @@ const struct pci_device_id amd_nb_misc_ids[] = {
        { PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_10H_NB_MISC) },
        { PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_15H_NB_F3) },
        { PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_15H_M10H_F3) },
+       { PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_15H_M30H_NB_F3) },
        { PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_16H_NB_F3) },
        {}
 };
@@ -27,6 +28,7 @@ EXPORT_SYMBOL(amd_nb_misc_ids);
 
 static const struct pci_device_id amd_nb_link_ids[] = {
        { PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_15H_NB_F4) },
+       { PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_15H_M30H_NB_F4) },
        { PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_16H_NB_F4) },
        {}
 };
@@ -81,12 +83,19 @@ int amd_cache_northbridges(void)
                        next_northbridge(misc, amd_nb_misc_ids);
                node_to_amd_nb(i)->link = link =
                        next_northbridge(link, amd_nb_link_ids);
-        }
+       }
 
+       /* GART present only on Fam15h upto model 0fh */
        if (boot_cpu_data.x86 == 0xf || boot_cpu_data.x86 == 0x10 ||
-           boot_cpu_data.x86 == 0x15)
+           (boot_cpu_data.x86 == 0x15 && boot_cpu_data.x86_model < 0x10))
                amd_northbridges.flags |= AMD_NB_GART;
 
+       /*
+        * Check for L3 cache presence.
+        */
+       if (!cpuid_edx(0x80000006))
+               return 0;
+
        /*
         * Some CPU families support L3 Cache Index Disable. There are some
         * limitations because of E382 and E388 on family 0x10.