clock-frequency = <0>; /* Filled in by zImage */
SDRAM0: sdram {
- device_type = "memory-controller";
compatible = "ibm,sdram-440epx", "ibm,sdram-44x-ddr2denali";
dcr-reg = <010 2>;
};
MAL0: mcmal {
compatible = "ibm,mcmal-440epx", "ibm,mcmal2";
dcr-reg = <180 62>;
- num-tx-chans = <4>;
- num-rx-chans = <4>;
+ num-tx-chans = <2>;
+ num-rx-chans = <2>;
interrupt-parent = <&MAL0>;
interrupts = <0 1 2 3 4>;
#interrupt-cells = <1>;
interrupt-map-mask = <ffffffff>;
};
+ USB1: usb@e0000400 {
+ compatible = "ohci-be";
+ reg = <0 e0000400 60>;
+ interrupt-parent = <&UIC0>;
+ interrupts = <15 8>;
+ };
+
POB0: opb {
compatible = "ibm,opb-440epx", "ibm,opb";
#address-cells = <1>;
interrupt-parent = <&UIC1>;
nor_flash@0,0 {
- device_type = "rom";
- compatible = "direct-mapped";
- probe-type = "CFI";
+ compatible = "amd,s29gl256n", "cfi-flash";
bank-width = <2>;
- partitions = < 0 180000
- 180000 200000
- 380000 3aa0000
- 3e20000 140000
- 3f60000 40000
- 3fa0000 60000>;
- partition-names = "Kernel", "ramdisk", "file system",
- "kozio", "env", "u-boot";
reg = <0 000000 4000000>;
+ #address-cells = <1>;
+ #size-cells = <1>;
+ partition@0 {
+ label = "Kernel";
+ reg = <0 180000>;
+ };
+ partition@180000 {
+ label = "ramdisk";
+ reg = <180000 200000>;
+ };
+ partition@380000 {
+ label = "file system";
+ reg = <380000 3aa0000>;
+ };
+ partition@3e20000 {
+ label = "kozio";
+ reg = <3e20000 140000>;
+ };
+ partition@3f60000 {
+ label = "env";
+ reg = <3f60000 40000>;
+ };
+ partition@3fa0000 {
+ label = "u-boot";
+ reg = <3fa0000 60000>;
+ };
};
};
reg = <ef600d00 c>;
};
+ RGMII0: emac-rgmii@ef601000 {
+ device_type = "rgmii-interface";
+ compatible = "ibm,rgmii-440epx", "ibm,rgmii";
+ reg = <ef601000 8>;
+ has-mdio;
+ };
+
EMAC0: ethernet@ef600e00 {
linux,network-index = <0>;
device_type = "network";
reg = <ef600e00 70>;
local-mac-address = [000000000000];
mal-device = <&MAL0>;
- mal-tx-channel = <0 1>;
+ mal-tx-channel = <0>;
mal-rx-channel = <0>;
cell-index = <0>;
max-frame-size = <5dc>;
rx-fifo-size = <1000>;
tx-fifo-size = <800>;
- phy-mode = "rmii";
+ phy-mode = "rgmii";
phy-map = <00000000>;
zmii-device = <&ZMII0>;
zmii-channel = <0>;
+ rgmii-device = <&RGMII0>;
+ rgmii-channel = <0>;
+ has-inverted-stacr-oc;
+ has-new-stacr-staopc;
};
EMAC1: ethernet@ef600f00 {
reg = <ef600f00 70>;
local-mac-address = [000000000000];
mal-device = <&MAL0>;
- mal-tx-channel = <2 3>;
+ mal-tx-channel = <1>;
mal-rx-channel = <1>;
cell-index = <1>;
max-frame-size = <5dc>;
rx-fifo-size = <1000>;
tx-fifo-size = <800>;
- phy-mode = "rmii";
+ phy-mode = "rgmii";
phy-map = <00000000>;
zmii-device = <&ZMII0>;
zmii-channel = <1>;
+ rgmii-device = <&RGMII0>;
+ rgmii-channel = <1>;
+ has-inverted-stacr-oc;
+ has-new-stacr-staopc;
};
};
+
+ PCI0: pci@1ec000000 {
+ device_type = "pci";
+ #interrupt-cells = <1>;
+ #size-cells = <2>;
+ #address-cells = <3>;
+ compatible = "ibm,plb440epx-pci", "ibm,plb-pci";
+ primary;
+ reg = <1 eec00000 8 /* Config space access */
+ 1 eed00000 4 /* IACK */
+ 1 eed00000 4 /* Special cycle */
+ 1 ef400000 40>; /* Internal registers */
+
+ /* Outbound ranges, one memory and one IO,
+ * later cannot be changed. Chip supports a second
+ * IO range but we don't use it for now
+ */
+ ranges = <02000000 0 80000000 1 80000000 0 10000000
+ 01000000 0 00000000 1 e8000000 0 00100000>;
+
+ /* Inbound 2GB range starting at 0 */
+ dma-ranges = <42000000 0 0 0 0 0 80000000>;
+
+ /* All PCI interrupts are routed to IRQ 67 */
+ interrupt-map-mask = <0000 0 0 0>;
+ interrupt-map = < 0000 0 0 0 &UIC2 3 8 >;
+ };
};
chosen {