Merge branch 'for-linus' of git://linux-nfs.org/~bfields/linux

[~andy/linux] / arch / parisc / mm / init.c

diff --git a/arch/parisc/mm/init.c b/arch/parisc/mm/init.c
index 8a3b71a26fde47f2e4e913cf8f90ad9f19f94e46..eb80f5e33d7dad11b2cb11b9e8a2b9136c0863dc 100644 (file)
--- a/arch/parisc/mm/init.c
+++ b/arch/parisc/mm/init.c
@@ -78,12 +78,11 @@ static void __init mem_limit_func(void)
 {
        char *cp, *end;
        unsigned long limit;
-       extern char saved_command_line[];
 
        /* We need this before __setup() functions are called */
 
        limit = MAX_MEM;
-       for (cp = saved_command_line; *cp; ) {
+       for (cp = boot_command_line; *cp; ) {
                if (memcmp(cp, "mem=", 4) == 0) {
                        cp += 4;
                        limit = memparse(cp, &end);
@@ -316,11 +315,13 @@ static void __init setup_bootmem(void)
 #define PDC_CONSOLE_IO_IODC_SIZE 32768
 
        reserve_bootmem_node(NODE_DATA(0), 0UL,
-                       (unsigned long)(PAGE0->mem_free + PDC_CONSOLE_IO_IODC_SIZE));
+                       (unsigned long)(PAGE0->mem_free +
+                               PDC_CONSOLE_IO_IODC_SIZE), BOOTMEM_DEFAULT);
        reserve_bootmem_node(NODE_DATA(0), __pa((unsigned long)_text),
-                       (unsigned long)(_end - _text));
+                       (unsigned long)(_end - _text), BOOTMEM_DEFAULT);
        reserve_bootmem_node(NODE_DATA(0), (bootmap_start_pfn << PAGE_SHIFT),
-                       ((bootmap_pfn - bootmap_start_pfn) << PAGE_SHIFT));
+                       ((bootmap_pfn - bootmap_start_pfn) << PAGE_SHIFT),
+                       BOOTMEM_DEFAULT);
 
 #ifndef CONFIG_DISCONTIGMEM
 
@@ -329,7 +330,8 @@ static void __init setup_bootmem(void)
        for (i = 0; i < npmem_holes; i++) {
                reserve_bootmem_node(NODE_DATA(0),
                                (pmem_holes[i].start_pfn << PAGE_SHIFT),
-                               (pmem_holes[i].pages << PAGE_SHIFT));
+                               (pmem_holes[i].pages << PAGE_SHIFT),
+                               BOOTMEM_DEFAULT);
        }
 #endif
 
@@ -347,7 +349,8 @@ static void __init setup_bootmem(void)
                        initrd_below_start_ok = 1;
                        printk(KERN_INFO "initrd: reserving %08lx-%08lx (mem_max %08lx)\n", __pa(initrd_start), __pa(initrd_start) + initrd_reserve, mem_max);
 
-                       reserve_bootmem_node(NODE_DATA(0),__pa(initrd_start), initrd_reserve);
+                       reserve_bootmem_node(NODE_DATA(0), __pa(initrd_start),
+                                       initrd_reserve, BOOTMEM_DEFAULT);
                }
        }
 #endif
@@ -608,7 +611,7 @@ void show_mem(void)
 
                                printk("Zone list for zone %d on node %d: ", j, i);
                                for (k = 0; zl->zones[k] != NULL; k++) 
-                                       printk("[%ld/%s] ", zone_to_nid(zl->zones[k]), zl->zones[k]->name);
+                                       printk("[%d/%s] ", zone_to_nid(zl->zones[k]), zl->zones[k]->name);
                                printk("\n");
                        }
                }
@@ -868,9 +871,7 @@ void __init paging_init(void)
        for (i = 0; i < npmem_ranges; i++) {
                unsigned long zones_size[MAX_NR_ZONES] = { 0, };
 
-               /* We have an IOMMU, so all memory can go into a single
-                  ZONE_DMA zone. */
-               zones_size[ZONE_DMA] = pmem_ranges[i].pages;
+               zones_size[ZONE_NORMAL] = pmem_ranges[i].pages;
 
 #ifdef CONFIG_DISCONTIGMEM
                /* Need to initialize the pfnnid_map before we can initialize
@@ -893,7 +894,7 @@ void __init paging_init(void)
 #ifdef CONFIG_PA20
 
 /*
- * Currently, all PA20 chips have 18 bit protection id's, which is the
+ * Currently, all PA20 chips have 18 bit protection IDs, which is the
  * limiting factor (space ids are 32 bits).
  */
 
@@ -902,10 +903,10 @@ void __init paging_init(void)
 #else
 
 /*
- * Currently we have a one-to-one relationship between space id's and
- * protection id's. Older parisc chips (PCXS, PCXT, PCXL, PCXL2) only
- * support 15 bit protection id's, so that is the limiting factor.
- * PCXT' has 18 bit protection id's, but only 16 bit spaceids, so it's
+ * Currently we have a one-to-one relationship between space IDs and
+ * protection IDs. Older parisc chips (PCXS, PCXT, PCXL, PCXL2) only
+ * support 15 bit protection IDs, so that is the limiting factor.
+ * PCXT' has 18 bit protection IDs, but only 16 bit spaceids, so it's
  * probably not worth the effort for a special case here.
  */