]> Pileus Git - ~andy/linux/blobdiff - arch/parisc/kernel/entry.S
parisc: Set correct bit in protection flags
[~andy/linux] / arch / parisc / kernel / entry.S
index ae3e70cd1e14e4acf2da03717d77d0b9ea0d7faa..e552e547cb93fd88050ee800d62f2f2667b3ba5d 100644 (file)
         * on most of those machines only handles cache transactions.
         */
        extrd,u,*=      \pte,_PAGE_NO_CACHE_BIT+32,1,%r0
-       dep           1,12,1,\prot
+       depdi           1,12,1,\prot
 
        /* Drop prot bits and convert to page addr for iitlbt and idtlbt */
        convert_for_tlb_insert20 \pte