[MIPS] Sibyte: Fix ZBbus profiler

[~andy/linux] / arch / mips / sibyte / Kconfig

diff --git a/arch/mips/sibyte/Kconfig b/arch/mips/sibyte/Kconfig
index de46f62ac46291c28af5d1d05fcc6ef5d3baa1a7..bdf24a7b54941ce75132b83adc6861695e15b819 100644 (file)
--- a/arch/mips/sibyte/Kconfig
+++ b/arch/mips/sibyte/Kconfig
@@ -1,40 +1,48 @@
 config SIBYTE_SB1250
        bool
        select HW_HAS_PCI
-       select SIBYTE_HAS_LDT
+       select SIBYTE_ENABLE_LDT_IF_PCI
        select SIBYTE_SB1xxx_SOC
+       select SYS_SUPPORTS_SMP
 
 config SIBYTE_BCM1120
        bool
        select SIBYTE_BCM112X
+       select SIBYTE_HAS_ZBUS_PROFILING
        select SIBYTE_SB1xxx_SOC
 
 config SIBYTE_BCM1125
        bool
        select HW_HAS_PCI
        select SIBYTE_BCM112X
+       select SIBYTE_HAS_ZBUS_PROFILING
        select SIBYTE_SB1xxx_SOC
 
 config SIBYTE_BCM1125H
        bool
        select HW_HAS_PCI
        select SIBYTE_BCM112X
-       select SIBYTE_HAS_LDT
+       select SIBYTE_ENABLE_LDT_IF_PCI
+       select SIBYTE_HAS_ZBUS_PROFILING
        select SIBYTE_SB1xxx_SOC
 
 config SIBYTE_BCM112X
        bool
        select SIBYTE_SB1xxx_SOC
+       select SIBYTE_HAS_ZBUS_PROFILING
 
 config SIBYTE_BCM1x80
        bool
        select HW_HAS_PCI
        select SIBYTE_SB1xxx_SOC
+       select SYS_SUPPORTS_SMP
 
 config SIBYTE_BCM1x55
        bool
        select HW_HAS_PCI
        select SIBYTE_SB1xxx_SOC
+       select SIBYTE_HAS_ZBUS_PROFILING
+       select SYS_SUPPORTS_SMP
 
 config SIBYTE_SB1xxx_SOC
        bool
@@ -92,8 +100,10 @@ config CPU_SB1_PASS_2
 
 config SIBYTE_HAS_LDT
        bool
-       depends on PCI && (SIBYTE_SB1250 || SIBYTE_BCM1125H)
-       default y
+
+config SIBYTE_ENABLE_LDT_IF_PCI
+       bool
+       select SIBYTE_HAS_LDT if PCI
 
 config SIMULATION
        bool "Running under simulation"
@@ -102,17 +112,18 @@ config SIMULATION
          Build a kernel suitable for running under the GDB simulator.
          Primarily adjusts the kernel's notion of time.
 
-config CONFIG_SB1_CEX_ALWAYS_FATAL
+config SB1_CEX_ALWAYS_FATAL
        bool "All cache exceptions considered fatal (no recovery attempted)"
        depends on SIBYTE_SB1xxx_SOC
 
-config CONFIG_SB1_CERR_STALL
+config SB1_CERR_STALL
        bool "Stall (rather than panic) on fatal cache error"
        depends on SIBYTE_SB1xxx_SOC
 
 config SIBYTE_CFE
        bool "Booting from CFE"
        depends on SIBYTE_SB1xxx_SOC
+       select SYS_HAS_EARLY_PRINTK
        help
          Make use of the CFE API for enumerating available memory,
          controlling secondary CPUs, and possibly console output.
@@ -128,6 +139,7 @@ config SIBYTE_CFE_CONSOLE
 config SIBYTE_STANDALONE
        bool
        depends on SIBYTE_SB1xxx_SOC && !SIBYTE_CFE
+       select SYS_HAS_EARLY_PRINTK
        default y
 
 config SIBYTE_STANDALONE_RAM_SIZE
@@ -157,5 +169,8 @@ config SIBYTE_SB1250_PROF
        depends on SIBYTE_SB1xxx_SOC
 
 config SIBYTE_TBPROF
-       bool "Support for ZBbus profiling"
-       depends on SIBYTE_SB1xxx_SOC
+       tristate "Support for ZBbus profiling"
+       depends on SIBYTE_HAS_ZBUS_PROFILING
+
+config SIBYTE_HAS_ZBUS_PROFILING
+       bool