Merge branch 'for-3.11-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/tj...

[~andy/linux] / arch / mips / cavium-octeon / setup.c

diff --git a/arch/mips/cavium-octeon/setup.c b/arch/mips/cavium-octeon/setup.c
index 01b1b3f94feb77b115f6911771236961ff3e151c..48b08eb9d9e4bd29dc97f5ec97c3f763852ff4aa 100644 (file)
--- a/arch/mips/cavium-octeon/setup.c
+++ b/arch/mips/cavium-octeon/setup.c
@@ -7,6 +7,7 @@
  * Copyright (C) 2008, 2009 Wind River Systems
  *   written by Ralf Baechle <ralf@linux-mips.org>
  */
+#include <linux/compiler.h>
 #include <linux/init.h>
 #include <linux/kernel.h>
 #include <linux/console.h>
@@ -40,12 +41,6 @@
 #include <asm/octeon/pci-octeon.h>
 #include <asm/octeon/cvmx-mio-defs.h>
 
-#ifdef CONFIG_CAVIUM_DECODE_RSL
-extern void cvmx_interrupt_rsl_decode(void);
-extern int __cvmx_interrupt_ecc_report_single_bit_errors;
-extern void cvmx_interrupt_rsl_enable(void);
-#endif
-
 extern struct plat_smp_ops octeon_smp_ops;
 
 #ifdef CONFIG_PCI
@@ -462,18 +457,6 @@ static void octeon_halt(void)
        octeon_kill_core(NULL);
 }
 
-/**
- * Handle all the error condition interrupts that might occur.
- *
- */
-#ifdef CONFIG_CAVIUM_DECODE_RSL
-static irqreturn_t octeon_rlm_interrupt(int cpl, void *dev_id)
-{
-       cvmx_interrupt_rsl_decode();
-       return IRQ_HANDLED;
-}
-#endif
-
 /**
  * Return a string representing the system type
  *
@@ -712,7 +695,7 @@ void __init prom_init(void)
        if (cvmx_read_csr(CVMX_L2D_FUS3) & (3ull << 34)) {
                pr_info("Skipping L2 locking due to reduced L2 cache size\n");
        } else {
-               uint32_t ebase = read_c0_ebase() & 0x3ffff000;
+               uint32_t __maybe_unused ebase = read_c0_ebase() & 0x3ffff000;
 #ifdef CONFIG_CAVIUM_OCTEON_LOCK_L2_TLB
                /* TLB refill */
                cvmx_l2c_lock_mem_region(ebase, 0x100);
@@ -996,7 +979,7 @@ void __init plat_mem_setup(void)
        cvmx_bootmem_unlock();
        /* Add the memory region for the kernel. */
        kernel_start = (unsigned long) _text;
-       kernel_size = ALIGN(_end - _text, 0x100000);
+       kernel_size = _end - _text;
 
        /* Adjust for physical offset. */
        kernel_start &= ~0xffffffff80000000ULL;
@@ -1064,15 +1047,6 @@ void prom_free_prom_memory(void)
                        panic("Core-14449 WAR not in place (%04x).\n"
                              "Please build kernel with proper options (CONFIG_CAVIUM_CN63XXP1).", insn);
        }
-#ifdef CONFIG_CAVIUM_DECODE_RSL
-       cvmx_interrupt_rsl_enable();
-
-       /* Add an interrupt handler for general failures. */
-       if (request_irq(OCTEON_IRQ_RML, octeon_rlm_interrupt, IRQF_SHARED,
-                       "RML/RSL", octeon_rlm_interrupt)) {
-               panic("Unable to request_irq(OCTEON_IRQ_RML)");
-       }
-#endif
 }
 
 int octeon_prune_device_tree(void);