spi/bfin_spi: redo GPIO CS handling

[~andy/linux] / arch / blackfin / include / asm / bfin5xx_spi.h

diff --git a/arch/blackfin/include/asm/bfin5xx_spi.h b/arch/blackfin/include/asm/bfin5xx_spi.h
index 126d25e2afa8edea7aaa6ccf5cde2dfa006de505..6f011dac378f9c2437d889321a2b47fc64b4b529 100644 (file)
--- a/arch/blackfin/include/asm/bfin5xx_spi.h
+++ b/arch/blackfin/include/asm/bfin5xx_spi.h
@@ -109,6 +109,8 @@
 #define CMD_SPI_GET_SYSTEMCLOCK   25
 #define CMD_SPI_SET_WRITECONTINUOUS     26
 
+#define MAX_CTRL_CS          8  /* cs in spi controller */
+
 /* device.platform_data for SSP controller devices */
 struct bfin5xx_spi_master {
        u16 num_chipselect;
@@ -124,7 +126,6 @@ struct bfin5xx_spi_chip {
        u8 enable_dma;
        u8 bits_per_word;
        u16 cs_chg_udelay; /* Some devices require 16-bit delays */
-       u32 cs_gpio;
        /* Value to send if no TX value is supplied, usually 0x0 or 0xFFFF */
        u16 idle_tx_val;
        u8 pio_interrupt; /* Enable spi data irq */