Merge branch 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/jikos/trivial

[~andy/linux] / arch / arm64 / kernel / kuser32.S

diff --git a/arch/arm64/kernel/kuser32.S b/arch/arm64/kernel/kuser32.S
index 8b69ecb1d8bc232a70ca16f24475d9aacb9597a2..63c48ffdf230125dedea62d631b3067f4d7a28e1 100644 (file)
--- a/arch/arm64/kernel/kuser32.S
+++ b/arch/arm64/kernel/kuser32.S
@@ -27,6 +27,9 @@
  *
  * See Documentation/arm/kernel_user_helpers.txt for formal definitions.
  */
+
+#include <asm/unistd32.h>
+
        .align  5
        .globl  __kuser_helper_start
 __kuser_helper_start:
@@ -35,33 +38,30 @@ __kuser_cmpxchg64:                  // 0xffff0f60
        .inst   0xe92d00f0              //      push            {r4, r5, r6, r7}
        .inst   0xe1c040d0              //      ldrd            r4, r5, [r0]
        .inst   0xe1c160d0              //      ldrd            r6, r7, [r1]
-       .inst   0xf57ff05f              //      dmb             sy
-       .inst   0xe1b20f9f              // 1:   ldrexd          r0, r1, [r2]
+       .inst   0xe1b20e9f              // 1:   ldaexd          r0, r1, [r2]
        .inst   0xe0303004              //      eors            r3, r0, r4
        .inst   0x00313005              //      eoreqs          r3, r1, r5
-       .inst   0x01a23f96              //      strexdeq        r3, r6, [r2]
+       .inst   0x01a23e96              //      stlexdeq        r3, r6, [r2]
        .inst   0x03330001              //      teqeq           r3, #1
        .inst   0x0afffff9              //      beq             1b
-       .inst   0xf57ff05f              //      dmb             sy
        .inst   0xe2730000              //      rsbs            r0, r3, #0
        .inst   0xe8bd00f0              //      pop             {r4, r5, r6, r7}
        .inst   0xe12fff1e              //      bx              lr
 
        .align  5
 __kuser_memory_barrier:                        // 0xffff0fa0
-       .inst   0xf57ff05f              //      dmb             sy
+       .inst   0xf57ff05b              //      dmb             ish
        .inst   0xe12fff1e              //      bx              lr
 
        .align  5
 __kuser_cmpxchg:                       // 0xffff0fc0
-       .inst   0xf57ff05f              //      dmb             sy
-       .inst   0xe1923f9f              // 1:   ldrex           r3, [r2]
+       .inst   0xe1923e9f              // 1:   ldaex           r3, [r2]
        .inst   0xe0533000              //      subs            r3, r3, r0
-       .inst   0x01823f91              //      strexeq r3, r1, [r2]
+       .inst   0x01823e91              //      stlexeq         r3, r1, [r2]
        .inst   0x03330001              //      teqeq           r3, #1
        .inst   0x0afffffa              //      beq             1b
        .inst   0xe2730000              //      rsbs            r0, r3, #0
-       .inst   0xeaffffef              //      b               <__kuser_memory_barrier>
+       .inst   0xe12fff1e              //      bx              lr
 
        .align  5
 __kuser_get_tls:                       // 0xffff0fe0
@@ -75,3 +75,42 @@ __kuser_helper_version:                      // 0xffff0ffc
        .word   ((__kuser_helper_end - __kuser_helper_start) >> 5)
        .globl  __kuser_helper_end
 __kuser_helper_end:
+
+/*
+ * AArch32 sigreturn code
+ *
+ * For ARM syscalls, the syscall number has to be loaded into r7.
+ * We do not support an OABI userspace.
+ *
+ * For Thumb syscalls, we also pass the syscall number via r7. We therefore
+ * need two 16-bit instructions.
+ */
+       .globl __aarch32_sigret_code_start
+__aarch32_sigret_code_start:
+
+       /*
+        * ARM Code
+        */
+       .byte   __NR_compat_sigreturn, 0x70, 0xa0, 0xe3 // mov  r7, #__NR_compat_sigreturn
+       .byte   __NR_compat_sigreturn, 0x00, 0x00, 0xef // svc  #__NR_compat_sigreturn
+
+       /*
+        * Thumb code
+        */
+       .byte   __NR_compat_sigreturn, 0x27                     // svc  #__NR_compat_sigreturn
+       .byte   __NR_compat_sigreturn, 0xdf                     // mov  r7, #__NR_compat_sigreturn
+
+       /*
+        * ARM code
+        */
+       .byte   __NR_compat_rt_sigreturn, 0x70, 0xa0, 0xe3      // mov  r7, #__NR_compat_rt_sigreturn
+       .byte   __NR_compat_rt_sigreturn, 0x00, 0x00, 0xef      // svc  #__NR_compat_rt_sigreturn
+
+       /*
+        * Thumb code
+        */
+       .byte   __NR_compat_rt_sigreturn, 0x27                  // svc  #__NR_compat_rt_sigreturn
+       .byte   __NR_compat_rt_sigreturn, 0xdf                  // mov  r7, #__NR_compat_rt_sigreturn
+
+        .globl __aarch32_sigret_code_end
+__aarch32_sigret_code_end: