ARM: tlb: don't perform inner-shareable invalidation for local TLB ops

[~andy/linux] / arch / arm / mm / context.c

diff --git a/arch/arm/mm/context.c b/arch/arm/mm/context.c
index 4a0544492f10e4cd63d490f61d3cff3e54adbd19..84e6f772e204597032cc0fcd4101f36ce588728f 100644 (file)
--- a/arch/arm/mm/context.c
+++ b/arch/arm/mm/context.c
@@ -162,10 +162,7 @@ static void flush_context(unsigned int cpu)
        }
 
        /* Queue a TLB invalidate and flush the I-cache if necessary. */
-       if (!tlb_ops_need_broadcast())
-               cpumask_set_cpu(cpu, &tlb_flush_pending);
-       else
-               cpumask_setall(&tlb_flush_pending);
+       cpumask_setall(&tlb_flush_pending);
 
        if (icache_is_vivt_asid_tagged())
                __flush_icache_all();
@@ -245,8 +242,6 @@ void check_and_switch_context(struct mm_struct *mm, struct task_struct *tsk)
        if (cpumask_test_and_clear_cpu(cpu, &tlb_flush_pending)) {
                local_flush_bp_all();
                local_flush_tlb_all();
-               if (erratum_a15_798181())
-                       dummy_flush_tlb_a15_erratum();
        }
 
        atomic64_set(&per_cpu(active_asids, cpu), asid);