Merge 3.5-rc4 into usb-linus

[~andy/linux] / arch / arm / mach-tegra / Kconfig

diff --git a/arch/arm/mach-tegra/Kconfig b/arch/arm/mach-tegra/Kconfig
index 0e4e502ad44866682e7be416b810e0892ffadb69..6a113a9bb87a73b17368267715aec791127fcd83 100644 (file)
--- a/arch/arm/mach-tegra/Kconfig
+++ b/arch/arm/mach-tegra/Kconfig
@@ -20,8 +20,6 @@ config ARCH_TEGRA_2x_SOC
        select PL310_ERRATA_727915 if CACHE_L2X0
        select PL310_ERRATA_769419 if CACHE_L2X0
        select CPU_FREQ_TABLE if CPU_FREQ
-       select MEMORY
-       select TEGRA20_MC
        help
          Support for NVIDIA Tegra AP20 and T20 processors, based on the
          ARM CortexA9MP CPU and the ARM PL310 L2 cache controller
@@ -52,6 +50,14 @@ config TEGRA_PCI
        depends on ARCH_TEGRA_2x_SOC
        select PCI
 
+config TEGRA_AHB
+       bool "Enable AHB driver for NVIDIA Tegra SoCs"
+       default y
+       help
+         Adds AHB configuration functionality for NVIDIA Tegra SoCs,
+         which controls AHB bus master arbitration and some
+         perfomance parameters(priority, prefech size).
+
 comment "Tegra board type"
 
 config MACH_HARMONY
@@ -113,7 +119,7 @@ config MACH_VENTANA
          Support for the nVidia Ventana development platform
 
 choice
-        prompt "Low-level debug console UART"
+        prompt "Default low-level debug console UART"
         default TEGRA_DEBUG_UART_NONE
 
 config TEGRA_DEBUG_UART_NONE
@@ -136,6 +142,33 @@ config TEGRA_DEBUG_UARTE
 
 endchoice
 
+choice
+       prompt "Automatic low-level debug console UART"
+       default TEGRA_DEBUG_UART_AUTO_NONE
+
+config TEGRA_DEBUG_UART_AUTO_NONE
+       bool "None"
+
+config TEGRA_DEBUG_UART_AUTO_ODMDATA
+       bool "Via ODMDATA"
+       help
+         Automatically determines which UART to use for low-level debug based
+         on the ODMDATA value. This value is part of the BCT, and is written
+         to the boot memory device using nvflash, or other flashing tool.
+         When bits 19:18 are 3, then bits 17:15 indicate which UART to use;
+         0/1/2/3/4 are UART A/B/C/D/E.
+
+config TEGRA_DEBUG_UART_AUTO_SCRATCH
+       bool "Via UART scratch register"
+       help
+         Automatically determines which UART to use for low-level debug based
+         on the UART scratch register value. Some bootloaders put ASCII 'D'
+         in this register when they initialize their own console UART output.
+         Using this option allows the kernel to automatically pick the same
+         UART.
+
+endchoice
+
 config TEGRA_SYSTEM_DMA
        bool "Enable system DMA driver for NVIDIA Tegra SoCs"
        default y