Merge tag 'soc-for-linus-3' of git://git.kernel.org/pub/scm/linux/kernel/git/arm...

[~andy/linux] / arch / arm / mach-orion5x / common.c

diff --git a/arch/arm/mach-orion5x/common.c b/arch/arm/mach-orion5x/common.c
index 2075bf8e3d90959784d27ff0b36bb423836c2711..b97fd672e89d74f40e3ebfc0b1e18c365be785f3 100644 (file)
--- a/arch/arm/mach-orion5x/common.c
+++ b/arch/arm/mach-orion5x/common.c
@@ -35,7 +35,6 @@
 #include <linux/platform_data/usb-ehci-orion.h>
 #include <plat/time.h>
 #include <plat/common.h>
-#include <plat/addr-map.h>
 #include "common.h"
 
 /*****************************************************************************
@@ -175,7 +174,8 @@ void __init orion5x_xor_init(void)
  ****************************************************************************/
 static void __init orion5x_crypto_init(void)
 {
-       orion5x_setup_sram_win();
+       mvebu_mbus_add_window("sram", ORION5X_SRAM_PHYS_BASE,
+                             ORION5X_SRAM_SIZE);
        orion_crypto_init(ORION5X_CRYPTO_PHYS_BASE, ORION5X_SRAM_PHYS_BASE,
                          SZ_8K, IRQ_ORION5X_CESA);
 }
@@ -194,6 +194,9 @@ void __init orion5x_wdt_init(void)
  ****************************************************************************/
 void __init orion5x_init_early(void)
 {
+       u32 rev, dev;
+       const char *mbus_soc_name;
+
        orion_time_set_base(TIMER_VIRT_BASE);
 
        /*
@@ -202,6 +205,46 @@ void __init orion5x_init_early(void)
         * the allocations won't fail.
         */
        init_dma_coherent_pool_size(SZ_1M);
+
+       /* Initialize the MBUS driver */
+       orion5x_pcie_id(&dev, &rev);
+       if (dev == MV88F5281_DEV_ID)
+               mbus_soc_name = "marvell,orion5x-88f5281-mbus";
+       else if (dev == MV88F5182_DEV_ID)
+               mbus_soc_name = "marvell,orion5x-88f5182-mbus";
+       else if (dev == MV88F5181_DEV_ID)
+               mbus_soc_name = "marvell,orion5x-88f5181-mbus";
+       else if (dev == MV88F6183_DEV_ID)
+               mbus_soc_name = "marvell,orion5x-88f6183-mbus";
+       else
+               mbus_soc_name = NULL;
+       mvebu_mbus_init(mbus_soc_name, ORION5X_BRIDGE_WINS_BASE,
+                       ORION5X_BRIDGE_WINS_SZ,
+                       ORION5X_DDR_WINS_BASE, ORION5X_DDR_WINS_SZ);
+}
+
+void orion5x_setup_wins(void)
+{
+       /*
+        * The PCIe windows will no longer be statically allocated
+        * here once Orion5x is migrated to the pci-mvebu driver.
+        */
+       mvebu_mbus_add_window_remap_flags("pcie0.0", ORION5X_PCIE_IO_PHYS_BASE,
+                                         ORION5X_PCIE_IO_SIZE,
+                                         ORION5X_PCIE_IO_BUS_BASE,
+                                         MVEBU_MBUS_PCI_IO);
+       mvebu_mbus_add_window_remap_flags("pcie0.0", ORION5X_PCIE_MEM_PHYS_BASE,
+                                         ORION5X_PCIE_MEM_SIZE,
+                                         MVEBU_MBUS_NO_REMAP,
+                                         MVEBU_MBUS_PCI_MEM);
+       mvebu_mbus_add_window_remap_flags("pci0.0", ORION5X_PCI_IO_PHYS_BASE,
+                                         ORION5X_PCI_IO_SIZE,
+                                         ORION5X_PCI_IO_BUS_BASE,
+                                         MVEBU_MBUS_PCI_IO);
+       mvebu_mbus_add_window_remap_flags("pci0.0", ORION5X_PCI_MEM_PHYS_BASE,
+                                         ORION5X_PCI_MEM_SIZE,
+                                         MVEBU_MBUS_NO_REMAP,
+                                         MVEBU_MBUS_PCI_MEM);
 }
 
 int orion5x_tclk;
@@ -283,7 +326,7 @@ void __init orion5x_init(void)
        /*
         * Setup Orion address map
         */
-       orion5x_setup_cpu_mbus_bridge();
+       orion5x_setup_wins();
 
        /* Setup root of clk tree */
        clk_init();