Merge branch 'next/devel-samsung' of git://git.kernel.org/pub/scm/linux/kernel/git...

[~andy/linux] / arch / arm / mach-exynos / common.c

diff --git a/arch/arm/mach-exynos/common.c b/arch/arm/mach-exynos/common.c
index 031c1e5b3dfe7281bc501bda41956c9093b593ea..7f1f2687147d255edd849dbade97a06f9da03159 100644 (file)
--- a/arch/arm/mach-exynos/common.c
+++ b/arch/arm/mach-exynos/common.c
@@ -26,10 +26,12 @@
 #include <asm/hardware/gic.h>
 #include <asm/mach/map.h>
 #include <asm/mach/irq.h>
+#include <asm/cacheflush.h>
 
 #include <mach/regs-irq.h>
 #include <mach/regs-pmu.h>
 #include <mach/regs-gpio.h>
+#include <mach/pmu.h>
 
 #include <plat/cpu.h>
 #include <plat/clock.h>
@@ -45,6 +47,8 @@
 #include <plat/regs-serial.h>
 
 #include "common.h"
+#define L2_AUX_VAL 0x7C470001
+#define L2_AUX_MASK 0xC200ffff
 
 static const char name_exynos4210[] = "EXYNOS4210";
 static const char name_exynos4212[] = "EXYNOS4212";
@@ -173,7 +177,12 @@ static struct map_desc exynos4_iodesc[] __initdata = {
        }, {
                .virtual        = (unsigned long)S5P_VA_DMC0,
                .pfn            = __phys_to_pfn(EXYNOS4_PA_DMC0),
-               .length         = SZ_4K,
+               .length         = SZ_64K,
+               .type           = MT_DEVICE,
+       }, {
+               .virtual        = (unsigned long)S5P_VA_DMC1,
+               .pfn            = __phys_to_pfn(EXYNOS4_PA_DMC1),
+               .length         = SZ_64K,
                .type           = MT_DEVICE,
        }, {
                .virtual        = (unsigned long)S3C_VA_USB_HSPHY,
@@ -433,23 +442,48 @@ core_initcall(exynos4_core_init);
 #ifdef CONFIG_CACHE_L2X0
 static int __init exynos4_l2x0_cache_init(void)
 {
-       /* TAG, Data Latency Control: 2cycle */
-       __raw_writel(0x110, S5P_VA_L2CC + L2X0_TAG_LATENCY_CTRL);
+       int ret;
+       ret = l2x0_of_init(L2_AUX_VAL, L2_AUX_MASK);
+       if (!ret) {
+               l2x0_regs_phys = virt_to_phys(&l2x0_saved_regs);
+               clean_dcache_area(&l2x0_regs_phys, sizeof(unsigned long));
+               return 0;
+       }
 
-       if (soc_is_exynos4210())
-               __raw_writel(0x110, S5P_VA_L2CC + L2X0_DATA_LATENCY_CTRL);
-       else if (soc_is_exynos4212() || soc_is_exynos4412())
-               __raw_writel(0x120, S5P_VA_L2CC + L2X0_DATA_LATENCY_CTRL);
+       if (!(__raw_readl(S5P_VA_L2CC + L2X0_CTRL) & 0x1)) {
+               l2x0_saved_regs.phy_base = EXYNOS4_PA_L2CC;
+               /* TAG, Data Latency Control: 2 cycles */
+               l2x0_saved_regs.tag_latency = 0x110;
+
+               if (soc_is_exynos4212() || soc_is_exynos4412())
+                       l2x0_saved_regs.data_latency = 0x120;
+               else
+                       l2x0_saved_regs.data_latency = 0x110;
+
+               l2x0_saved_regs.prefetch_ctrl = 0x30000007;
+               l2x0_saved_regs.pwr_ctrl =
+                       (L2X0_DYNAMIC_CLK_GATING_EN | L2X0_STNDBY_MODE_EN);
 
-       /* L2X0 Prefetch Control */
-       __raw_writel(0x30000007, S5P_VA_L2CC + L2X0_PREFETCH_CTRL);
+               l2x0_regs_phys = virt_to_phys(&l2x0_saved_regs);
 
-       /* L2X0 Power Control */
-       __raw_writel(L2X0_DYNAMIC_CLK_GATING_EN | L2X0_STNDBY_MODE_EN,
-                    S5P_VA_L2CC + L2X0_POWER_CTRL);
+               __raw_writel(l2x0_saved_regs.tag_latency,
+                               S5P_VA_L2CC + L2X0_TAG_LATENCY_CTRL);
+               __raw_writel(l2x0_saved_regs.data_latency,
+                               S5P_VA_L2CC + L2X0_DATA_LATENCY_CTRL);
 
-       l2x0_init(S5P_VA_L2CC, 0x7C470001, 0xC200ffff);
+               /* L2X0 Prefetch Control */
+               __raw_writel(l2x0_saved_regs.prefetch_ctrl,
+                               S5P_VA_L2CC + L2X0_PREFETCH_CTRL);
+
+               /* L2X0 Power Control */
+               __raw_writel(l2x0_saved_regs.pwr_ctrl,
+                               S5P_VA_L2CC + L2X0_POWER_CTRL);
+
+               clean_dcache_area(&l2x0_regs_phys, sizeof(unsigned long));
+               clean_dcache_area(&l2x0_saved_regs, sizeof(struct l2x0_regs));
+       }
 
+       l2x0_init(S5P_VA_L2CC, L2_AUX_VAL, L2_AUX_MASK);
        return 0;
 }