]> Pileus Git - ~andy/linux/blobdiff - arch/arm/boot/dts/exynos5420.dtsi
Merge tag 'dt-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
[~andy/linux] / arch / arm / boot / dts / exynos5420.dtsi
index 9e90d1ec0c28f96bfd4d1b986bbe5624a1b94c4f..5353e32897a444a4f5d13a0bc7174c49fdcf4fca 100644 (file)
  */
 
 #include "exynos5.dtsi"
-/include/ "exynos5420-pinctrl.dtsi"
+#include "exynos5420-pinctrl.dtsi"
+
+#include <dt-bindings/clk/exynos-audss-clk.h>
+
 / {
        compatible = "samsung,exynos5420";
 
                #clock-cells = <1>;
        };
 
+       clock_audss: audss-clock-controller@3810000 {
+               compatible = "samsung,exynos5420-audss-clock";
+               reg = <0x03810000 0x0C>;
+               #clock-cells = <1>;
+               clocks = <&clock 148>;
+               clock-names = "sclk_audio";
+       };
+
+       codec@11000000 {
+               compatible = "samsung,mfc-v7";
+               reg = <0x11000000 0x10000>;
+               interrupts = <0 96 0>;
+               clocks = <&clock 401>;
+               clock-names = "mfc";
+       };
+
        mct@101C0000 {
                compatible = "samsung,exynos4210-mct";
                reg = <0x101C0000 0x800>;
                };
        };
 
+       gsc_pd: power-domain@10044000 {
+               compatible = "samsung,exynos4210-pd";
+               reg = <0x10044000 0x20>;
+       };
+
+       isp_pd: power-domain@10044020 {
+               compatible = "samsung,exynos4210-pd";
+               reg = <0x10044020 0x20>;
+       };
+
+       mfc_pd: power-domain@10044060 {
+               compatible = "samsung,exynos4210-pd";
+               reg = <0x10044060 0x20>;
+       };
+
+       disp_pd: power-domain@100440C0 {
+               compatible = "samsung,exynos4210-pd";
+               reg = <0x100440C0 0x20>;
+       };
+
+       mau_pd: power-domain@100440E0 {
+               compatible = "samsung,exynos4210-pd";
+               reg = <0x100440E0 0x20>;
+       };
+
+       g2d_pd: power-domain@10044100 {
+               compatible = "samsung,exynos4210-pd";
+               reg = <0x10044100 0x20>;
+       };
+
+       msc_pd: power-domain@10044120 {
+               compatible = "samsung,exynos4210-pd";
+               reg = <0x10044120 0x20>;
+       };
+
        pinctrl_0: pinctrl@13400000 {
                compatible = "samsung,exynos5420-pinctrl";
                reg = <0x13400000 0x1000>;
                clocks = <&clock 260>, <&clock 131>;
                clock-names = "uart", "clk_uart_baud0";
        };
+
+       dp_phy: video-phy@10040728 {
+               compatible = "samsung,exynos5250-dp-video-phy";
+               reg = <0x10040728 4>;
+               #phy-cells = <0>;
+       };
+
+       dp-controller@145B0000 {
+               clocks = <&clock 412>;
+               clock-names = "dp";
+               phys = <&dp_phy>;
+               phy-names = "dp";
+       };
+
+       fimd@14400000 {
+               samsung,power-domain = <&disp_pd>;
+               clocks = <&clock 147>, <&clock 421>;
+               clock-names = "sclk_fimd", "fimd";
+       };
 };