arm: mvebu: armada-xp-db: ensure PCIe range is specified

[~andy/linux] / arch / arm / boot / dts / armada-xp-db.dts

diff --git a/arch/arm/boot/dts/armada-xp-db.dts b/arch/arm/boot/dts/armada-xp-db.dts
index d6cc8bf8272e387281c30a0130914c1e961fa69f..e28e68ff864dbd40c2aca2a00d25e74cc0f70137 100644 (file)
--- a/arch/arm/boot/dts/armada-xp-db.dts
+++ b/arch/arm/boot/dts/armada-xp-db.dts
@@ -30,6 +30,10 @@
        };
 
        soc {
+               ranges = <0          0 0xd0000000 0x100000      /* Internal registers 1MiB */
+                         0xe0000000 0 0xe0000000 0x8100000     /* PCIe */
+                         0xf0000000 0 0xf0000000 0x1000000>;   /* Device Bus, NOR 16MiB   */
+
                internal-regs {
                        serial@12000 {
                                clock-frequency = <250000000>;
@@ -97,6 +101,7 @@
                                pinctrl-names = "default";
                                status = "okay";
                                /* No CD or WP GPIOs */
+                               broken-cd;
                        };
 
                        usb@50000 {
@@ -155,6 +160,35 @@
                                        status = "okay";
                                };
                        };
+
+                       devbus-bootcs@10400 {
+                               status = "okay";
+                               ranges = <0 0xf0000000 0x1000000>;
+
+                               /* Device Bus parameters are required */
+
+                               /* Read parameters */
+                               devbus,bus-width    = <8>;
+                               devbus,turn-off-ps  = <60000>;
+                               devbus,badr-skew-ps = <0>;
+                               devbus,acc-first-ps = <124000>;
+                               devbus,acc-next-ps  = <248000>;
+                               devbus,rd-setup-ps  = <0>;
+                               devbus,rd-hold-ps   = <0>;
+
+                               /* Write parameters */
+                               devbus,sync-enable = <0>;
+                               devbus,wr-high-ps  = <60000>;
+                               devbus,wr-low-ps   = <60000>;
+                               devbus,ale-wr-ps   = <60000>;
+
+                               /* NOR 16 MiB */
+                               nor@0 {
+                                       compatible = "cfi-flash";
+                                       reg = <0 0x1000000>;
+                                       bank-width = <2>;
+                               };
+                       };
                };
        };
 };