]> Pileus Git - ~andy/linux/blobdiff - arch/arc/kernel/troubleshoot.c
Merge tag 'arc-v3.11-rc1-part1' of git://git.kernel.org/pub/scm/linux/kernel/git...
[~andy/linux] / arch / arc / kernel / troubleshoot.c
index a03528ecd276b19916b3a0f4f70e39ecd6e3a191..73a7450ee622d843160d4fc7d0284c2fa407ce84 100644 (file)
@@ -117,23 +117,22 @@ static void show_faulting_vma(unsigned long address, char *buf)
 
 static void show_ecr_verbose(struct pt_regs *regs)
 {
-       unsigned int vec, cause_code, cause_reg;
+       unsigned int vec, cause_code;
        unsigned long address;
 
-       cause_reg = current->thread.cause_code;
-       pr_info("\n[ECR   ]: 0x%08x => ", cause_reg);
+       pr_info("\n[ECR   ]: 0x%08lx => ", regs->event);
 
        /* For Data fault, this is data address not instruction addr */
        address = current->thread.fault_address;
 
-       vec = cause_reg >> 16;
-       cause_code = (cause_reg >> 8) & 0xFF;
+       vec = regs->ecr_vec;
+       cause_code = regs->ecr_cause;
 
        /* For DTLB Miss or ProtV, display the memory involved too */
        if (vec == ECR_V_DTLB_MISS) {
-               pr_cont("Invalid %s 0x%08lx by insn @ 0x%08lx\n",
-                      (cause_code == 0x01) ? "Read From" :
-                      ((cause_code == 0x02) ? "Write to" : "EX"),
+               pr_cont("Invalid %s 0x%08lx by insn @ 0x%08lx\n",
+                      (cause_code == 0x01) ? "Read" :
+                      ((cause_code == 0x02) ? "Write" : "EX"),
                       address, regs->ret);
        } else if (vec == ECR_V_ITLB_MISS) {
                pr_cont("Insn could not be fetched\n");
@@ -144,14 +143,12 @@ static void show_ecr_verbose(struct pt_regs *regs)
        } else if (vec == ECR_V_PROTV) {
                if (cause_code == ECR_C_PROTV_INST_FETCH)
                        pr_cont("Execute from Non-exec Page\n");
-               else if (cause_code == ECR_C_PROTV_LOAD)
-                       pr_cont("Read from Non-readable Page\n");
-               else if (cause_code == ECR_C_PROTV_STORE)
-                       pr_cont("Write to Non-writable Page\n");
-               else if (cause_code == ECR_C_PROTV_XCHG)
-                       pr_cont("Data exchange protection violation\n");
                else if (cause_code == ECR_C_PROTV_MISALIG_DATA)
                        pr_cont("Misaligned r/w from 0x%08lx\n", address);
+               else
+                       pr_cont("%s access not allowed on page\n",
+                               (cause_code == 0x01) ? "Read" :
+                               ((cause_code == 0x02) ? "Write" : "EX"));
        } else if (vec == ECR_V_INSN_ERR) {
                pr_cont("Illegal Insn\n");
        } else {
@@ -176,8 +173,7 @@ void show_regs(struct pt_regs *regs)
        print_task_path_n_nm(tsk, buf);
        show_regs_print_info(KERN_INFO);
 
-       if (current->thread.cause_code)
-               show_ecr_verbose(regs);
+       show_ecr_verbose(regs);
 
        pr_info("[EFA   ]: 0x%08lx\n[BLINK ]: %pS\n[ERET  ]: %pS\n",
                current->thread.fault_address,
@@ -213,10 +209,9 @@ void show_regs(struct pt_regs *regs)
 }
 
 void show_kernel_fault_diag(const char *str, struct pt_regs *regs,
-                           unsigned long address, unsigned long cause_reg)
+                           unsigned long address)
 {
        current->thread.fault_address = address;
-       current->thread.cause_code = cause_reg;
 
        /* Caller and Callee regs */
        show_regs(regs);