regulator: ti-abb: Fix bias voltage glitch in transition to bypass mode

[~andy/linux] / arch / arc / kernel / clk.c

diff --git a/arch/arc/kernel/clk.c b/arch/arc/kernel/clk.c
index 66ce0dc917fb3f8add4d1a605c6968a9c2c428c2..10c7b0b5a07983027e285375fe5ff57b14de4dfb 100644 (file)
--- a/arch/arc/kernel/clk.c
+++ b/arch/arc/kernel/clk.c
@@ -8,7 +8,7 @@
 
 #include <asm/clk.h>
 
-unsigned long core_freq = 800000000;
+unsigned long core_freq = 80000000;
 
 /*
  * As of now we default to device-tree provided clock