2 * Fifo-attached Serial Interface (FSI) support for SH7724
4 * Copyright (C) 2009 Renesas Solutions Corp.
5 * Kuninori Morimoto <morimoto.kuninori@renesas.com>
8 * Copyright (c) 2007 Manuel Lauss <mano@roarinelk.homelinux.net>
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License version 2 as
12 * published by the Free Software Foundation.
15 #include <linux/delay.h>
16 #include <linux/dma-mapping.h>
17 #include <linux/pm_runtime.h>
19 #include <linux/scatterlist.h>
20 #include <linux/sh_dma.h>
21 #include <linux/slab.h>
22 #include <linux/module.h>
23 #include <sound/soc.h>
24 #include <sound/pcm_params.h>
25 #include <sound/sh_fsi.h>
27 /* PortA/PortB register */
28 #define REG_DO_FMT 0x0000
29 #define REG_DOFF_CTL 0x0004
30 #define REG_DOFF_ST 0x0008
31 #define REG_DI_FMT 0x000C
32 #define REG_DIFF_CTL 0x0010
33 #define REG_DIFF_ST 0x0014
34 #define REG_CKG1 0x0018
35 #define REG_CKG2 0x001C
36 #define REG_DIDT 0x0020
37 #define REG_DODT 0x0024
38 #define REG_MUTE_ST 0x0028
39 #define REG_OUT_DMAC 0x002C
40 #define REG_OUT_SEL 0x0030
41 #define REG_IN_DMAC 0x0038
44 #define MST_CLK_RST 0x0210
45 #define MST_SOFT_RST 0x0214
46 #define MST_FIFO_SZ 0x0218
48 /* core register (depend on FSI version) */
49 #define A_MST_CTLR 0x0180
50 #define B_MST_CTLR 0x01A0
51 #define CPU_INT_ST 0x01F4
52 #define CPU_IEMSK 0x01F8
53 #define CPU_IMSK 0x01FC
60 #define CR_BWS_MASK (0x3 << 20) /* FSI2 */
61 #define CR_BWS_24 (0x0 << 20) /* FSI2 */
62 #define CR_BWS_16 (0x1 << 20) /* FSI2 */
63 #define CR_BWS_20 (0x2 << 20) /* FSI2 */
65 #define CR_DTMD_PCM (0x0 << 8) /* FSI2 */
66 #define CR_DTMD_SPDIF_PCM (0x1 << 8) /* FSI2 */
67 #define CR_DTMD_SPDIF_STREAM (0x2 << 8) /* FSI2 */
69 #define CR_MONO (0x0 << 4)
70 #define CR_MONO_D (0x1 << 4)
71 #define CR_PCM (0x2 << 4)
72 #define CR_I2S (0x3 << 4)
73 #define CR_TDM (0x4 << 4)
74 #define CR_TDM_D (0x5 << 4)
78 #define VDMD_MASK (0x3 << 4)
79 #define VDMD_FRONT (0x0 << 4) /* Package in front */
80 #define VDMD_BACK (0x1 << 4) /* Package in back */
81 #define VDMD_STREAM (0x2 << 4) /* Stream mode(16bit * 2) */
83 #define DMA_ON (0x1 << 0)
87 #define IRQ_HALF 0x00100000
88 #define FIFO_CLR 0x00000001
91 #define ERR_OVER 0x00000010
92 #define ERR_UNDER 0x00000001
93 #define ST_ERR (ERR_OVER | ERR_UNDER)
96 #define ACKMD_MASK 0x00007000
97 #define BPFMD_MASK 0x00000700
102 #define BP (1 << 4) /* Fix the signal of Biphase output */
103 #define SE (1 << 0) /* Fix the master clock */
109 /* IO SHIFT / MACRO */
114 #define AB_IO(param, shift) (param << shift)
117 #define PBSR (1 << 12) /* Port B Software Reset */
118 #define PASR (1 << 8) /* Port A Software Reset */
119 #define IR (1 << 4) /* Interrupt Reset */
120 #define FSISR (1 << 0) /* Software Reset */
123 #define DMMD (1 << 4) /* SPDIF output timing 0: Biphase only */
124 /* 1: Biphase and serial */
127 #define FIFO_SZ_MASK 0x7
129 #define FSI_RATES SNDRV_PCM_RATE_8000_96000
131 #define FSI_FMTS (SNDRV_PCM_FMTBIT_S24_LE | SNDRV_PCM_FMTBIT_S16_LE)
133 typedef int (*set_rate_func)(struct device *dev, int rate, int enable);
140 * A : sample widtht 16bit setting
141 * B : sample widtht 24bit setting
144 #define SHIFT_16DATA 0
145 #define SHIFT_24DATA 4
147 #define PACKAGE_24BITBUS_BACK 0
148 #define PACKAGE_24BITBUS_FRONT 1
149 #define PACKAGE_16BITBUS_STREAM 2
151 #define BUSOP_SET(s, a) ((a) << SHIFT_ ## s ## DATA)
152 #define BUSOP_GET(s, a) (((a) >> SHIFT_ ## s ## DATA) & 0xF)
155 * FSI driver use below type name for variable
157 * xxx_num : number of data
158 * xxx_pos : position of data
159 * xxx_capa : capacity of data
163 * period/frame/sample image
167 * period pos period pos
169 * |<-------------------- period--------------------->|
170 * ==|============================================ ... =|==
172 * ||<----- frame ----->|<------ frame ----->| ... |
173 * |+--------------------+--------------------+- ... |
174 * ||[ sample ][ sample ]|[ sample ][ sample ]| ... |
175 * |+--------------------+--------------------+- ... |
176 * ==|============================================ ... =|==
194 * FSIxCLK [CPG] (ick) -------> |
195 * |-> FSI_DIV (div)-> FSI2
196 * FSIxCK [external] (xck) ---> |
203 struct fsi_stream_handler;
207 * these are initialized by fsi_stream_init()
209 struct snd_pcm_substream *substream;
210 int fifo_sample_capa; /* sample capacity of FSI FIFO */
211 int buff_sample_capa; /* sample capacity of ALSA buffer */
212 int buff_sample_pos; /* sample position of ALSA buffer */
213 int period_samples; /* sample number / 1 period */
214 int period_pos; /* current period position */
215 int sample_width; /* sample width */
225 * thse are initialized by fsi_handler_init()
227 struct fsi_stream_handler *handler;
228 struct fsi_priv *priv;
231 * these are for DMAEngine
233 struct dma_chan *chan;
234 struct sh_dmae_slave slave; /* see fsi_handler_init() */
235 struct tasklet_struct tasklet;
240 /* see [FSI clock] */
245 int (*set_rate)(struct device *dev,
246 struct fsi_priv *fsi,
255 struct fsi_master *master;
256 struct sh_fsi_port_info *info;
258 struct fsi_stream playback;
259 struct fsi_stream capture;
261 struct fsi_clk clock;
276 struct fsi_stream_handler {
277 int (*init)(struct fsi_priv *fsi, struct fsi_stream *io);
278 int (*quit)(struct fsi_priv *fsi, struct fsi_stream *io);
279 int (*probe)(struct fsi_priv *fsi, struct fsi_stream *io, struct device *dev);
280 int (*transfer)(struct fsi_priv *fsi, struct fsi_stream *io);
281 int (*remove)(struct fsi_priv *fsi, struct fsi_stream *io);
282 void (*start_stop)(struct fsi_priv *fsi, struct fsi_stream *io,
285 #define fsi_stream_handler_call(io, func, args...) \
287 !((io)->handler->func) ? 0 : \
288 (io)->handler->func(args))
303 struct fsi_priv fsia;
304 struct fsi_priv fsib;
305 struct fsi_core *core;
309 static int fsi_stream_is_play(struct fsi_priv *fsi, struct fsi_stream *io);
312 * basic read write function
315 static void __fsi_reg_write(u32 __iomem *reg, u32 data)
317 /* valid data area is 24bit */
320 __raw_writel(data, reg);
323 static u32 __fsi_reg_read(u32 __iomem *reg)
325 return __raw_readl(reg);
328 static void __fsi_reg_mask_set(u32 __iomem *reg, u32 mask, u32 data)
330 u32 val = __fsi_reg_read(reg);
335 __fsi_reg_write(reg, val);
338 #define fsi_reg_write(p, r, d)\
339 __fsi_reg_write((p->base + REG_##r), d)
341 #define fsi_reg_read(p, r)\
342 __fsi_reg_read((p->base + REG_##r))
344 #define fsi_reg_mask_set(p, r, m, d)\
345 __fsi_reg_mask_set((p->base + REG_##r), m, d)
347 #define fsi_master_read(p, r) _fsi_master_read(p, MST_##r)
348 #define fsi_core_read(p, r) _fsi_master_read(p, p->core->r)
349 static u32 _fsi_master_read(struct fsi_master *master, u32 reg)
354 spin_lock_irqsave(&master->lock, flags);
355 ret = __fsi_reg_read(master->base + reg);
356 spin_unlock_irqrestore(&master->lock, flags);
361 #define fsi_master_mask_set(p, r, m, d) _fsi_master_mask_set(p, MST_##r, m, d)
362 #define fsi_core_mask_set(p, r, m, d) _fsi_master_mask_set(p, p->core->r, m, d)
363 static void _fsi_master_mask_set(struct fsi_master *master,
364 u32 reg, u32 mask, u32 data)
368 spin_lock_irqsave(&master->lock, flags);
369 __fsi_reg_mask_set(master->base + reg, mask, data);
370 spin_unlock_irqrestore(&master->lock, flags);
376 static int fsi_version(struct fsi_master *master)
378 return master->core->ver;
381 static struct fsi_master *fsi_get_master(struct fsi_priv *fsi)
386 static int fsi_is_clk_master(struct fsi_priv *fsi)
388 return fsi->clk_master;
391 static int fsi_is_port_a(struct fsi_priv *fsi)
393 return fsi->master->base == fsi->base;
396 static int fsi_is_spdif(struct fsi_priv *fsi)
401 static int fsi_is_enable_stream(struct fsi_priv *fsi)
403 return fsi->enable_stream;
406 static int fsi_is_play(struct snd_pcm_substream *substream)
408 return substream->stream == SNDRV_PCM_STREAM_PLAYBACK;
411 static struct snd_soc_dai *fsi_get_dai(struct snd_pcm_substream *substream)
413 struct snd_soc_pcm_runtime *rtd = substream->private_data;
418 static struct fsi_priv *fsi_get_priv_frm_dai(struct snd_soc_dai *dai)
420 struct fsi_master *master = snd_soc_dai_get_drvdata(dai);
423 return &master->fsia;
425 return &master->fsib;
428 static struct fsi_priv *fsi_get_priv(struct snd_pcm_substream *substream)
430 return fsi_get_priv_frm_dai(fsi_get_dai(substream));
433 static set_rate_func fsi_get_info_set_rate(struct fsi_priv *fsi)
438 return fsi->info->set_rate;
441 static u32 fsi_get_info_flags(struct fsi_priv *fsi)
446 return fsi->info->flags;
449 static u32 fsi_get_port_shift(struct fsi_priv *fsi, struct fsi_stream *io)
451 int is_play = fsi_stream_is_play(fsi, io);
452 int is_porta = fsi_is_port_a(fsi);
456 shift = is_play ? AO_SHIFT : AI_SHIFT;
458 shift = is_play ? BO_SHIFT : BI_SHIFT;
463 static int fsi_frame2sample(struct fsi_priv *fsi, int frames)
465 return frames * fsi->chan_num;
468 static int fsi_sample2frame(struct fsi_priv *fsi, int samples)
470 return samples / fsi->chan_num;
473 static int fsi_get_current_fifo_samples(struct fsi_priv *fsi,
474 struct fsi_stream *io)
476 int is_play = fsi_stream_is_play(fsi, io);
481 fsi_reg_read(fsi, DOFF_ST) :
482 fsi_reg_read(fsi, DIFF_ST);
484 frames = 0x1ff & (status >> 8);
486 return fsi_frame2sample(fsi, frames);
489 static void fsi_count_fifo_err(struct fsi_priv *fsi)
491 u32 ostatus = fsi_reg_read(fsi, DOFF_ST);
492 u32 istatus = fsi_reg_read(fsi, DIFF_ST);
494 if (ostatus & ERR_OVER)
495 fsi->playback.oerr_num++;
497 if (ostatus & ERR_UNDER)
498 fsi->playback.uerr_num++;
500 if (istatus & ERR_OVER)
501 fsi->capture.oerr_num++;
503 if (istatus & ERR_UNDER)
504 fsi->capture.uerr_num++;
506 fsi_reg_write(fsi, DOFF_ST, 0);
507 fsi_reg_write(fsi, DIFF_ST, 0);
511 * fsi_stream_xx() function
513 static inline int fsi_stream_is_play(struct fsi_priv *fsi,
514 struct fsi_stream *io)
516 return &fsi->playback == io;
519 static inline struct fsi_stream *fsi_stream_get(struct fsi_priv *fsi,
520 struct snd_pcm_substream *substream)
522 return fsi_is_play(substream) ? &fsi->playback : &fsi->capture;
525 static int fsi_stream_is_working(struct fsi_priv *fsi,
526 struct fsi_stream *io)
528 struct fsi_master *master = fsi_get_master(fsi);
532 spin_lock_irqsave(&master->lock, flags);
533 ret = !!(io->substream && io->substream->runtime);
534 spin_unlock_irqrestore(&master->lock, flags);
539 static struct fsi_priv *fsi_stream_to_priv(struct fsi_stream *io)
544 static void fsi_stream_init(struct fsi_priv *fsi,
545 struct fsi_stream *io,
546 struct snd_pcm_substream *substream)
548 struct snd_pcm_runtime *runtime = substream->runtime;
549 struct fsi_master *master = fsi_get_master(fsi);
552 spin_lock_irqsave(&master->lock, flags);
553 io->substream = substream;
554 io->buff_sample_capa = fsi_frame2sample(fsi, runtime->buffer_size);
555 io->buff_sample_pos = 0;
556 io->period_samples = fsi_frame2sample(fsi, runtime->period_size);
558 io->sample_width = samples_to_bytes(runtime, 1);
560 io->oerr_num = -1; /* ignore 1st err */
561 io->uerr_num = -1; /* ignore 1st err */
562 fsi_stream_handler_call(io, init, fsi, io);
563 spin_unlock_irqrestore(&master->lock, flags);
566 static void fsi_stream_quit(struct fsi_priv *fsi, struct fsi_stream *io)
568 struct snd_soc_dai *dai = fsi_get_dai(io->substream);
569 struct fsi_master *master = fsi_get_master(fsi);
572 spin_lock_irqsave(&master->lock, flags);
574 if (io->oerr_num > 0)
575 dev_err(dai->dev, "over_run = %d\n", io->oerr_num);
577 if (io->uerr_num > 0)
578 dev_err(dai->dev, "under_run = %d\n", io->uerr_num);
580 fsi_stream_handler_call(io, quit, fsi, io);
581 io->substream = NULL;
582 io->buff_sample_capa = 0;
583 io->buff_sample_pos = 0;
584 io->period_samples = 0;
586 io->sample_width = 0;
590 spin_unlock_irqrestore(&master->lock, flags);
593 static int fsi_stream_transfer(struct fsi_stream *io)
595 struct fsi_priv *fsi = fsi_stream_to_priv(io);
599 return fsi_stream_handler_call(io, transfer, fsi, io);
602 #define fsi_stream_start(fsi, io)\
603 fsi_stream_handler_call(io, start_stop, fsi, io, 1)
605 #define fsi_stream_stop(fsi, io)\
606 fsi_stream_handler_call(io, start_stop, fsi, io, 0)
608 static int fsi_stream_probe(struct fsi_priv *fsi, struct device *dev)
610 struct fsi_stream *io;
614 ret1 = fsi_stream_handler_call(io, probe, fsi, io, dev);
617 ret2 = fsi_stream_handler_call(io, probe, fsi, io, dev);
627 static int fsi_stream_remove(struct fsi_priv *fsi)
629 struct fsi_stream *io;
633 ret1 = fsi_stream_handler_call(io, remove, fsi, io);
636 ret2 = fsi_stream_handler_call(io, remove, fsi, io);
647 * format/bus/dma setting
649 static void fsi_format_bus_setup(struct fsi_priv *fsi, struct fsi_stream *io,
650 u32 bus, struct device *dev)
652 struct fsi_master *master = fsi_get_master(fsi);
653 int is_play = fsi_stream_is_play(fsi, io);
656 if (fsi_version(master) >= 2) {
660 * FSI2 needs DMA/Bus setting
663 case PACKAGE_24BITBUS_FRONT:
666 dev_dbg(dev, "24bit bus / package in front\n");
668 case PACKAGE_16BITBUS_STREAM:
671 dev_dbg(dev, "16bit bus / stream mode\n");
673 case PACKAGE_24BITBUS_BACK:
677 dev_dbg(dev, "24bit bus / package in back\n");
682 fsi_reg_write(fsi, OUT_DMAC, dma);
684 fsi_reg_write(fsi, IN_DMAC, dma);
688 fsi_reg_write(fsi, DO_FMT, fmt);
690 fsi_reg_write(fsi, DI_FMT, fmt);
697 static void fsi_irq_enable(struct fsi_priv *fsi, struct fsi_stream *io)
699 u32 data = AB_IO(1, fsi_get_port_shift(fsi, io));
700 struct fsi_master *master = fsi_get_master(fsi);
702 fsi_core_mask_set(master, imsk, data, data);
703 fsi_core_mask_set(master, iemsk, data, data);
706 static void fsi_irq_disable(struct fsi_priv *fsi, struct fsi_stream *io)
708 u32 data = AB_IO(1, fsi_get_port_shift(fsi, io));
709 struct fsi_master *master = fsi_get_master(fsi);
711 fsi_core_mask_set(master, imsk, data, 0);
712 fsi_core_mask_set(master, iemsk, data, 0);
715 static u32 fsi_irq_get_status(struct fsi_master *master)
717 return fsi_core_read(master, int_st);
720 static void fsi_irq_clear_status(struct fsi_priv *fsi)
723 struct fsi_master *master = fsi_get_master(fsi);
725 data |= AB_IO(1, fsi_get_port_shift(fsi, &fsi->playback));
726 data |= AB_IO(1, fsi_get_port_shift(fsi, &fsi->capture));
728 /* clear interrupt factor */
729 fsi_core_mask_set(master, int_st, data, 0);
733 * SPDIF master clock function
735 * These functions are used later FSI2
737 static void fsi_spdif_clk_ctrl(struct fsi_priv *fsi, int enable)
739 struct fsi_master *master = fsi_get_master(fsi);
743 val = enable ? mask : 0;
746 fsi_core_mask_set(master, a_mclk, mask, val) :
747 fsi_core_mask_set(master, b_mclk, mask, val);
753 static int fsi_clk_init(struct device *dev,
754 struct fsi_priv *fsi,
758 int (*set_rate)(struct device *dev,
759 struct fsi_priv *fsi,
762 struct fsi_clk *clock = &fsi->clock;
763 int is_porta = fsi_is_port_a(fsi);
770 clock->set_rate = set_rate;
772 clock->own = devm_clk_get(dev, NULL);
773 if (IS_ERR(clock->own))
778 clock->xck = devm_clk_get(dev, is_porta ? "xcka" : "xckb");
779 if (IS_ERR(clock->xck)) {
780 dev_err(dev, "can't get xck clock\n");
783 if (clock->xck == clock->own) {
784 dev_err(dev, "cpu doesn't support xck clock\n");
789 /* FSIACLK/FSIBCLK */
791 clock->ick = devm_clk_get(dev, is_porta ? "icka" : "ickb");
792 if (IS_ERR(clock->ick)) {
793 dev_err(dev, "can't get ick clock\n");
796 if (clock->ick == clock->own) {
797 dev_err(dev, "cpu doesn't support ick clock\n");
804 clock->div = devm_clk_get(dev, is_porta ? "diva" : "divb");
805 if (IS_ERR(clock->div)) {
806 dev_err(dev, "can't get div clock\n");
809 if (clock->div == clock->own) {
810 dev_err(dev, "cpu doens't support div clock\n");
818 #define fsi_clk_invalid(fsi) fsi_clk_valid(fsi, 0)
819 static void fsi_clk_valid(struct fsi_priv *fsi, unsigned long rate)
821 fsi->clock.rate = rate;
824 static int fsi_clk_is_valid(struct fsi_priv *fsi)
826 return fsi->clock.set_rate &&
830 static int fsi_clk_enable(struct device *dev,
831 struct fsi_priv *fsi,
834 struct fsi_clk *clock = &fsi->clock;
837 if (!fsi_clk_is_valid(fsi))
840 if (0 == clock->count) {
841 ret = clock->set_rate(dev, fsi, rate);
843 fsi_clk_invalid(fsi);
848 clk_enable(clock->xck);
850 clk_enable(clock->ick);
852 clk_enable(clock->div);
860 static int fsi_clk_disable(struct device *dev,
861 struct fsi_priv *fsi)
863 struct fsi_clk *clock = &fsi->clock;
865 if (!fsi_clk_is_valid(fsi))
868 if (1 == clock->count--) {
870 clk_disable(clock->xck);
872 clk_disable(clock->ick);
874 clk_disable(clock->div);
880 static int fsi_clk_set_ackbpf(struct device *dev,
881 struct fsi_priv *fsi,
882 int ackmd, int bpfmd)
886 /* check ackmd/bpfmd relationship */
888 dev_err(dev, "unsupported rate (%d/%d)\n", ackmd, bpfmd);
910 dev_err(dev, "unsupported ackmd (%d)\n", ackmd);
935 dev_err(dev, "unsupported bpfmd (%d)\n", bpfmd);
939 dev_dbg(dev, "ACKMD/BPFMD = %d/%d\n", ackmd, bpfmd);
941 fsi_reg_mask_set(fsi, CKG1, (ACKMD_MASK | BPFMD_MASK) , data);
947 static int fsi_clk_set_rate_external(struct device *dev,
948 struct fsi_priv *fsi,
951 struct clk *xck = fsi->clock.xck;
952 struct clk *ick = fsi->clock.ick;
957 /* check clock rate */
958 xrate = clk_get_rate(xck);
960 dev_err(dev, "unsupported clock rate\n");
964 clk_set_parent(ick, xck);
965 clk_set_rate(ick, xrate);
967 bpfmd = fsi->chan_num * 32;
968 ackmd = xrate / rate;
970 dev_dbg(dev, "external/rate = %ld/%ld\n", xrate, rate);
972 ret = fsi_clk_set_ackbpf(dev, fsi, ackmd, bpfmd);
974 dev_err(dev, "%s failed", __func__);
979 static int fsi_clk_set_rate_cpg(struct device *dev,
980 struct fsi_priv *fsi,
983 struct clk *ick = fsi->clock.ick;
984 struct clk *div = fsi->clock.div;
985 unsigned long target = 0; /* 12288000 or 11289600 */
986 unsigned long actual, cout;
987 unsigned long diff, min;
988 unsigned long best_cout, best_act;
993 if (!(12288000 % rate))
995 if (!(11289600 % rate))
998 dev_err(dev, "unsupported rate\n");
1002 bpfmd = fsi->chan_num * 32;
1003 ackmd = target / rate;
1004 ret = fsi_clk_set_ackbpf(dev, fsi, ackmd, bpfmd);
1006 dev_err(dev, "%s failed", __func__);
1013 * [CPG] = cout => [FSI_DIV] = audio => [FSI] => [codec]
1015 * But, it needs to find best match of CPG and FSI_DIV
1016 * combination, since it is difficult to generate correct
1017 * frequency of audio clock from ick clock only.
1018 * Because ick is created from its parent clock.
1020 * target = rate x [512/256/128/64]fs
1021 * cout = round(target x adjustment)
1022 * actual = cout / adjustment (by FSI-DIV) ~= target
1028 for (adj = 1; adj < 0xffff; adj++) {
1030 cout = target * adj;
1031 if (cout > 100000000) /* max clock = 100MHz */
1034 /* cout/actual audio clock */
1035 cout = clk_round_rate(ick, cout);
1036 actual = cout / adj;
1038 /* find best frequency */
1039 diff = abs(actual - target);
1047 ret = clk_set_rate(ick, best_cout);
1049 dev_err(dev, "ick clock failed\n");
1053 ret = clk_set_rate(div, clk_round_rate(div, best_act));
1055 dev_err(dev, "div clock failed\n");
1059 dev_dbg(dev, "ick/div = %ld/%ld\n",
1060 clk_get_rate(ick), clk_get_rate(div));
1065 static int fsi_set_master_clk(struct device *dev, struct fsi_priv *fsi,
1066 long rate, int enable)
1068 set_rate_func set_rate = fsi_get_info_set_rate(fsi);
1074 * set_rate will be deleted
1078 return fsi_clk_enable(dev, fsi, rate);
1080 return fsi_clk_disable(dev, fsi);
1083 ret = set_rate(dev, rate, enable);
1084 if (ret < 0) /* error */
1093 switch (ret & SH_FSI_ACKMD_MASK) {
1096 case SH_FSI_ACKMD_512:
1097 data |= (0x0 << 12);
1099 case SH_FSI_ACKMD_256:
1100 data |= (0x1 << 12);
1102 case SH_FSI_ACKMD_128:
1103 data |= (0x2 << 12);
1105 case SH_FSI_ACKMD_64:
1106 data |= (0x3 << 12);
1108 case SH_FSI_ACKMD_32:
1109 data |= (0x4 << 12);
1113 switch (ret & SH_FSI_BPFMD_MASK) {
1116 case SH_FSI_BPFMD_32:
1119 case SH_FSI_BPFMD_64:
1122 case SH_FSI_BPFMD_128:
1125 case SH_FSI_BPFMD_256:
1128 case SH_FSI_BPFMD_512:
1131 case SH_FSI_BPFMD_16:
1136 fsi_reg_mask_set(fsi, CKG1, (ACKMD_MASK | BPFMD_MASK) , data);
1145 * pio data transfer handler
1147 static void fsi_pio_push16(struct fsi_priv *fsi, u8 *_buf, int samples)
1151 if (fsi_is_enable_stream(fsi)) {
1155 * fsi_pio_push_init()
1157 u32 *buf = (u32 *)_buf;
1159 for (i = 0; i < samples / 2; i++)
1160 fsi_reg_write(fsi, DODT, buf[i]);
1163 u16 *buf = (u16 *)_buf;
1165 for (i = 0; i < samples; i++)
1166 fsi_reg_write(fsi, DODT, ((u32)*(buf + i) << 8));
1170 static void fsi_pio_pop16(struct fsi_priv *fsi, u8 *_buf, int samples)
1172 u16 *buf = (u16 *)_buf;
1175 for (i = 0; i < samples; i++)
1176 *(buf + i) = (u16)(fsi_reg_read(fsi, DIDT) >> 8);
1179 static void fsi_pio_push32(struct fsi_priv *fsi, u8 *_buf, int samples)
1181 u32 *buf = (u32 *)_buf;
1184 for (i = 0; i < samples; i++)
1185 fsi_reg_write(fsi, DODT, *(buf + i));
1188 static void fsi_pio_pop32(struct fsi_priv *fsi, u8 *_buf, int samples)
1190 u32 *buf = (u32 *)_buf;
1193 for (i = 0; i < samples; i++)
1194 *(buf + i) = fsi_reg_read(fsi, DIDT);
1197 static u8 *fsi_pio_get_area(struct fsi_priv *fsi, struct fsi_stream *io)
1199 struct snd_pcm_runtime *runtime = io->substream->runtime;
1201 return runtime->dma_area +
1202 samples_to_bytes(runtime, io->buff_sample_pos);
1205 static int fsi_pio_transfer(struct fsi_priv *fsi, struct fsi_stream *io,
1206 void (*run16)(struct fsi_priv *fsi, u8 *buf, int samples),
1207 void (*run32)(struct fsi_priv *fsi, u8 *buf, int samples),
1210 struct snd_pcm_runtime *runtime;
1211 struct snd_pcm_substream *substream;
1215 if (!fsi_stream_is_working(fsi, io))
1219 substream = io->substream;
1220 runtime = substream->runtime;
1222 /* FSI FIFO has limit.
1223 * So, this driver can not send periods data at a time
1225 if (io->buff_sample_pos >=
1226 io->period_samples * (io->period_pos + 1)) {
1229 io->period_pos = (io->period_pos + 1) % runtime->periods;
1231 if (0 == io->period_pos)
1232 io->buff_sample_pos = 0;
1235 buf = fsi_pio_get_area(fsi, io);
1237 switch (io->sample_width) {
1239 run16(fsi, buf, samples);
1242 run32(fsi, buf, samples);
1248 /* update buff_sample_pos */
1249 io->buff_sample_pos += samples;
1252 snd_pcm_period_elapsed(substream);
1257 static int fsi_pio_pop(struct fsi_priv *fsi, struct fsi_stream *io)
1259 int sample_residues; /* samples in FSI fifo */
1260 int sample_space; /* ALSA free samples space */
1263 sample_residues = fsi_get_current_fifo_samples(fsi, io);
1264 sample_space = io->buff_sample_capa - io->buff_sample_pos;
1266 samples = min(sample_residues, sample_space);
1268 return fsi_pio_transfer(fsi, io,
1274 static int fsi_pio_push(struct fsi_priv *fsi, struct fsi_stream *io)
1276 int sample_residues; /* ALSA residue samples */
1277 int sample_space; /* FSI fifo free samples space */
1280 sample_residues = io->buff_sample_capa - io->buff_sample_pos;
1281 sample_space = io->fifo_sample_capa -
1282 fsi_get_current_fifo_samples(fsi, io);
1284 samples = min(sample_residues, sample_space);
1286 return fsi_pio_transfer(fsi, io,
1292 static void fsi_pio_start_stop(struct fsi_priv *fsi, struct fsi_stream *io,
1295 struct fsi_master *master = fsi_get_master(fsi);
1296 u32 clk = fsi_is_port_a(fsi) ? CRA : CRB;
1299 fsi_irq_enable(fsi, io);
1301 fsi_irq_disable(fsi, io);
1303 if (fsi_is_clk_master(fsi))
1304 fsi_master_mask_set(master, CLK_RST, clk, (enable) ? clk : 0);
1307 static int fsi_pio_push_init(struct fsi_priv *fsi, struct fsi_stream *io)
1310 * we can use 16bit stream mode
1311 * when "playback" and "16bit data"
1312 * and platform allows "stream mode"
1316 if (fsi_is_enable_stream(fsi))
1317 io->bus_option = BUSOP_SET(24, PACKAGE_24BITBUS_BACK) |
1318 BUSOP_SET(16, PACKAGE_16BITBUS_STREAM);
1320 io->bus_option = BUSOP_SET(24, PACKAGE_24BITBUS_BACK) |
1321 BUSOP_SET(16, PACKAGE_24BITBUS_BACK);
1325 static int fsi_pio_pop_init(struct fsi_priv *fsi, struct fsi_stream *io)
1328 * always 24bit bus, package back when "capture"
1330 io->bus_option = BUSOP_SET(24, PACKAGE_24BITBUS_BACK) |
1331 BUSOP_SET(16, PACKAGE_24BITBUS_BACK);
1335 static struct fsi_stream_handler fsi_pio_push_handler = {
1336 .init = fsi_pio_push_init,
1337 .transfer = fsi_pio_push,
1338 .start_stop = fsi_pio_start_stop,
1341 static struct fsi_stream_handler fsi_pio_pop_handler = {
1342 .init = fsi_pio_pop_init,
1343 .transfer = fsi_pio_pop,
1344 .start_stop = fsi_pio_start_stop,
1347 static irqreturn_t fsi_interrupt(int irq, void *data)
1349 struct fsi_master *master = data;
1350 u32 int_st = fsi_irq_get_status(master);
1352 /* clear irq status */
1353 fsi_master_mask_set(master, SOFT_RST, IR, 0);
1354 fsi_master_mask_set(master, SOFT_RST, IR, IR);
1356 if (int_st & AB_IO(1, AO_SHIFT))
1357 fsi_stream_transfer(&master->fsia.playback);
1358 if (int_st & AB_IO(1, BO_SHIFT))
1359 fsi_stream_transfer(&master->fsib.playback);
1360 if (int_st & AB_IO(1, AI_SHIFT))
1361 fsi_stream_transfer(&master->fsia.capture);
1362 if (int_st & AB_IO(1, BI_SHIFT))
1363 fsi_stream_transfer(&master->fsib.capture);
1365 fsi_count_fifo_err(&master->fsia);
1366 fsi_count_fifo_err(&master->fsib);
1368 fsi_irq_clear_status(&master->fsia);
1369 fsi_irq_clear_status(&master->fsib);
1375 * dma data transfer handler
1377 static int fsi_dma_init(struct fsi_priv *fsi, struct fsi_stream *io)
1379 struct snd_pcm_runtime *runtime = io->substream->runtime;
1380 struct snd_soc_dai *dai = fsi_get_dai(io->substream);
1381 enum dma_data_direction dir = fsi_stream_is_play(fsi, io) ?
1382 DMA_TO_DEVICE : DMA_FROM_DEVICE;
1385 * 24bit data : 24bit bus / package in back
1386 * 16bit data : 16bit bus / stream mode
1388 io->bus_option = BUSOP_SET(24, PACKAGE_24BITBUS_BACK) |
1389 BUSOP_SET(16, PACKAGE_16BITBUS_STREAM);
1391 io->dma = dma_map_single(dai->dev, runtime->dma_area,
1392 snd_pcm_lib_buffer_bytes(io->substream), dir);
1396 static int fsi_dma_quit(struct fsi_priv *fsi, struct fsi_stream *io)
1398 struct snd_soc_dai *dai = fsi_get_dai(io->substream);
1399 enum dma_data_direction dir = fsi_stream_is_play(fsi, io) ?
1400 DMA_TO_DEVICE : DMA_FROM_DEVICE;
1402 dma_unmap_single(dai->dev, io->dma,
1403 snd_pcm_lib_buffer_bytes(io->substream), dir);
1407 static dma_addr_t fsi_dma_get_area(struct fsi_stream *io)
1409 struct snd_pcm_runtime *runtime = io->substream->runtime;
1411 return io->dma + samples_to_bytes(runtime, io->buff_sample_pos);
1414 static void fsi_dma_complete(void *data)
1416 struct fsi_stream *io = (struct fsi_stream *)data;
1417 struct fsi_priv *fsi = fsi_stream_to_priv(io);
1418 struct snd_pcm_runtime *runtime = io->substream->runtime;
1419 struct snd_soc_dai *dai = fsi_get_dai(io->substream);
1420 enum dma_data_direction dir = fsi_stream_is_play(fsi, io) ?
1421 DMA_TO_DEVICE : DMA_FROM_DEVICE;
1423 dma_sync_single_for_cpu(dai->dev, fsi_dma_get_area(io),
1424 samples_to_bytes(runtime, io->period_samples), dir);
1426 io->buff_sample_pos += io->period_samples;
1429 if (io->period_pos >= runtime->periods) {
1431 io->buff_sample_pos = 0;
1434 fsi_count_fifo_err(fsi);
1435 fsi_stream_transfer(io);
1437 snd_pcm_period_elapsed(io->substream);
1440 static void fsi_dma_do_tasklet(unsigned long data)
1442 struct fsi_stream *io = (struct fsi_stream *)data;
1443 struct fsi_priv *fsi = fsi_stream_to_priv(io);
1444 struct snd_soc_dai *dai;
1445 struct dma_async_tx_descriptor *desc;
1446 struct snd_pcm_runtime *runtime;
1447 enum dma_data_direction dir;
1448 int is_play = fsi_stream_is_play(fsi, io);
1452 if (!fsi_stream_is_working(fsi, io))
1455 dai = fsi_get_dai(io->substream);
1456 runtime = io->substream->runtime;
1457 dir = is_play ? DMA_TO_DEVICE : DMA_FROM_DEVICE;
1458 len = samples_to_bytes(runtime, io->period_samples);
1459 buf = fsi_dma_get_area(io);
1461 dma_sync_single_for_device(dai->dev, buf, len, dir);
1463 desc = dmaengine_prep_slave_single(io->chan, buf, len, dir,
1464 DMA_PREP_INTERRUPT | DMA_CTRL_ACK);
1466 dev_err(dai->dev, "dmaengine_prep_slave_sg() fail\n");
1470 desc->callback = fsi_dma_complete;
1471 desc->callback_param = io;
1473 if (dmaengine_submit(desc) < 0) {
1474 dev_err(dai->dev, "tx_submit() fail\n");
1478 dma_async_issue_pending(io->chan);
1483 * In DMAEngine case, codec and FSI cannot be started simultaneously
1484 * since FSI is using tasklet.
1485 * Therefore, in capture case, probably FSI FIFO will have got
1486 * overflow error in this point.
1487 * in that case, DMA cannot start transfer until error was cleared.
1490 if (ERR_OVER & fsi_reg_read(fsi, DIFF_ST)) {
1491 fsi_reg_mask_set(fsi, DIFF_CTL, FIFO_CLR, FIFO_CLR);
1492 fsi_reg_write(fsi, DIFF_ST, 0);
1497 static bool fsi_dma_filter(struct dma_chan *chan, void *param)
1499 struct sh_dmae_slave *slave = param;
1501 chan->private = slave;
1506 static int fsi_dma_transfer(struct fsi_priv *fsi, struct fsi_stream *io)
1508 tasklet_schedule(&io->tasklet);
1513 static void fsi_dma_push_start_stop(struct fsi_priv *fsi, struct fsi_stream *io,
1516 struct fsi_master *master = fsi_get_master(fsi);
1517 u32 clk = fsi_is_port_a(fsi) ? CRA : CRB;
1518 u32 enable = start ? DMA_ON : 0;
1520 fsi_reg_mask_set(fsi, OUT_DMAC, DMA_ON, enable);
1522 dmaengine_terminate_all(io->chan);
1524 if (fsi_is_clk_master(fsi))
1525 fsi_master_mask_set(master, CLK_RST, clk, (enable) ? clk : 0);
1528 static int fsi_dma_probe(struct fsi_priv *fsi, struct fsi_stream *io, struct device *dev)
1530 dma_cap_mask_t mask;
1533 dma_cap_set(DMA_SLAVE, mask);
1535 io->chan = dma_request_channel(mask, fsi_dma_filter, &io->slave);
1538 /* switch to PIO handler */
1539 if (fsi_stream_is_play(fsi, io))
1540 fsi->playback.handler = &fsi_pio_push_handler;
1542 fsi->capture.handler = &fsi_pio_pop_handler;
1544 dev_info(dev, "switch handler (dma => pio)\n");
1547 return fsi_stream_probe(fsi, dev);
1550 tasklet_init(&io->tasklet, fsi_dma_do_tasklet, (unsigned long)io);
1555 static int fsi_dma_remove(struct fsi_priv *fsi, struct fsi_stream *io)
1557 tasklet_kill(&io->tasklet);
1559 fsi_stream_stop(fsi, io);
1562 dma_release_channel(io->chan);
1568 static struct fsi_stream_handler fsi_dma_push_handler = {
1569 .init = fsi_dma_init,
1570 .quit = fsi_dma_quit,
1571 .probe = fsi_dma_probe,
1572 .transfer = fsi_dma_transfer,
1573 .remove = fsi_dma_remove,
1574 .start_stop = fsi_dma_push_start_stop,
1580 static void fsi_fifo_init(struct fsi_priv *fsi,
1581 struct fsi_stream *io,
1584 struct fsi_master *master = fsi_get_master(fsi);
1585 int is_play = fsi_stream_is_play(fsi, io);
1589 /* get on-chip RAM capacity */
1590 shift = fsi_master_read(master, FIFO_SZ);
1591 shift >>= fsi_get_port_shift(fsi, io);
1592 shift &= FIFO_SZ_MASK;
1593 frame_capa = 256 << shift;
1594 dev_dbg(dev, "fifo = %d words\n", frame_capa);
1597 * The maximum number of sample data varies depending
1598 * on the number of channels selected for the format.
1600 * FIFOs are used in 4-channel units in 3-channel mode
1601 * and in 8-channel units in 5- to 7-channel mode
1602 * meaning that more FIFOs than the required size of DPRAM
1605 * ex) if 256 words of DP-RAM is connected
1606 * 1 channel: 256 (256 x 1 = 256)
1607 * 2 channels: 128 (128 x 2 = 256)
1608 * 3 channels: 64 ( 64 x 3 = 192)
1609 * 4 channels: 64 ( 64 x 4 = 256)
1610 * 5 channels: 32 ( 32 x 5 = 160)
1611 * 6 channels: 32 ( 32 x 6 = 192)
1612 * 7 channels: 32 ( 32 x 7 = 224)
1613 * 8 channels: 32 ( 32 x 8 = 256)
1615 for (i = 1; i < fsi->chan_num; i <<= 1)
1617 dev_dbg(dev, "%d channel %d store\n",
1618 fsi->chan_num, frame_capa);
1620 io->fifo_sample_capa = fsi_frame2sample(fsi, frame_capa);
1623 * set interrupt generation factor
1627 fsi_reg_write(fsi, DOFF_CTL, IRQ_HALF);
1628 fsi_reg_mask_set(fsi, DOFF_CTL, FIFO_CLR, FIFO_CLR);
1630 fsi_reg_write(fsi, DIFF_CTL, IRQ_HALF);
1631 fsi_reg_mask_set(fsi, DIFF_CTL, FIFO_CLR, FIFO_CLR);
1635 static int fsi_hw_startup(struct fsi_priv *fsi,
1636 struct fsi_stream *io,
1639 u32 flags = fsi_get_info_flags(fsi);
1643 if (fsi_is_clk_master(fsi))
1646 fsi_reg_mask_set(fsi, CKG1, (DIMD | DOMD), data);
1648 /* clock inversion (CKG2) */
1650 if (fsi->bit_clk_inv)
1652 if (fsi->lr_clk_inv)
1654 if (fsi_is_clk_master(fsi))
1658 * SH_FSI_xxx_INV style will be removed
1660 if (SH_FSI_LRM_INV & flags)
1662 if (SH_FSI_BRM_INV & flags)
1664 if (SH_FSI_LRS_INV & flags)
1666 if (SH_FSI_BRS_INV & flags)
1669 fsi_reg_write(fsi, CKG2, data);
1672 if (fsi_is_spdif(fsi)) {
1673 fsi_spdif_clk_ctrl(fsi, 1);
1674 fsi_reg_mask_set(fsi, OUT_SEL, DMMD, DMMD);
1681 switch (io->sample_width) {
1683 data = BUSOP_GET(16, io->bus_option);
1686 data = BUSOP_GET(24, io->bus_option);
1689 fsi_format_bus_setup(fsi, io, data, dev);
1692 fsi_irq_disable(fsi, io);
1693 fsi_irq_clear_status(fsi);
1696 fsi_fifo_init(fsi, io, dev);
1698 /* start master clock */
1699 if (fsi_is_clk_master(fsi))
1700 return fsi_set_master_clk(dev, fsi, fsi->rate, 1);
1705 static int fsi_hw_shutdown(struct fsi_priv *fsi,
1708 /* stop master clock */
1709 if (fsi_is_clk_master(fsi))
1710 return fsi_set_master_clk(dev, fsi, fsi->rate, 0);
1715 static int fsi_dai_startup(struct snd_pcm_substream *substream,
1716 struct snd_soc_dai *dai)
1718 struct fsi_priv *fsi = fsi_get_priv(substream);
1720 fsi_clk_invalid(fsi);
1726 static void fsi_dai_shutdown(struct snd_pcm_substream *substream,
1727 struct snd_soc_dai *dai)
1729 struct fsi_priv *fsi = fsi_get_priv(substream);
1731 fsi_clk_invalid(fsi);
1735 static int fsi_dai_trigger(struct snd_pcm_substream *substream, int cmd,
1736 struct snd_soc_dai *dai)
1738 struct fsi_priv *fsi = fsi_get_priv(substream);
1739 struct fsi_stream *io = fsi_stream_get(fsi, substream);
1743 case SNDRV_PCM_TRIGGER_START:
1744 fsi_stream_init(fsi, io, substream);
1746 ret = fsi_hw_startup(fsi, io, dai->dev);
1748 ret = fsi_stream_transfer(io);
1750 fsi_stream_start(fsi, io);
1752 case SNDRV_PCM_TRIGGER_STOP:
1754 ret = fsi_hw_shutdown(fsi, dai->dev);
1755 fsi_stream_stop(fsi, io);
1756 fsi_stream_quit(fsi, io);
1763 static int fsi_set_fmt_dai(struct fsi_priv *fsi, unsigned int fmt)
1765 switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
1766 case SND_SOC_DAIFMT_I2S:
1770 case SND_SOC_DAIFMT_LEFT_J:
1781 static int fsi_set_fmt_spdif(struct fsi_priv *fsi)
1783 struct fsi_master *master = fsi_get_master(fsi);
1785 if (fsi_version(master) < 2)
1788 fsi->fmt = CR_DTMD_SPDIF_PCM | CR_PCM;
1794 static int fsi_dai_set_fmt(struct snd_soc_dai *dai, unsigned int fmt)
1796 struct fsi_priv *fsi = fsi_get_priv_frm_dai(dai);
1797 set_rate_func set_rate = fsi_get_info_set_rate(fsi);
1800 /* set master/slave audio interface */
1801 switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
1802 case SND_SOC_DAIFMT_CBM_CFM:
1803 fsi->clk_master = 1;
1805 case SND_SOC_DAIFMT_CBS_CFS:
1811 /* set clock inversion */
1812 switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
1813 case SND_SOC_DAIFMT_NB_IF:
1814 fsi->bit_clk_inv = 0;
1815 fsi->lr_clk_inv = 1;
1817 case SND_SOC_DAIFMT_IB_NF:
1818 fsi->bit_clk_inv = 1;
1819 fsi->lr_clk_inv = 0;
1821 case SND_SOC_DAIFMT_IB_IF:
1822 fsi->bit_clk_inv = 1;
1823 fsi->lr_clk_inv = 1;
1825 case SND_SOC_DAIFMT_NB_NF:
1827 fsi->bit_clk_inv = 0;
1828 fsi->lr_clk_inv = 0;
1832 if (fsi_is_clk_master(fsi)) {
1836 * set_rate will be deleted
1839 dev_warn(dai->dev, "set_rate will be removed soon\n");
1842 fsi_clk_init(dai->dev, fsi, 0, 1, 1,
1843 fsi_clk_set_rate_cpg);
1845 fsi_clk_init(dai->dev, fsi, 1, 1, 0,
1846 fsi_clk_set_rate_external);
1850 if (fsi_is_spdif(fsi))
1851 ret = fsi_set_fmt_spdif(fsi);
1853 ret = fsi_set_fmt_dai(fsi, fmt & SND_SOC_DAIFMT_FORMAT_MASK);
1858 static int fsi_dai_hw_params(struct snd_pcm_substream *substream,
1859 struct snd_pcm_hw_params *params,
1860 struct snd_soc_dai *dai)
1862 struct fsi_priv *fsi = fsi_get_priv(substream);
1864 if (fsi_is_clk_master(fsi)) {
1865 fsi->rate = params_rate(params);
1866 fsi_clk_valid(fsi, fsi->rate);
1872 static const struct snd_soc_dai_ops fsi_dai_ops = {
1873 .startup = fsi_dai_startup,
1874 .shutdown = fsi_dai_shutdown,
1875 .trigger = fsi_dai_trigger,
1876 .set_fmt = fsi_dai_set_fmt,
1877 .hw_params = fsi_dai_hw_params,
1884 static struct snd_pcm_hardware fsi_pcm_hardware = {
1885 .info = SNDRV_PCM_INFO_INTERLEAVED |
1886 SNDRV_PCM_INFO_MMAP |
1887 SNDRV_PCM_INFO_MMAP_VALID |
1888 SNDRV_PCM_INFO_PAUSE,
1889 .formats = FSI_FMTS,
1895 .buffer_bytes_max = 64 * 1024,
1896 .period_bytes_min = 32,
1897 .period_bytes_max = 8192,
1903 static int fsi_pcm_open(struct snd_pcm_substream *substream)
1905 struct snd_pcm_runtime *runtime = substream->runtime;
1908 snd_soc_set_runtime_hwparams(substream, &fsi_pcm_hardware);
1910 ret = snd_pcm_hw_constraint_integer(runtime,
1911 SNDRV_PCM_HW_PARAM_PERIODS);
1916 static int fsi_hw_params(struct snd_pcm_substream *substream,
1917 struct snd_pcm_hw_params *hw_params)
1919 return snd_pcm_lib_malloc_pages(substream,
1920 params_buffer_bytes(hw_params));
1923 static int fsi_hw_free(struct snd_pcm_substream *substream)
1925 return snd_pcm_lib_free_pages(substream);
1928 static snd_pcm_uframes_t fsi_pointer(struct snd_pcm_substream *substream)
1930 struct fsi_priv *fsi = fsi_get_priv(substream);
1931 struct fsi_stream *io = fsi_stream_get(fsi, substream);
1933 return fsi_sample2frame(fsi, io->buff_sample_pos);
1936 static struct snd_pcm_ops fsi_pcm_ops = {
1937 .open = fsi_pcm_open,
1938 .ioctl = snd_pcm_lib_ioctl,
1939 .hw_params = fsi_hw_params,
1940 .hw_free = fsi_hw_free,
1941 .pointer = fsi_pointer,
1948 #define PREALLOC_BUFFER (32 * 1024)
1949 #define PREALLOC_BUFFER_MAX (32 * 1024)
1951 static void fsi_pcm_free(struct snd_pcm *pcm)
1953 snd_pcm_lib_preallocate_free_for_all(pcm);
1956 static int fsi_pcm_new(struct snd_soc_pcm_runtime *rtd)
1958 struct snd_pcm *pcm = rtd->pcm;
1961 * dont use SNDRV_DMA_TYPE_DEV, since it will oops the SH kernel
1962 * in MMAP mode (i.e. aplay -M)
1964 return snd_pcm_lib_preallocate_pages_for_all(
1966 SNDRV_DMA_TYPE_CONTINUOUS,
1967 snd_dma_continuous_data(GFP_KERNEL),
1968 PREALLOC_BUFFER, PREALLOC_BUFFER_MAX);
1975 static struct snd_soc_dai_driver fsi_soc_dai[] = {
1980 .formats = FSI_FMTS,
1986 .formats = FSI_FMTS,
1990 .ops = &fsi_dai_ops,
1996 .formats = FSI_FMTS,
2002 .formats = FSI_FMTS,
2006 .ops = &fsi_dai_ops,
2010 static struct snd_soc_platform_driver fsi_soc_platform = {
2011 .ops = &fsi_pcm_ops,
2012 .pcm_new = fsi_pcm_new,
2013 .pcm_free = fsi_pcm_free,
2019 static void fsi_port_info_init(struct fsi_priv *fsi,
2020 struct sh_fsi_port_info *info)
2022 if (info->flags & SH_FSI_FMT_SPDIF)
2025 if (info->flags & SH_FSI_CLK_CPG)
2028 if (info->flags & SH_FSI_ENABLE_STREAM_MODE)
2029 fsi->enable_stream = 1;
2032 static void fsi_handler_init(struct fsi_priv *fsi,
2033 struct sh_fsi_port_info *info)
2035 fsi->playback.handler = &fsi_pio_push_handler; /* default PIO */
2036 fsi->playback.priv = fsi;
2037 fsi->capture.handler = &fsi_pio_pop_handler; /* default PIO */
2038 fsi->capture.priv = fsi;
2041 fsi->playback.slave.shdma_slave.slave_id = info->tx_id;
2042 fsi->playback.handler = &fsi_dma_push_handler;
2046 static int fsi_probe(struct platform_device *pdev)
2048 struct fsi_master *master;
2049 const struct platform_device_id *id_entry;
2050 struct sh_fsi_platform_info *info = pdev->dev.platform_data;
2051 struct sh_fsi_port_info nul_info, *pinfo;
2052 struct fsi_priv *fsi;
2053 struct resource *res;
2061 id_entry = pdev->id_entry;
2063 dev_err(&pdev->dev, "unknown fsi device\n");
2067 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
2068 irq = platform_get_irq(pdev, 0);
2069 if (!res || (int)irq <= 0) {
2070 dev_err(&pdev->dev, "Not enough FSI platform resources.\n");
2074 master = devm_kzalloc(&pdev->dev, sizeof(*master), GFP_KERNEL);
2076 dev_err(&pdev->dev, "Could not allocate master\n");
2080 master->base = devm_ioremap_nocache(&pdev->dev,
2081 res->start, resource_size(res));
2082 if (!master->base) {
2083 dev_err(&pdev->dev, "Unable to ioremap FSI registers.\n");
2087 /* master setting */
2089 master->core = (struct fsi_core *)id_entry->driver_data;
2090 spin_lock_init(&master->lock);
2093 pinfo = (info) ? &info->port_a : &nul_info;
2094 fsi = &master->fsia;
2095 fsi->base = master->base;
2096 fsi->master = master;
2098 fsi_port_info_init(fsi, pinfo);
2099 fsi_handler_init(fsi, pinfo);
2100 ret = fsi_stream_probe(fsi, &pdev->dev);
2102 dev_err(&pdev->dev, "FSIA stream probe failed\n");
2107 pinfo = (info) ? &info->port_b : &nul_info;
2108 fsi = &master->fsib;
2109 fsi->base = master->base + 0x40;
2110 fsi->master = master;
2112 fsi_port_info_init(fsi, pinfo);
2113 fsi_handler_init(fsi, pinfo);
2114 ret = fsi_stream_probe(fsi, &pdev->dev);
2116 dev_err(&pdev->dev, "FSIB stream probe failed\n");
2120 pm_runtime_enable(&pdev->dev);
2121 dev_set_drvdata(&pdev->dev, master);
2123 ret = devm_request_irq(&pdev->dev, irq, &fsi_interrupt, 0,
2124 id_entry->name, master);
2126 dev_err(&pdev->dev, "irq request err\n");
2130 ret = snd_soc_register_platform(&pdev->dev, &fsi_soc_platform);
2132 dev_err(&pdev->dev, "cannot snd soc register\n");
2136 ret = snd_soc_register_dais(&pdev->dev, fsi_soc_dai,
2137 ARRAY_SIZE(fsi_soc_dai));
2139 dev_err(&pdev->dev, "cannot snd dai register\n");
2146 snd_soc_unregister_platform(&pdev->dev);
2148 pm_runtime_disable(&pdev->dev);
2149 fsi_stream_remove(&master->fsib);
2151 fsi_stream_remove(&master->fsia);
2156 static int fsi_remove(struct platform_device *pdev)
2158 struct fsi_master *master;
2160 master = dev_get_drvdata(&pdev->dev);
2162 pm_runtime_disable(&pdev->dev);
2164 snd_soc_unregister_dais(&pdev->dev, ARRAY_SIZE(fsi_soc_dai));
2165 snd_soc_unregister_platform(&pdev->dev);
2167 fsi_stream_remove(&master->fsia);
2168 fsi_stream_remove(&master->fsib);
2173 static void __fsi_suspend(struct fsi_priv *fsi,
2174 struct fsi_stream *io,
2177 if (!fsi_stream_is_working(fsi, io))
2180 fsi_stream_stop(fsi, io);
2181 fsi_hw_shutdown(fsi, dev);
2184 static void __fsi_resume(struct fsi_priv *fsi,
2185 struct fsi_stream *io,
2188 if (!fsi_stream_is_working(fsi, io))
2191 fsi_hw_startup(fsi, io, dev);
2192 fsi_stream_start(fsi, io);
2195 static int fsi_suspend(struct device *dev)
2197 struct fsi_master *master = dev_get_drvdata(dev);
2198 struct fsi_priv *fsia = &master->fsia;
2199 struct fsi_priv *fsib = &master->fsib;
2201 __fsi_suspend(fsia, &fsia->playback, dev);
2202 __fsi_suspend(fsia, &fsia->capture, dev);
2204 __fsi_suspend(fsib, &fsib->playback, dev);
2205 __fsi_suspend(fsib, &fsib->capture, dev);
2210 static int fsi_resume(struct device *dev)
2212 struct fsi_master *master = dev_get_drvdata(dev);
2213 struct fsi_priv *fsia = &master->fsia;
2214 struct fsi_priv *fsib = &master->fsib;
2216 __fsi_resume(fsia, &fsia->playback, dev);
2217 __fsi_resume(fsia, &fsia->capture, dev);
2219 __fsi_resume(fsib, &fsib->playback, dev);
2220 __fsi_resume(fsib, &fsib->capture, dev);
2225 static struct dev_pm_ops fsi_pm_ops = {
2226 .suspend = fsi_suspend,
2227 .resume = fsi_resume,
2230 static struct fsi_core fsi1_core = {
2239 static struct fsi_core fsi2_core = {
2243 .int_st = CPU_INT_ST,
2246 .a_mclk = A_MST_CTLR,
2247 .b_mclk = B_MST_CTLR,
2250 static struct platform_device_id fsi_id_table[] = {
2251 { "sh_fsi", (kernel_ulong_t)&fsi1_core },
2252 { "sh_fsi2", (kernel_ulong_t)&fsi2_core },
2255 MODULE_DEVICE_TABLE(platform, fsi_id_table);
2257 static struct platform_driver fsi_driver = {
2259 .name = "fsi-pcm-audio",
2263 .remove = fsi_remove,
2264 .id_table = fsi_id_table,
2267 module_platform_driver(fsi_driver);
2269 MODULE_LICENSE("GPL");
2270 MODULE_DESCRIPTION("SuperH onchip FSI audio driver");
2271 MODULE_AUTHOR("Kuninori Morimoto <morimoto.kuninori@renesas.com>");
2272 MODULE_ALIAS("platform:fsi-pcm-audio");