Pileus Git - ~andy/linux/blob - sound/soc/omap/omap-mcpdm.c

   1 /*
   2  * omap-mcpdm.c  --  OMAP ALSA SoC DAI driver using McPDM port
   3  *
   4  * Copyright (C) 2009 - 2011 Texas Instruments
   5  *
   6  * Author: Misael Lopez Cruz <misael.lopez@ti.com>
   7  * Contact: Jorge Eduardo Candelaria <x0107209@ti.com>
   8  *          Margarita Olaya <magi.olaya@ti.com>
   9  *          Peter Ujfalusi <peter.ujfalusi@ti.com>
  10  *
  11  * This program is free software; you can redistribute it and/or
  12  * modify it under the terms of the GNU General Public License
  13  * version 2 as published by the Free Software Foundation.
  14  *
  15  * This program is distributed in the hope that it will be useful, but
  16  * WITHOUT ANY WARRANTY; without even the implied warranty of
  17  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
  18  * General Public License for more details.
  19  *
  20  * You should have received a copy of the GNU General Public License
  21  * along with this program; if not, write to the Free Software
  22  * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
  23  * 02110-1301 USA
  24  *
  25  */
  26
  27 #include <linux/init.h>
  28 #include <linux/module.h>
  29 #include <linux/platform_device.h>
  30 #include <linux/interrupt.h>
  31 #include <linux/err.h>
  32 #include <linux/io.h>
  33 #include <linux/irq.h>
  34 #include <linux/slab.h>
  35 #include <linux/pm_runtime.h>
  36 #include <linux/of_device.h>
  37
  38 #include <sound/core.h>
  39 #include <sound/pcm.h>
  40 #include <sound/pcm_params.h>
  41 #include <sound/soc.h>
  42
  43 #include "omap-mcpdm.h"
  44 #include "omap-pcm.h"
  45
  46 struct mcpdm_link_config {
  47         u32 link_mask; /* channel mask for the direction */
  48         u32 threshold; /* FIFO threshold */
  49 };
  50
  51 struct omap_mcpdm {
  52         struct device *dev;
  53         unsigned long phys_base;
  54         void __iomem *io_base;
  55         int irq;
  56
  57         struct mutex mutex;
  58
  59         /* Playback/Capture configuration */
  60         struct mcpdm_link_config config[2];
  61
  62         /* McPDM dn offsets for rx1, and 2 channels */
  63         u32 dn_rx_offset;
  64
  65         /* McPDM needs to be restarted due to runtime reconfiguration */
  66         bool restart;
  67 };
  68
  69 /*
  70  * Stream DMA parameters
  71  */
  72 static struct omap_pcm_dma_data omap_mcpdm_dai_dma_params[] = {
  73         {
  74                 .name = "Audio playback",
  75         },
  76         {
  77                 .name = "Audio capture",
  78         },
  79 };
  80
  81 static inline void omap_mcpdm_write(struct omap_mcpdm *mcpdm, u16 reg, u32 val)
  82 {
  83         __raw_writel(val, mcpdm->io_base + reg);
  84 }
  85
  86 static inline int omap_mcpdm_read(struct omap_mcpdm *mcpdm, u16 reg)
  87 {
  88         return __raw_readl(mcpdm->io_base + reg);
  89 }
  90
  91 #ifdef DEBUG
  92 static void omap_mcpdm_reg_dump(struct omap_mcpdm *mcpdm)
  93 {
  94         dev_dbg(mcpdm->dev, "***********************\n");
  95         dev_dbg(mcpdm->dev, "IRQSTATUS_RAW:  0x%04x\n",
  96                         omap_mcpdm_read(mcpdm, MCPDM_REG_IRQSTATUS_RAW));
  97         dev_dbg(mcpdm->dev, "IRQSTATUS:  0x%04x\n",
  98                         omap_mcpdm_read(mcpdm, MCPDM_REG_IRQSTATUS));
  99         dev_dbg(mcpdm->dev, "IRQENABLE_SET:  0x%04x\n",
 100                         omap_mcpdm_read(mcpdm, MCPDM_REG_IRQENABLE_SET));
 101         dev_dbg(mcpdm->dev, "IRQENABLE_CLR:  0x%04x\n",
 102                         omap_mcpdm_read(mcpdm, MCPDM_REG_IRQENABLE_CLR));
 103         dev_dbg(mcpdm->dev, "IRQWAKE_EN: 0x%04x\n",
 104                         omap_mcpdm_read(mcpdm, MCPDM_REG_IRQWAKE_EN));
 105         dev_dbg(mcpdm->dev, "DMAENABLE_SET: 0x%04x\n",
 106                         omap_mcpdm_read(mcpdm, MCPDM_REG_DMAENABLE_SET));
 107         dev_dbg(mcpdm->dev, "DMAENABLE_CLR:  0x%04x\n",
 108                         omap_mcpdm_read(mcpdm, MCPDM_REG_DMAENABLE_CLR));
 109         dev_dbg(mcpdm->dev, "DMAWAKEEN:  0x%04x\n",
 110                         omap_mcpdm_read(mcpdm, MCPDM_REG_DMAWAKEEN));
 111         dev_dbg(mcpdm->dev, "CTRL:  0x%04x\n",
 112                         omap_mcpdm_read(mcpdm, MCPDM_REG_CTRL));
 113         dev_dbg(mcpdm->dev, "DN_DATA:  0x%04x\n",
 114                         omap_mcpdm_read(mcpdm, MCPDM_REG_DN_DATA));
 115         dev_dbg(mcpdm->dev, "UP_DATA: 0x%04x\n",
 116                         omap_mcpdm_read(mcpdm, MCPDM_REG_UP_DATA));
 117         dev_dbg(mcpdm->dev, "FIFO_CTRL_DN: 0x%04x\n",
 118                         omap_mcpdm_read(mcpdm, MCPDM_REG_FIFO_CTRL_DN));
 119         dev_dbg(mcpdm->dev, "FIFO_CTRL_UP:  0x%04x\n",
 120                         omap_mcpdm_read(mcpdm, MCPDM_REG_FIFO_CTRL_UP));
 121         dev_dbg(mcpdm->dev, "***********************\n");
 122 }
 123 #else
 124 static void omap_mcpdm_reg_dump(struct omap_mcpdm *mcpdm) {}
 125 #endif
 126
 127 /*
 128  * Enables the transfer through the PDM interface to/from the Phoenix
 129  * codec by enabling the corresponding UP or DN channels.
 130  */
 131 static void omap_mcpdm_start(struct omap_mcpdm *mcpdm)
 132 {
 133         u32 ctrl = omap_mcpdm_read(mcpdm, MCPDM_REG_CTRL);
 134         u32 link_mask = mcpdm->config[0].link_mask | mcpdm->config[1].link_mask;
 135
 136         ctrl |= (MCPDM_SW_DN_RST | MCPDM_SW_UP_RST);
 137         omap_mcpdm_write(mcpdm, MCPDM_REG_CTRL, ctrl);
 138
 139         ctrl |= link_mask;
 140         omap_mcpdm_write(mcpdm, MCPDM_REG_CTRL, ctrl);
 141
 142         ctrl &= ~(MCPDM_SW_DN_RST | MCPDM_SW_UP_RST);
 143         omap_mcpdm_write(mcpdm, MCPDM_REG_CTRL, ctrl);
 144 }
 145
 146 /*
 147  * Disables the transfer through the PDM interface to/from the Phoenix
 148  * codec by disabling the corresponding UP or DN channels.
 149  */
 150 static void omap_mcpdm_stop(struct omap_mcpdm *mcpdm)
 151 {
 152         u32 ctrl = omap_mcpdm_read(mcpdm, MCPDM_REG_CTRL);
 153         u32 link_mask = MCPDM_PDM_DN_MASK | MCPDM_PDM_UP_MASK;
 154
 155         ctrl |= (MCPDM_SW_DN_RST | MCPDM_SW_UP_RST);
 156         omap_mcpdm_write(mcpdm, MCPDM_REG_CTRL, ctrl);
 157
 158         ctrl &= ~(link_mask);
 159         omap_mcpdm_write(mcpdm, MCPDM_REG_CTRL, ctrl);
 160
 161         ctrl &= ~(MCPDM_SW_DN_RST | MCPDM_SW_UP_RST);
 162         omap_mcpdm_write(mcpdm, MCPDM_REG_CTRL, ctrl);
 163
 164 }
 165
 166 /*
 167  * Is the physical McPDM interface active.
 168  */
 169 static inline int omap_mcpdm_active(struct omap_mcpdm *mcpdm)
 170 {
 171         return omap_mcpdm_read(mcpdm, MCPDM_REG_CTRL) &
 172                                         (MCPDM_PDM_DN_MASK | MCPDM_PDM_UP_MASK);
 173 }
 174
 175 /*
 176  * Configures McPDM uplink, and downlink for audio.
 177  * This function should be called before omap_mcpdm_start.
 178  */
 179 static void omap_mcpdm_open_streams(struct omap_mcpdm *mcpdm)
 180 {
 181         omap_mcpdm_write(mcpdm, MCPDM_REG_IRQENABLE_SET,
 182                         MCPDM_DN_IRQ_EMPTY | MCPDM_DN_IRQ_FULL |
 183                         MCPDM_UP_IRQ_EMPTY | MCPDM_UP_IRQ_FULL);
 184
 185         /* Enable DN RX1/2 offset cancellation feature, if configured */
 186         if (mcpdm->dn_rx_offset) {
 187                 u32 dn_offset = mcpdm->dn_rx_offset;
 188
 189                 omap_mcpdm_write(mcpdm, MCPDM_REG_DN_OFFSET, dn_offset);
 190                 dn_offset |= (MCPDM_DN_OFST_RX1_EN | MCPDM_DN_OFST_RX2_EN);
 191                 omap_mcpdm_write(mcpdm, MCPDM_REG_DN_OFFSET, dn_offset);
 192         }
 193
 194         omap_mcpdm_write(mcpdm, MCPDM_REG_FIFO_CTRL_DN,
 195                          mcpdm->config[SNDRV_PCM_STREAM_PLAYBACK].threshold);
 196         omap_mcpdm_write(mcpdm, MCPDM_REG_FIFO_CTRL_UP,
 197                          mcpdm->config[SNDRV_PCM_STREAM_CAPTURE].threshold);
 198
 199         omap_mcpdm_write(mcpdm, MCPDM_REG_DMAENABLE_SET,
 200                         MCPDM_DMA_DN_ENABLE | MCPDM_DMA_UP_ENABLE);
 201 }
 202
 203 /*
 204  * Cleans McPDM uplink, and downlink configuration.
 205  * This function should be called when the stream is closed.
 206  */
 207 static void omap_mcpdm_close_streams(struct omap_mcpdm *mcpdm)
 208 {
 209         /* Disable irq request generation for downlink */
 210         omap_mcpdm_write(mcpdm, MCPDM_REG_IRQENABLE_CLR,
 211                         MCPDM_DN_IRQ_EMPTY | MCPDM_DN_IRQ_FULL);
 212
 213         /* Disable DMA request generation for downlink */
 214         omap_mcpdm_write(mcpdm, MCPDM_REG_DMAENABLE_CLR, MCPDM_DMA_DN_ENABLE);
 215
 216         /* Disable irq request generation for uplink */
 217         omap_mcpdm_write(mcpdm, MCPDM_REG_IRQENABLE_CLR,
 218                         MCPDM_UP_IRQ_EMPTY | MCPDM_UP_IRQ_FULL);
 219
 220         /* Disable DMA request generation for uplink */
 221         omap_mcpdm_write(mcpdm, MCPDM_REG_DMAENABLE_CLR, MCPDM_DMA_UP_ENABLE);
 222
 223         /* Disable RX1/2 offset cancellation */
 224         if (mcpdm->dn_rx_offset)
 225                 omap_mcpdm_write(mcpdm, MCPDM_REG_DN_OFFSET, 0);
 226 }
 227
 228 static irqreturn_t omap_mcpdm_irq_handler(int irq, void *dev_id)
 229 {
 230         struct omap_mcpdm *mcpdm = dev_id;
 231         int irq_status;
 232
 233         irq_status = omap_mcpdm_read(mcpdm, MCPDM_REG_IRQSTATUS);
 234
 235         /* Acknowledge irq event */
 236         omap_mcpdm_write(mcpdm, MCPDM_REG_IRQSTATUS, irq_status);
 237
 238         if (irq_status & MCPDM_DN_IRQ_FULL)
 239                 dev_dbg(mcpdm->dev, "DN (playback) FIFO Full\n");
 240
 241         if (irq_status & MCPDM_DN_IRQ_EMPTY)
 242                 dev_dbg(mcpdm->dev, "DN (playback) FIFO Empty\n");
 243
 244         if (irq_status & MCPDM_DN_IRQ)
 245                 dev_dbg(mcpdm->dev, "DN (playback) write request\n");
 246
 247         if (irq_status & MCPDM_UP_IRQ_FULL)
 248                 dev_dbg(mcpdm->dev, "UP (capture) FIFO Full\n");
 249
 250         if (irq_status & MCPDM_UP_IRQ_EMPTY)
 251                 dev_dbg(mcpdm->dev, "UP (capture) FIFO Empty\n");
 252
 253         if (irq_status & MCPDM_UP_IRQ)
 254                 dev_dbg(mcpdm->dev, "UP (capture) write request\n");
 255
 256         return IRQ_HANDLED;
 257 }
 258
 259 static int omap_mcpdm_dai_startup(struct snd_pcm_substream *substream,
 260                                   struct snd_soc_dai *dai)
 261 {
 262         struct omap_mcpdm *mcpdm = snd_soc_dai_get_drvdata(dai);
 263
 264         mutex_lock(&mcpdm->mutex);
 265
 266         if (!dai->active) {
 267                 u32 ctrl = omap_mcpdm_read(mcpdm, MCPDM_REG_CTRL);
 268
 269                 omap_mcpdm_write(mcpdm, MCPDM_REG_CTRL, ctrl | MCPDM_WD_EN);
 270                 omap_mcpdm_open_streams(mcpdm);
 271         }
 272         mutex_unlock(&mcpdm->mutex);
 273
 274         snd_soc_dai_set_dma_data(dai, substream,
 275                                  &omap_mcpdm_dai_dma_params[substream->stream]);
 276
 277         return 0;
 278 }
 279
 280 static void omap_mcpdm_dai_shutdown(struct snd_pcm_substream *substream,
 281                                   struct snd_soc_dai *dai)
 282 {
 283         struct omap_mcpdm *mcpdm = snd_soc_dai_get_drvdata(dai);
 284
 285         mutex_lock(&mcpdm->mutex);
 286
 287         if (!dai->active) {
 288                 if (omap_mcpdm_active(mcpdm)) {
 289                         omap_mcpdm_stop(mcpdm);
 290                         omap_mcpdm_close_streams(mcpdm);
 291                         mcpdm->config[0].link_mask = 0;
 292                         mcpdm->config[1].link_mask = 0;
 293                 }
 294         }
 295
 296         mutex_unlock(&mcpdm->mutex);
 297 }
 298
 299 static int omap_mcpdm_dai_hw_params(struct snd_pcm_substream *substream,
 300                                     struct snd_pcm_hw_params *params,
 301                                     struct snd_soc_dai *dai)
 302 {
 303         struct omap_mcpdm *mcpdm = snd_soc_dai_get_drvdata(dai);
 304         int stream = substream->stream;
 305         struct omap_pcm_dma_data *dma_data;
 306         u32 threshold;
 307         int channels;
 308         int link_mask = 0;
 309
 310         channels = params_channels(params);
 311         switch (channels) {
 312         case 5:
 313                 if (stream == SNDRV_PCM_STREAM_CAPTURE)
 314                         /* up to 3 channels for capture */
 315                         return -EINVAL;
 316                 link_mask |= 1 << 4;
 317         case 4:
 318                 if (stream == SNDRV_PCM_STREAM_CAPTURE)
 319                         /* up to 3 channels for capture */
 320                         return -EINVAL;
 321                 link_mask |= 1 << 3;
 322         case 3:
 323                 link_mask |= 1 << 2;
 324         case 2:
 325                 link_mask |= 1 << 1;
 326         case 1:
 327                 link_mask |= 1 << 0;
 328                 break;
 329         default:
 330                 /* unsupported number of channels */
 331                 return -EINVAL;
 332         }
 333
 334         dma_data = snd_soc_dai_get_dma_data(dai, substream);
 335
 336         threshold = mcpdm->config[stream].threshold;
 337         /* Configure McPDM channels, and DMA packet size */
 338         if (stream == SNDRV_PCM_STREAM_PLAYBACK) {
 339                 link_mask <<= 3;
 340
 341                 /* If capture is not running assume a stereo stream to come */
 342                 if (!mcpdm->config[!stream].link_mask)
 343                         mcpdm->config[!stream].link_mask = 0x3;
 344
 345                 dma_data->packet_size =
 346                                 (MCPDM_DN_THRES_MAX - threshold) * channels;
 347         } else {
 348                 /* If playback is not running assume a stereo stream to come */
 349                 if (!mcpdm->config[!stream].link_mask)
 350                         mcpdm->config[!stream].link_mask = (0x3 << 3);
 351
 352                 dma_data->packet_size = threshold * channels;
 353         }
 354
 355         /* Check if we need to restart McPDM with this stream */
 356         if (mcpdm->config[stream].link_mask &&
 357             mcpdm->config[stream].link_mask != link_mask)
 358                 mcpdm->restart = true;
 359
 360         mcpdm->config[stream].link_mask = link_mask;
 361
 362         return 0;
 363 }
 364
 365 static int omap_mcpdm_prepare(struct snd_pcm_substream *substream,
 366                                   struct snd_soc_dai *dai)
 367 {
 368         struct omap_mcpdm *mcpdm = snd_soc_dai_get_drvdata(dai);
 369
 370         if (!omap_mcpdm_active(mcpdm)) {
 371                 omap_mcpdm_start(mcpdm);
 372                 omap_mcpdm_reg_dump(mcpdm);
 373         } else if (mcpdm->restart) {
 374                 omap_mcpdm_stop(mcpdm);
 375                 omap_mcpdm_start(mcpdm);
 376                 mcpdm->restart = false;
 377                 omap_mcpdm_reg_dump(mcpdm);
 378         }
 379
 380         return 0;
 381 }
 382
 383 static const struct snd_soc_dai_ops omap_mcpdm_dai_ops = {
 384         .startup        = omap_mcpdm_dai_startup,
 385         .shutdown       = omap_mcpdm_dai_shutdown,
 386         .hw_params      = omap_mcpdm_dai_hw_params,
 387         .prepare        = omap_mcpdm_prepare,
 388 };
 389
 390 static int omap_mcpdm_probe(struct snd_soc_dai *dai)
 391 {
 392         struct omap_mcpdm *mcpdm = snd_soc_dai_get_drvdata(dai);
 393         int ret;
 394
 395         pm_runtime_enable(mcpdm->dev);
 396
 397         /* Disable lines while request is ongoing */
 398         pm_runtime_get_sync(mcpdm->dev);
 399         omap_mcpdm_write(mcpdm, MCPDM_REG_CTRL, 0x00);
 400
 401         ret = devm_request_irq(mcpdm->dev, mcpdm->irq, omap_mcpdm_irq_handler,
 402                                 0, "McPDM", (void *)mcpdm);
 403
 404         pm_runtime_put_sync(mcpdm->dev);
 405
 406         if (ret) {
 407                 dev_err(mcpdm->dev, "Request for IRQ failed\n");
 408                 pm_runtime_disable(mcpdm->dev);
 409         }
 410
 411         /* Configure McPDM threshold values */
 412         mcpdm->config[SNDRV_PCM_STREAM_PLAYBACK].threshold = 2;
 413         mcpdm->config[SNDRV_PCM_STREAM_CAPTURE].threshold =
 414                                                         MCPDM_UP_THRES_MAX - 3;
 415         return ret;
 416 }
 417
 418 static int omap_mcpdm_remove(struct snd_soc_dai *dai)
 419 {
 420         struct omap_mcpdm *mcpdm = snd_soc_dai_get_drvdata(dai);
 421
 422         pm_runtime_disable(mcpdm->dev);
 423
 424         return 0;
 425 }
 426
 427 #define OMAP_MCPDM_RATES        (SNDRV_PCM_RATE_88200 | SNDRV_PCM_RATE_96000)
 428 #define OMAP_MCPDM_FORMATS      SNDRV_PCM_FMTBIT_S32_LE
 429
 430 static struct snd_soc_dai_driver omap_mcpdm_dai = {
 431         .probe = omap_mcpdm_probe,
 432         .remove = omap_mcpdm_remove,
 433         .probe_order = SND_SOC_COMP_ORDER_LATE,
 434         .remove_order = SND_SOC_COMP_ORDER_EARLY,
 435         .playback = {
 436                 .channels_min = 1,
 437                 .channels_max = 5,
 438                 .rates = OMAP_MCPDM_RATES,
 439                 .formats = OMAP_MCPDM_FORMATS,
 440                 .sig_bits = 24,
 441         },
 442         .capture = {
 443                 .channels_min = 1,
 444                 .channels_max = 3,
 445                 .rates = OMAP_MCPDM_RATES,
 446                 .formats = OMAP_MCPDM_FORMATS,
 447                 .sig_bits = 24,
 448         },
 449         .ops = &omap_mcpdm_dai_ops,
 450 };
 451
 452 void omap_mcpdm_configure_dn_offsets(struct snd_soc_pcm_runtime *rtd,
 453                                     u8 rx1, u8 rx2)
 454 {
 455         struct omap_mcpdm *mcpdm = snd_soc_dai_get_drvdata(rtd->cpu_dai);
 456
 457         mcpdm->dn_rx_offset = MCPDM_DNOFST_RX1(rx1) | MCPDM_DNOFST_RX2(rx2);
 458 }
 459 EXPORT_SYMBOL_GPL(omap_mcpdm_configure_dn_offsets);
 460
 461 static int asoc_mcpdm_probe(struct platform_device *pdev)
 462 {
 463         struct omap_mcpdm *mcpdm;
 464         struct resource *res;
 465
 466         mcpdm = devm_kzalloc(&pdev->dev, sizeof(struct omap_mcpdm), GFP_KERNEL);
 467         if (!mcpdm)
 468                 return -ENOMEM;
 469
 470         platform_set_drvdata(pdev, mcpdm);
 471
 472         mutex_init(&mcpdm->mutex);
 473
 474         res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "dma");
 475         if (res == NULL)
 476                 return -ENOMEM;
 477
 478         omap_mcpdm_dai_dma_params[0].port_addr = res->start + MCPDM_REG_DN_DATA;
 479         omap_mcpdm_dai_dma_params[1].port_addr = res->start + MCPDM_REG_UP_DATA;
 480
 481         res = platform_get_resource_byname(pdev, IORESOURCE_DMA, "dn_link");
 482         if (!res)
 483                 return -ENODEV;
 484
 485         omap_mcpdm_dai_dma_params[0].dma_req = res->start;
 486
 487         res = platform_get_resource_byname(pdev, IORESOURCE_DMA, "up_link");
 488         if (!res)
 489                 return -ENODEV;
 490
 491         omap_mcpdm_dai_dma_params[1].dma_req = res->start;
 492
 493         res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "mpu");
 494         if (res == NULL)
 495                 return -ENOMEM;
 496
 497         mcpdm->io_base = devm_ioremap_resource(&pdev->dev, res);
 498         if (IS_ERR(mcpdm->io_base))
 499                 return PTR_ERR(mcpdm->io_base);
 500
 501         mcpdm->irq = platform_get_irq(pdev, 0);
 502         if (mcpdm->irq < 0)
 503                 return mcpdm->irq;
 504
 505         mcpdm->dev = &pdev->dev;
 506
 507         return snd_soc_register_dai(&pdev->dev, &omap_mcpdm_dai);
 508 }
 509
 510 static int asoc_mcpdm_remove(struct platform_device *pdev)
 511 {
 512         snd_soc_unregister_dai(&pdev->dev);
 513         return 0;
 514 }
 515
 516 static const struct of_device_id omap_mcpdm_of_match[] = {
 517         { .compatible = "ti,omap4-mcpdm", },
 518         { }
 519 };
 520 MODULE_DEVICE_TABLE(of, omap_mcpdm_of_match);
 521
 522 static struct platform_driver asoc_mcpdm_driver = {
 523         .driver = {
 524                 .name   = "omap-mcpdm",
 525                 .owner  = THIS_MODULE,
 526                 .of_match_table = omap_mcpdm_of_match,
 527         },
 528
 529         .probe  = asoc_mcpdm_probe,
 530         .remove = asoc_mcpdm_remove,
 531 };
 532
 533 module_platform_driver(asoc_mcpdm_driver);
 534
 535 MODULE_ALIAS("platform:omap-mcpdm");
 536 MODULE_AUTHOR("Misael Lopez Cruz <misael.lopez@ti.com>");
 537 MODULE_DESCRIPTION("OMAP PDM SoC Interface");
 538 MODULE_LICENSE("GPL");