Pileus Git - ~andy/linux/blob - sound/soc/codecs/wm_adsp.c

   1 /*
   2  * wm_adsp.c  --  Wolfson ADSP support
   3  *
   4  * Copyright 2012 Wolfson Microelectronics plc
   5  *
   6  * Author: Mark Brown <broonie@opensource.wolfsonmicro.com>
   7  *
   8  * This program is free software; you can redistribute it and/or modify
   9  * it under the terms of the GNU General Public License version 2 as
  10  * published by the Free Software Foundation.
  11  */
  12
  13 #include <linux/module.h>
  14 #include <linux/moduleparam.h>
  15 #include <linux/init.h>
  16 #include <linux/delay.h>
  17 #include <linux/firmware.h>
  18 #include <linux/list.h>
  19 #include <linux/pm.h>
  20 #include <linux/pm_runtime.h>
  21 #include <linux/regmap.h>
  22 #include <linux/regulator/consumer.h>
  23 #include <linux/slab.h>
  24 #include <linux/workqueue.h>
  25 #include <sound/core.h>
  26 #include <sound/pcm.h>
  27 #include <sound/pcm_params.h>
  28 #include <sound/soc.h>
  29 #include <sound/jack.h>
  30 #include <sound/initval.h>
  31 #include <sound/tlv.h>
  32
  33 #include <linux/mfd/arizona/registers.h>
  34
  35 #include "arizona.h"
  36 #include "wm_adsp.h"
  37
  38 #define adsp_crit(_dsp, fmt, ...) \
  39         dev_crit(_dsp->dev, "DSP%d: " fmt, _dsp->num, ##__VA_ARGS__)
  40 #define adsp_err(_dsp, fmt, ...) \
  41         dev_err(_dsp->dev, "DSP%d: " fmt, _dsp->num, ##__VA_ARGS__)
  42 #define adsp_warn(_dsp, fmt, ...) \
  43         dev_warn(_dsp->dev, "DSP%d: " fmt, _dsp->num, ##__VA_ARGS__)
  44 #define adsp_info(_dsp, fmt, ...) \
  45         dev_info(_dsp->dev, "DSP%d: " fmt, _dsp->num, ##__VA_ARGS__)
  46 #define adsp_dbg(_dsp, fmt, ...) \
  47         dev_dbg(_dsp->dev, "DSP%d: " fmt, _dsp->num, ##__VA_ARGS__)
  48
  49 #define ADSP1_CONTROL_1                   0x00
  50 #define ADSP1_CONTROL_2                   0x02
  51 #define ADSP1_CONTROL_3                   0x03
  52 #define ADSP1_CONTROL_4                   0x04
  53 #define ADSP1_CONTROL_5                   0x06
  54 #define ADSP1_CONTROL_6                   0x07
  55 #define ADSP1_CONTROL_7                   0x08
  56 #define ADSP1_CONTROL_8                   0x09
  57 #define ADSP1_CONTROL_9                   0x0A
  58 #define ADSP1_CONTROL_10                  0x0B
  59 #define ADSP1_CONTROL_11                  0x0C
  60 #define ADSP1_CONTROL_12                  0x0D
  61 #define ADSP1_CONTROL_13                  0x0F
  62 #define ADSP1_CONTROL_14                  0x10
  63 #define ADSP1_CONTROL_15                  0x11
  64 #define ADSP1_CONTROL_16                  0x12
  65 #define ADSP1_CONTROL_17                  0x13
  66 #define ADSP1_CONTROL_18                  0x14
  67 #define ADSP1_CONTROL_19                  0x16
  68 #define ADSP1_CONTROL_20                  0x17
  69 #define ADSP1_CONTROL_21                  0x18
  70 #define ADSP1_CONTROL_22                  0x1A
  71 #define ADSP1_CONTROL_23                  0x1B
  72 #define ADSP1_CONTROL_24                  0x1C
  73 #define ADSP1_CONTROL_25                  0x1E
  74 #define ADSP1_CONTROL_26                  0x20
  75 #define ADSP1_CONTROL_27                  0x21
  76 #define ADSP1_CONTROL_28                  0x22
  77 #define ADSP1_CONTROL_29                  0x23
  78 #define ADSP1_CONTROL_30                  0x24
  79 #define ADSP1_CONTROL_31                  0x26
  80
  81 /*
  82  * ADSP1 Control 19
  83  */
  84 #define ADSP1_WDMA_BUFFER_LENGTH_MASK     0x00FF  /* DSP1_WDMA_BUFFER_LENGTH - [7:0] */
  85 #define ADSP1_WDMA_BUFFER_LENGTH_SHIFT         0  /* DSP1_WDMA_BUFFER_LENGTH - [7:0] */
  86 #define ADSP1_WDMA_BUFFER_LENGTH_WIDTH         8  /* DSP1_WDMA_BUFFER_LENGTH - [7:0] */
  87
  88
  89 /*
  90  * ADSP1 Control 30
  91  */
  92 #define ADSP1_DBG_CLK_ENA                 0x0008  /* DSP1_DBG_CLK_ENA */
  93 #define ADSP1_DBG_CLK_ENA_MASK            0x0008  /* DSP1_DBG_CLK_ENA */
  94 #define ADSP1_DBG_CLK_ENA_SHIFT                3  /* DSP1_DBG_CLK_ENA */
  95 #define ADSP1_DBG_CLK_ENA_WIDTH                1  /* DSP1_DBG_CLK_ENA */
  96 #define ADSP1_SYS_ENA                     0x0004  /* DSP1_SYS_ENA */
  97 #define ADSP1_SYS_ENA_MASK                0x0004  /* DSP1_SYS_ENA */
  98 #define ADSP1_SYS_ENA_SHIFT                    2  /* DSP1_SYS_ENA */
  99 #define ADSP1_SYS_ENA_WIDTH                    1  /* DSP1_SYS_ENA */
 100 #define ADSP1_CORE_ENA                    0x0002  /* DSP1_CORE_ENA */
 101 #define ADSP1_CORE_ENA_MASK               0x0002  /* DSP1_CORE_ENA */
 102 #define ADSP1_CORE_ENA_SHIFT                   1  /* DSP1_CORE_ENA */
 103 #define ADSP1_CORE_ENA_WIDTH                   1  /* DSP1_CORE_ENA */
 104 #define ADSP1_START                       0x0001  /* DSP1_START */
 105 #define ADSP1_START_MASK                  0x0001  /* DSP1_START */
 106 #define ADSP1_START_SHIFT                      0  /* DSP1_START */
 107 #define ADSP1_START_WIDTH                      1  /* DSP1_START */
 108
 109 /*
 110  * ADSP1 Control 31
 111  */
 112 #define ADSP1_CLK_SEL_MASK                0x0007  /* CLK_SEL_ENA */
 113 #define ADSP1_CLK_SEL_SHIFT                    0  /* CLK_SEL_ENA */
 114 #define ADSP1_CLK_SEL_WIDTH                    3  /* CLK_SEL_ENA */
 115
 116 #define ADSP2_CONTROL        0x0
 117 #define ADSP2_CLOCKING       0x1
 118 #define ADSP2_STATUS1        0x4
 119 #define ADSP2_WDMA_CONFIG_1 0x30
 120 #define ADSP2_WDMA_CONFIG_2 0x31
 121 #define ADSP2_RDMA_CONFIG_1 0x34
 122
 123 /*
 124  * ADSP2 Control
 125  */
 126
 127 #define ADSP2_MEM_ENA                     0x0010  /* DSP1_MEM_ENA */
 128 #define ADSP2_MEM_ENA_MASK                0x0010  /* DSP1_MEM_ENA */
 129 #define ADSP2_MEM_ENA_SHIFT                    4  /* DSP1_MEM_ENA */
 130 #define ADSP2_MEM_ENA_WIDTH                    1  /* DSP1_MEM_ENA */
 131 #define ADSP2_SYS_ENA                     0x0004  /* DSP1_SYS_ENA */
 132 #define ADSP2_SYS_ENA_MASK                0x0004  /* DSP1_SYS_ENA */
 133 #define ADSP2_SYS_ENA_SHIFT                    2  /* DSP1_SYS_ENA */
 134 #define ADSP2_SYS_ENA_WIDTH                    1  /* DSP1_SYS_ENA */
 135 #define ADSP2_CORE_ENA                    0x0002  /* DSP1_CORE_ENA */
 136 #define ADSP2_CORE_ENA_MASK               0x0002  /* DSP1_CORE_ENA */
 137 #define ADSP2_CORE_ENA_SHIFT                   1  /* DSP1_CORE_ENA */
 138 #define ADSP2_CORE_ENA_WIDTH                   1  /* DSP1_CORE_ENA */
 139 #define ADSP2_START                       0x0001  /* DSP1_START */
 140 #define ADSP2_START_MASK                  0x0001  /* DSP1_START */
 141 #define ADSP2_START_SHIFT                      0  /* DSP1_START */
 142 #define ADSP2_START_WIDTH                      1  /* DSP1_START */
 143
 144 /*
 145  * ADSP2 clocking
 146  */
 147 #define ADSP2_CLK_SEL_MASK                0x0007  /* CLK_SEL_ENA */
 148 #define ADSP2_CLK_SEL_SHIFT                    0  /* CLK_SEL_ENA */
 149 #define ADSP2_CLK_SEL_WIDTH                    3  /* CLK_SEL_ENA */
 150
 151 /*
 152  * ADSP2 Status 1
 153  */
 154 #define ADSP2_RAM_RDY                     0x0001
 155 #define ADSP2_RAM_RDY_MASK                0x0001
 156 #define ADSP2_RAM_RDY_SHIFT                    0
 157 #define ADSP2_RAM_RDY_WIDTH                    1
 158
 159 struct wm_adsp_buf {
 160         struct list_head list;
 161         void *buf;
 162 };
 163
 164 static struct wm_adsp_buf *wm_adsp_buf_alloc(const void *src, size_t len,
 165                                              struct list_head *list)
 166 {
 167         struct wm_adsp_buf *buf = kzalloc(sizeof(*buf), GFP_KERNEL);
 168
 169         if (buf == NULL)
 170                 return NULL;
 171
 172         buf->buf = kmemdup(src, len, GFP_KERNEL | GFP_DMA);
 173         if (!buf->buf) {
 174                 kfree(buf);
 175                 return NULL;
 176         }
 177
 178         if (list)
 179                 list_add_tail(&buf->list, list);
 180
 181         return buf;
 182 }
 183
 184 static void wm_adsp_buf_free(struct list_head *list)
 185 {
 186         while (!list_empty(list)) {
 187                 struct wm_adsp_buf *buf = list_first_entry(list,
 188                                                            struct wm_adsp_buf,
 189                                                            list);
 190                 list_del(&buf->list);
 191                 kfree(buf->buf);
 192                 kfree(buf);
 193         }
 194 }
 195
 196 #define WM_ADSP_NUM_FW 4
 197
 198 #define WM_ADSP_FW_MBC_VSS 0
 199 #define WM_ADSP_FW_TX      1
 200 #define WM_ADSP_FW_TX_SPK  2
 201 #define WM_ADSP_FW_RX_ANC  3
 202
 203 static const char *wm_adsp_fw_text[WM_ADSP_NUM_FW] = {
 204         [WM_ADSP_FW_MBC_VSS] = "MBC/VSS",
 205         [WM_ADSP_FW_TX] =      "Tx",
 206         [WM_ADSP_FW_TX_SPK] =  "Tx Speaker",
 207         [WM_ADSP_FW_RX_ANC] =  "Rx ANC",
 208 };
 209
 210 static struct {
 211         const char *file;
 212 } wm_adsp_fw[WM_ADSP_NUM_FW] = {
 213         [WM_ADSP_FW_MBC_VSS] = { .file = "mbc-vss" },
 214         [WM_ADSP_FW_TX] =      { .file = "tx" },
 215         [WM_ADSP_FW_TX_SPK] =  { .file = "tx-spk" },
 216         [WM_ADSP_FW_RX_ANC] =  { .file = "rx-anc" },
 217 };
 218
 219 struct wm_coeff_ctl_ops {
 220         int (*xget)(struct snd_kcontrol *kcontrol,
 221                     struct snd_ctl_elem_value *ucontrol);
 222         int (*xput)(struct snd_kcontrol *kcontrol,
 223                     struct snd_ctl_elem_value *ucontrol);
 224         int (*xinfo)(struct snd_kcontrol *kcontrol,
 225                      struct snd_ctl_elem_info *uinfo);
 226 };
 227
 228 struct wm_coeff_ctl {
 229         const char *name;
 230         struct wm_adsp_alg_region region;
 231         struct wm_coeff_ctl_ops ops;
 232         struct wm_adsp *adsp;
 233         void *private;
 234         unsigned int enabled:1;
 235         struct list_head list;
 236         void *cache;
 237         size_t len;
 238         unsigned int set:1;
 239         struct snd_kcontrol *kcontrol;
 240 };
 241
 242 static int wm_adsp_fw_get(struct snd_kcontrol *kcontrol,
 243                           struct snd_ctl_elem_value *ucontrol)
 244 {
 245         struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
 246         struct soc_enum *e = (struct soc_enum *)kcontrol->private_value;
 247         struct wm_adsp *adsp = snd_soc_codec_get_drvdata(codec);
 248
 249         ucontrol->value.integer.value[0] = adsp[e->shift_l].fw;
 250
 251         return 0;
 252 }
 253
 254 static int wm_adsp_fw_put(struct snd_kcontrol *kcontrol,
 255                           struct snd_ctl_elem_value *ucontrol)
 256 {
 257         struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
 258         struct soc_enum *e = (struct soc_enum *)kcontrol->private_value;
 259         struct wm_adsp *adsp = snd_soc_codec_get_drvdata(codec);
 260
 261         if (ucontrol->value.integer.value[0] == adsp[e->shift_l].fw)
 262                 return 0;
 263
 264         if (ucontrol->value.integer.value[0] >= WM_ADSP_NUM_FW)
 265                 return -EINVAL;
 266
 267         if (adsp[e->shift_l].running)
 268                 return -EBUSY;
 269
 270         adsp[e->shift_l].fw = ucontrol->value.integer.value[0];
 271
 272         return 0;
 273 }
 274
 275 static const struct soc_enum wm_adsp_fw_enum[] = {
 276         SOC_ENUM_SINGLE(0, 0, ARRAY_SIZE(wm_adsp_fw_text), wm_adsp_fw_text),
 277         SOC_ENUM_SINGLE(0, 1, ARRAY_SIZE(wm_adsp_fw_text), wm_adsp_fw_text),
 278         SOC_ENUM_SINGLE(0, 2, ARRAY_SIZE(wm_adsp_fw_text), wm_adsp_fw_text),
 279         SOC_ENUM_SINGLE(0, 3, ARRAY_SIZE(wm_adsp_fw_text), wm_adsp_fw_text),
 280 };
 281
 282 const struct snd_kcontrol_new wm_adsp1_fw_controls[] = {
 283         SOC_ENUM_EXT("DSP1 Firmware", wm_adsp_fw_enum[0],
 284                      wm_adsp_fw_get, wm_adsp_fw_put),
 285         SOC_ENUM_EXT("DSP2 Firmware", wm_adsp_fw_enum[1],
 286                      wm_adsp_fw_get, wm_adsp_fw_put),
 287         SOC_ENUM_EXT("DSP3 Firmware", wm_adsp_fw_enum[2],
 288                      wm_adsp_fw_get, wm_adsp_fw_put),
 289 };
 290 EXPORT_SYMBOL_GPL(wm_adsp1_fw_controls);
 291
 292 #if IS_ENABLED(CONFIG_SND_SOC_ARIZONA)
 293 static const struct soc_enum wm_adsp2_rate_enum[] = {
 294         SOC_VALUE_ENUM_SINGLE(ARIZONA_DSP1_CONTROL_1,
 295                               ARIZONA_DSP1_RATE_SHIFT, 0xf,
 296                               ARIZONA_RATE_ENUM_SIZE,
 297                               arizona_rate_text, arizona_rate_val),
 298         SOC_VALUE_ENUM_SINGLE(ARIZONA_DSP2_CONTROL_1,
 299                               ARIZONA_DSP1_RATE_SHIFT, 0xf,
 300                               ARIZONA_RATE_ENUM_SIZE,
 301                               arizona_rate_text, arizona_rate_val),
 302         SOC_VALUE_ENUM_SINGLE(ARIZONA_DSP3_CONTROL_1,
 303                               ARIZONA_DSP1_RATE_SHIFT, 0xf,
 304                               ARIZONA_RATE_ENUM_SIZE,
 305                               arizona_rate_text, arizona_rate_val),
 306         SOC_VALUE_ENUM_SINGLE(ARIZONA_DSP4_CONTROL_1,
 307                               ARIZONA_DSP1_RATE_SHIFT, 0xf,
 308                               ARIZONA_RATE_ENUM_SIZE,
 309                               arizona_rate_text, arizona_rate_val),
 310 };
 311
 312 const struct snd_kcontrol_new wm_adsp2_fw_controls[] = {
 313         SOC_ENUM_EXT("DSP1 Firmware", wm_adsp_fw_enum[0],
 314                      wm_adsp_fw_get, wm_adsp_fw_put),
 315         SOC_ENUM("DSP1 Rate", wm_adsp2_rate_enum[0]),
 316         SOC_ENUM_EXT("DSP2 Firmware", wm_adsp_fw_enum[1],
 317                      wm_adsp_fw_get, wm_adsp_fw_put),
 318         SOC_ENUM("DSP2 Rate", wm_adsp2_rate_enum[1]),
 319         SOC_ENUM_EXT("DSP3 Firmware", wm_adsp_fw_enum[2],
 320                      wm_adsp_fw_get, wm_adsp_fw_put),
 321         SOC_ENUM("DSP3 Rate", wm_adsp2_rate_enum[2]),
 322         SOC_ENUM_EXT("DSP4 Firmware", wm_adsp_fw_enum[3],
 323                      wm_adsp_fw_get, wm_adsp_fw_put),
 324         SOC_ENUM("DSP4 Rate", wm_adsp2_rate_enum[3]),
 325 };
 326 EXPORT_SYMBOL_GPL(wm_adsp2_fw_controls);
 327 #endif
 328
 329 static struct wm_adsp_region const *wm_adsp_find_region(struct wm_adsp *dsp,
 330                                                         int type)
 331 {
 332         int i;
 333
 334         for (i = 0; i < dsp->num_mems; i++)
 335                 if (dsp->mem[i].type == type)
 336                         return &dsp->mem[i];
 337
 338         return NULL;
 339 }
 340
 341 static unsigned int wm_adsp_region_to_reg(struct wm_adsp_region const *region,
 342                                           unsigned int offset)
 343 {
 344         switch (region->type) {
 345         case WMFW_ADSP1_PM:
 346                 return region->base + (offset * 3);
 347         case WMFW_ADSP1_DM:
 348                 return region->base + (offset * 2);
 349         case WMFW_ADSP2_XM:
 350                 return region->base + (offset * 2);
 351         case WMFW_ADSP2_YM:
 352                 return region->base + (offset * 2);
 353         case WMFW_ADSP1_ZM:
 354                 return region->base + (offset * 2);
 355         default:
 356                 WARN_ON(NULL != "Unknown memory region type");
 357                 return offset;
 358         }
 359 }
 360
 361 static int wm_coeff_info(struct snd_kcontrol *kcontrol,
 362                          struct snd_ctl_elem_info *uinfo)
 363 {
 364         struct wm_coeff_ctl *ctl = (struct wm_coeff_ctl *)kcontrol->private_value;
 365
 366         uinfo->type = SNDRV_CTL_ELEM_TYPE_BYTES;
 367         uinfo->count = ctl->len;
 368         return 0;
 369 }
 370
 371 static int wm_coeff_write_control(struct snd_kcontrol *kcontrol,
 372                                   const void *buf, size_t len)
 373 {
 374         struct wm_coeff_ctl *ctl = (struct wm_coeff_ctl *)kcontrol->private_value;
 375         struct wm_adsp_alg_region *region = &ctl->region;
 376         const struct wm_adsp_region *mem;
 377         struct wm_adsp *adsp = ctl->adsp;
 378         void *scratch;
 379         int ret;
 380         unsigned int reg;
 381
 382         mem = wm_adsp_find_region(adsp, region->type);
 383         if (!mem) {
 384                 adsp_err(adsp, "No base for region %x\n",
 385                          region->type);
 386                 return -EINVAL;
 387         }
 388
 389         reg = ctl->region.base;
 390         reg = wm_adsp_region_to_reg(mem, reg);
 391
 392         scratch = kmemdup(buf, ctl->len, GFP_KERNEL | GFP_DMA);
 393         if (!scratch)
 394                 return -ENOMEM;
 395
 396         ret = regmap_raw_write(adsp->regmap, reg, scratch,
 397                                ctl->len);
 398         if (ret) {
 399                 adsp_err(adsp, "Failed to write %zu bytes to %x: %d\n",
 400                          ctl->len, reg, ret);
 401                 kfree(scratch);
 402                 return ret;
 403         }
 404         adsp_dbg(adsp, "Wrote %zu bytes to %x\n", ctl->len, reg);
 405
 406         kfree(scratch);
 407
 408         return 0;
 409 }
 410
 411 static int wm_coeff_put(struct snd_kcontrol *kcontrol,
 412                         struct snd_ctl_elem_value *ucontrol)
 413 {
 414         struct wm_coeff_ctl *ctl = (struct wm_coeff_ctl *)kcontrol->private_value;
 415         char *p = ucontrol->value.bytes.data;
 416
 417         memcpy(ctl->cache, p, ctl->len);
 418
 419         if (!ctl->enabled) {
 420                 ctl->set = 1;
 421                 return 0;
 422         }
 423
 424         return wm_coeff_write_control(kcontrol, p, ctl->len);
 425 }
 426
 427 static int wm_coeff_read_control(struct snd_kcontrol *kcontrol,
 428                                  void *buf, size_t len)
 429 {
 430         struct wm_coeff_ctl *ctl = (struct wm_coeff_ctl *)kcontrol->private_value;
 431         struct wm_adsp_alg_region *region = &ctl->region;
 432         const struct wm_adsp_region *mem;
 433         struct wm_adsp *adsp = ctl->adsp;
 434         void *scratch;
 435         int ret;
 436         unsigned int reg;
 437
 438         mem = wm_adsp_find_region(adsp, region->type);
 439         if (!mem) {
 440                 adsp_err(adsp, "No base for region %x\n",
 441                          region->type);
 442                 return -EINVAL;
 443         }
 444
 445         reg = ctl->region.base;
 446         reg = wm_adsp_region_to_reg(mem, reg);
 447
 448         scratch = kmalloc(ctl->len, GFP_KERNEL | GFP_DMA);
 449         if (!scratch)
 450                 return -ENOMEM;
 451
 452         ret = regmap_raw_read(adsp->regmap, reg, scratch, ctl->len);
 453         if (ret) {
 454                 adsp_err(adsp, "Failed to read %zu bytes from %x: %d\n",
 455                          ctl->len, reg, ret);
 456                 kfree(scratch);
 457                 return ret;
 458         }
 459         adsp_dbg(adsp, "Read %zu bytes from %x\n", ctl->len, reg);
 460
 461         memcpy(buf, scratch, ctl->len);
 462         kfree(scratch);
 463
 464         return 0;
 465 }
 466
 467 static int wm_coeff_get(struct snd_kcontrol *kcontrol,
 468                         struct snd_ctl_elem_value *ucontrol)
 469 {
 470         struct wm_coeff_ctl *ctl = (struct wm_coeff_ctl *)kcontrol->private_value;
 471         char *p = ucontrol->value.bytes.data;
 472
 473         memcpy(p, ctl->cache, ctl->len);
 474         return 0;
 475 }
 476
 477 struct wmfw_ctl_work {
 478         struct wm_adsp *adsp;
 479         struct wm_coeff_ctl *ctl;
 480         struct work_struct work;
 481 };
 482
 483 static int wmfw_add_ctl(struct wm_adsp *adsp, struct wm_coeff_ctl *ctl)
 484 {
 485         struct snd_kcontrol_new *kcontrol;
 486         int ret;
 487
 488         if (!ctl || !ctl->name)
 489                 return -EINVAL;
 490
 491         kcontrol = kzalloc(sizeof(*kcontrol), GFP_KERNEL);
 492         if (!kcontrol)
 493                 return -ENOMEM;
 494         kcontrol->iface = SNDRV_CTL_ELEM_IFACE_MIXER;
 495
 496         kcontrol->name = ctl->name;
 497         kcontrol->info = wm_coeff_info;
 498         kcontrol->get = wm_coeff_get;
 499         kcontrol->put = wm_coeff_put;
 500         kcontrol->private_value = (unsigned long)ctl;
 501
 502         ret = snd_soc_add_card_controls(adsp->card,
 503                                         kcontrol, 1);
 504         if (ret < 0)
 505                 goto err_kcontrol;
 506
 507         kfree(kcontrol);
 508
 509         ctl->kcontrol = snd_soc_card_get_kcontrol(adsp->card,
 510                                                   ctl->name);
 511
 512         list_add(&ctl->list, &adsp->ctl_list);
 513         return 0;
 514
 515 err_kcontrol:
 516         kfree(kcontrol);
 517         return ret;
 518 }
 519
 520 static int wm_adsp_load(struct wm_adsp *dsp)
 521 {
 522         LIST_HEAD(buf_list);
 523         const struct firmware *firmware;
 524         struct regmap *regmap = dsp->regmap;
 525         unsigned int pos = 0;
 526         const struct wmfw_header *header;
 527         const struct wmfw_adsp1_sizes *adsp1_sizes;
 528         const struct wmfw_adsp2_sizes *adsp2_sizes;
 529         const struct wmfw_footer *footer;
 530         const struct wmfw_region *region;
 531         const struct wm_adsp_region *mem;
 532         const char *region_name;
 533         char *file, *text;
 534         struct wm_adsp_buf *buf;
 535         unsigned int reg;
 536         int regions = 0;
 537         int ret, offset, type, sizes;
 538
 539         file = kzalloc(PAGE_SIZE, GFP_KERNEL);
 540         if (file == NULL)
 541                 return -ENOMEM;
 542
 543         snprintf(file, PAGE_SIZE, "%s-dsp%d-%s.wmfw", dsp->part, dsp->num,
 544                  wm_adsp_fw[dsp->fw].file);
 545         file[PAGE_SIZE - 1] = '\0';
 546
 547         ret = request_firmware(&firmware, file, dsp->dev);
 548         if (ret != 0) {
 549                 adsp_err(dsp, "Failed to request '%s'\n", file);
 550                 goto out;
 551         }
 552         ret = -EINVAL;
 553
 554         pos = sizeof(*header) + sizeof(*adsp1_sizes) + sizeof(*footer);
 555         if (pos >= firmware->size) {
 556                 adsp_err(dsp, "%s: file too short, %zu bytes\n",
 557                          file, firmware->size);
 558                 goto out_fw;
 559         }
 560
 561         header = (void*)&firmware->data[0];
 562
 563         if (memcmp(&header->magic[0], "WMFW", 4) != 0) {
 564                 adsp_err(dsp, "%s: invalid magic\n", file);
 565                 goto out_fw;
 566         }
 567
 568         if (header->ver != 0) {
 569                 adsp_err(dsp, "%s: unknown file format %d\n",
 570                          file, header->ver);
 571                 goto out_fw;
 572         }
 573         adsp_info(dsp, "Firmware version: %d\n", header->ver);
 574
 575         if (header->core != dsp->type) {
 576                 adsp_err(dsp, "%s: invalid core %d != %d\n",
 577                          file, header->core, dsp->type);
 578                 goto out_fw;
 579         }
 580
 581         switch (dsp->type) {
 582         case WMFW_ADSP1:
 583                 pos = sizeof(*header) + sizeof(*adsp1_sizes) + sizeof(*footer);
 584                 adsp1_sizes = (void *)&(header[1]);
 585                 footer = (void *)&(adsp1_sizes[1]);
 586                 sizes = sizeof(*adsp1_sizes);
 587
 588                 adsp_dbg(dsp, "%s: %d DM, %d PM, %d ZM\n",
 589                          file, le32_to_cpu(adsp1_sizes->dm),
 590                          le32_to_cpu(adsp1_sizes->pm),
 591                          le32_to_cpu(adsp1_sizes->zm));
 592                 break;
 593
 594         case WMFW_ADSP2:
 595                 pos = sizeof(*header) + sizeof(*adsp2_sizes) + sizeof(*footer);
 596                 adsp2_sizes = (void *)&(header[1]);
 597                 footer = (void *)&(adsp2_sizes[1]);
 598                 sizes = sizeof(*adsp2_sizes);
 599
 600                 adsp_dbg(dsp, "%s: %d XM, %d YM %d PM, %d ZM\n",
 601                          file, le32_to_cpu(adsp2_sizes->xm),
 602                          le32_to_cpu(adsp2_sizes->ym),
 603                          le32_to_cpu(adsp2_sizes->pm),
 604                          le32_to_cpu(adsp2_sizes->zm));
 605                 break;
 606
 607         default:
 608                 BUG_ON(NULL == "Unknown DSP type");
 609                 goto out_fw;
 610         }
 611
 612         if (le32_to_cpu(header->len) != sizeof(*header) +
 613             sizes + sizeof(*footer)) {
 614                 adsp_err(dsp, "%s: unexpected header length %d\n",
 615                          file, le32_to_cpu(header->len));
 616                 goto out_fw;
 617         }
 618
 619         adsp_dbg(dsp, "%s: timestamp %llu\n", file,
 620                  le64_to_cpu(footer->timestamp));
 621
 622         while (pos < firmware->size &&
 623                pos - firmware->size > sizeof(*region)) {
 624                 region = (void *)&(firmware->data[pos]);
 625                 region_name = "Unknown";
 626                 reg = 0;
 627                 text = NULL;
 628                 offset = le32_to_cpu(region->offset) & 0xffffff;
 629                 type = be32_to_cpu(region->type) & 0xff;
 630                 mem = wm_adsp_find_region(dsp, type);
 631
 632                 switch (type) {
 633                 case WMFW_NAME_TEXT:
 634                         region_name = "Firmware name";
 635                         text = kzalloc(le32_to_cpu(region->len) + 1,
 636                                        GFP_KERNEL);
 637                         break;
 638                 case WMFW_INFO_TEXT:
 639                         region_name = "Information";
 640                         text = kzalloc(le32_to_cpu(region->len) + 1,
 641                                        GFP_KERNEL);
 642                         break;
 643                 case WMFW_ABSOLUTE:
 644                         region_name = "Absolute";
 645                         reg = offset;
 646                         break;
 647                 case WMFW_ADSP1_PM:
 648                         BUG_ON(!mem);
 649                         region_name = "PM";
 650                         reg = wm_adsp_region_to_reg(mem, offset);
 651                         break;
 652                 case WMFW_ADSP1_DM:
 653                         BUG_ON(!mem);
 654                         region_name = "DM";
 655                         reg = wm_adsp_region_to_reg(mem, offset);
 656                         break;
 657                 case WMFW_ADSP2_XM:
 658                         BUG_ON(!mem);
 659                         region_name = "XM";
 660                         reg = wm_adsp_region_to_reg(mem, offset);
 661                         break;
 662                 case WMFW_ADSP2_YM:
 663                         BUG_ON(!mem);
 664                         region_name = "YM";
 665                         reg = wm_adsp_region_to_reg(mem, offset);
 666                         break;
 667                 case WMFW_ADSP1_ZM:
 668                         BUG_ON(!mem);
 669                         region_name = "ZM";
 670                         reg = wm_adsp_region_to_reg(mem, offset);
 671                         break;
 672                 default:
 673                         adsp_warn(dsp,
 674                                   "%s.%d: Unknown region type %x at %d(%x)\n",
 675                                   file, regions, type, pos, pos);
 676                         break;
 677                 }
 678
 679                 adsp_dbg(dsp, "%s.%d: %d bytes at %d in %s\n", file,
 680                          regions, le32_to_cpu(region->len), offset,
 681                          region_name);
 682
 683                 if (text) {
 684                         memcpy(text, region->data, le32_to_cpu(region->len));
 685                         adsp_info(dsp, "%s: %s\n", file, text);
 686                         kfree(text);
 687                 }
 688
 689                 if (reg) {
 690                         buf = wm_adsp_buf_alloc(region->data,
 691                                                 le32_to_cpu(region->len),
 692                                                 &buf_list);
 693                         if (!buf) {
 694                                 adsp_err(dsp, "Out of memory\n");
 695                                 ret = -ENOMEM;
 696                                 goto out_fw;
 697                         }
 698
 699                         ret = regmap_raw_write_async(regmap, reg, buf->buf,
 700                                                      le32_to_cpu(region->len));
 701                         if (ret != 0) {
 702                                 adsp_err(dsp,
 703                                         "%s.%d: Failed to write %d bytes at %d in %s: %d\n",
 704                                         file, regions,
 705                                         le32_to_cpu(region->len), offset,
 706                                         region_name, ret);
 707                                 goto out_fw;
 708                         }
 709                 }
 710
 711                 pos += le32_to_cpu(region->len) + sizeof(*region);
 712                 regions++;
 713         }
 714
 715         ret = regmap_async_complete(regmap);
 716         if (ret != 0) {
 717                 adsp_err(dsp, "Failed to complete async write: %d\n", ret);
 718                 goto out_fw;
 719         }
 720
 721         if (pos > firmware->size)
 722                 adsp_warn(dsp, "%s.%d: %zu bytes at end of file\n",
 723                           file, regions, pos - firmware->size);
 724
 725 out_fw:
 726         regmap_async_complete(regmap);
 727         wm_adsp_buf_free(&buf_list);
 728         release_firmware(firmware);
 729 out:
 730         kfree(file);
 731
 732         return ret;
 733 }
 734
 735 static int wm_coeff_init_control_caches(struct wm_adsp *adsp)
 736 {
 737         struct wm_coeff_ctl *ctl;
 738         int ret;
 739
 740         list_for_each_entry(ctl, &adsp->ctl_list, list) {
 741                 if (!ctl->enabled || ctl->set)
 742                         continue;
 743                 ret = wm_coeff_read_control(ctl->kcontrol,
 744                                             ctl->cache,
 745                                             ctl->len);
 746                 if (ret < 0)
 747                         return ret;
 748         }
 749
 750         return 0;
 751 }
 752
 753 static int wm_coeff_sync_controls(struct wm_adsp *adsp)
 754 {
 755         struct wm_coeff_ctl *ctl;
 756         int ret;
 757
 758         list_for_each_entry(ctl, &adsp->ctl_list, list) {
 759                 if (!ctl->enabled)
 760                         continue;
 761                 if (ctl->set) {
 762                         ret = wm_coeff_write_control(ctl->kcontrol,
 763                                                      ctl->cache,
 764                                                      ctl->len);
 765                         if (ret < 0)
 766                                 return ret;
 767                 }
 768         }
 769
 770         return 0;
 771 }
 772
 773 static void wm_adsp_ctl_work(struct work_struct *work)
 774 {
 775         struct wmfw_ctl_work *ctl_work = container_of(work,
 776                                                       struct wmfw_ctl_work,
 777                                                       work);
 778
 779         wmfw_add_ctl(ctl_work->adsp, ctl_work->ctl);
 780         kfree(ctl_work);
 781 }
 782
 783 static int wm_adsp_create_control(struct wm_adsp *dsp,
 784                                   const struct wm_adsp_alg_region *region)
 785
 786 {
 787         struct wm_coeff_ctl *ctl;
 788         struct wmfw_ctl_work *ctl_work;
 789         char *name;
 790         char *region_name;
 791         int ret;
 792
 793         name = kmalloc(PAGE_SIZE, GFP_KERNEL);
 794         if (!name)
 795                 return -ENOMEM;
 796
 797         switch (region->type) {
 798         case WMFW_ADSP1_PM:
 799                 region_name = "PM";
 800                 break;
 801         case WMFW_ADSP1_DM:
 802                 region_name = "DM";
 803                 break;
 804         case WMFW_ADSP2_XM:
 805                 region_name = "XM";
 806                 break;
 807         case WMFW_ADSP2_YM:
 808                 region_name = "YM";
 809                 break;
 810         case WMFW_ADSP1_ZM:
 811                 region_name = "ZM";
 812                 break;
 813         default:
 814                 ret = -EINVAL;
 815                 goto err_name;
 816         }
 817
 818         snprintf(name, PAGE_SIZE, "DSP%d %s %x",
 819                  dsp->num, region_name, region->alg);
 820
 821         list_for_each_entry(ctl, &dsp->ctl_list,
 822                             list) {
 823                 if (!strcmp(ctl->name, name)) {
 824                         if (!ctl->enabled)
 825                                 ctl->enabled = 1;
 826                         goto found;
 827                 }
 828         }
 829
 830         ctl = kzalloc(sizeof(*ctl), GFP_KERNEL);
 831         if (!ctl) {
 832                 ret = -ENOMEM;
 833                 goto err_name;
 834         }
 835         ctl->region = *region;
 836         ctl->name = kmemdup(name, strlen(name) + 1, GFP_KERNEL);
 837         if (!ctl->name) {
 838                 ret = -ENOMEM;
 839                 goto err_ctl;
 840         }
 841         ctl->enabled = 1;
 842         ctl->set = 0;
 843         ctl->ops.xget = wm_coeff_get;
 844         ctl->ops.xput = wm_coeff_put;
 845         ctl->adsp = dsp;
 846
 847         ctl->len = region->len;
 848         ctl->cache = kzalloc(ctl->len, GFP_KERNEL);
 849         if (!ctl->cache) {
 850                 ret = -ENOMEM;
 851                 goto err_ctl_name;
 852         }
 853
 854         ctl_work = kzalloc(sizeof(*ctl_work), GFP_KERNEL);
 855         if (!ctl_work) {
 856                 ret = -ENOMEM;
 857                 goto err_ctl_cache;
 858         }
 859
 860         ctl_work->adsp = dsp;
 861         ctl_work->ctl = ctl;
 862         INIT_WORK(&ctl_work->work, wm_adsp_ctl_work);
 863         schedule_work(&ctl_work->work);
 864
 865 found:
 866         kfree(name);
 867
 868         return 0;
 869
 870 err_ctl_cache:
 871         kfree(ctl->cache);
 872 err_ctl_name:
 873         kfree(ctl->name);
 874 err_ctl:
 875         kfree(ctl);
 876 err_name:
 877         kfree(name);
 878         return ret;
 879 }
 880
 881 static int wm_adsp_setup_algs(struct wm_adsp *dsp)
 882 {
 883         struct regmap *regmap = dsp->regmap;
 884         struct wmfw_adsp1_id_hdr adsp1_id;
 885         struct wmfw_adsp2_id_hdr adsp2_id;
 886         struct wmfw_adsp1_alg_hdr *adsp1_alg;
 887         struct wmfw_adsp2_alg_hdr *adsp2_alg;
 888         void *alg, *buf;
 889         struct wm_adsp_alg_region *region;
 890         const struct wm_adsp_region *mem;
 891         unsigned int pos, term;
 892         size_t algs, buf_size;
 893         __be32 val;
 894         int i, ret;
 895
 896         switch (dsp->type) {
 897         case WMFW_ADSP1:
 898                 mem = wm_adsp_find_region(dsp, WMFW_ADSP1_DM);
 899                 break;
 900         case WMFW_ADSP2:
 901                 mem = wm_adsp_find_region(dsp, WMFW_ADSP2_XM);
 902                 break;
 903         default:
 904                 mem = NULL;
 905                 break;
 906         }
 907
 908         if (mem == NULL) {
 909                 BUG_ON(mem != NULL);
 910                 return -EINVAL;
 911         }
 912
 913         switch (dsp->type) {
 914         case WMFW_ADSP1:
 915                 ret = regmap_raw_read(regmap, mem->base, &adsp1_id,
 916                                       sizeof(adsp1_id));
 917                 if (ret != 0) {
 918                         adsp_err(dsp, "Failed to read algorithm info: %d\n",
 919                                  ret);
 920                         return ret;
 921                 }
 922
 923                 buf = &adsp1_id;
 924                 buf_size = sizeof(adsp1_id);
 925
 926                 algs = be32_to_cpu(adsp1_id.algs);
 927                 dsp->fw_id = be32_to_cpu(adsp1_id.fw.id);
 928                 adsp_info(dsp, "Firmware: %x v%d.%d.%d, %zu algorithms\n",
 929                           dsp->fw_id,
 930                           (be32_to_cpu(adsp1_id.fw.ver) & 0xff0000) >> 16,
 931                           (be32_to_cpu(adsp1_id.fw.ver) & 0xff00) >> 8,
 932                           be32_to_cpu(adsp1_id.fw.ver) & 0xff,
 933                           algs);
 934
 935                 region = kzalloc(sizeof(*region), GFP_KERNEL);
 936                 if (!region)
 937                         return -ENOMEM;
 938                 region->type = WMFW_ADSP1_ZM;
 939                 region->alg = be32_to_cpu(adsp1_id.fw.id);
 940                 region->base = be32_to_cpu(adsp1_id.zm);
 941                 list_add_tail(&region->list, &dsp->alg_regions);
 942
 943                 region = kzalloc(sizeof(*region), GFP_KERNEL);
 944                 if (!region)
 945                         return -ENOMEM;
 946                 region->type = WMFW_ADSP1_DM;
 947                 region->alg = be32_to_cpu(adsp1_id.fw.id);
 948                 region->base = be32_to_cpu(adsp1_id.dm);
 949                 list_add_tail(&region->list, &dsp->alg_regions);
 950
 951                 pos = sizeof(adsp1_id) / 2;
 952                 term = pos + ((sizeof(*adsp1_alg) * algs) / 2);
 953                 break;
 954
 955         case WMFW_ADSP2:
 956                 ret = regmap_raw_read(regmap, mem->base, &adsp2_id,
 957                                       sizeof(adsp2_id));
 958                 if (ret != 0) {
 959                         adsp_err(dsp, "Failed to read algorithm info: %d\n",
 960                                  ret);
 961                         return ret;
 962                 }
 963
 964                 buf = &adsp2_id;
 965                 buf_size = sizeof(adsp2_id);
 966
 967                 algs = be32_to_cpu(adsp2_id.algs);
 968                 dsp->fw_id = be32_to_cpu(adsp2_id.fw.id);
 969                 adsp_info(dsp, "Firmware: %x v%d.%d.%d, %zu algorithms\n",
 970                           dsp->fw_id,
 971                           (be32_to_cpu(adsp2_id.fw.ver) & 0xff0000) >> 16,
 972                           (be32_to_cpu(adsp2_id.fw.ver) & 0xff00) >> 8,
 973                           be32_to_cpu(adsp2_id.fw.ver) & 0xff,
 974                           algs);
 975
 976                 region = kzalloc(sizeof(*region), GFP_KERNEL);
 977                 if (!region)
 978                         return -ENOMEM;
 979                 region->type = WMFW_ADSP2_XM;
 980                 region->alg = be32_to_cpu(adsp2_id.fw.id);
 981                 region->base = be32_to_cpu(adsp2_id.xm);
 982                 list_add_tail(&region->list, &dsp->alg_regions);
 983
 984                 region = kzalloc(sizeof(*region), GFP_KERNEL);
 985                 if (!region)
 986                         return -ENOMEM;
 987                 region->type = WMFW_ADSP2_YM;
 988                 region->alg = be32_to_cpu(adsp2_id.fw.id);
 989                 region->base = be32_to_cpu(adsp2_id.ym);
 990                 list_add_tail(&region->list, &dsp->alg_regions);
 991
 992                 region = kzalloc(sizeof(*region), GFP_KERNEL);
 993                 if (!region)
 994                         return -ENOMEM;
 995                 region->type = WMFW_ADSP2_ZM;
 996                 region->alg = be32_to_cpu(adsp2_id.fw.id);
 997                 region->base = be32_to_cpu(adsp2_id.zm);
 998                 list_add_tail(&region->list, &dsp->alg_regions);
 999
1000                 pos = sizeof(adsp2_id) / 2;
1001                 term = pos + ((sizeof(*adsp2_alg) * algs) / 2);
1002                 break;
1003
1004         default:
1005                 BUG_ON(NULL == "Unknown DSP type");
1006                 return -EINVAL;
1007         }
1008
1009         if (algs == 0) {
1010                 adsp_err(dsp, "No algorithms\n");
1011                 return -EINVAL;
1012         }
1013
1014         if (algs > 1024) {
1015                 adsp_err(dsp, "Algorithm count %zx excessive\n", algs);
1016                 print_hex_dump_bytes(dev_name(dsp->dev), DUMP_PREFIX_OFFSET,
1017                                      buf, buf_size);
1018                 return -EINVAL;
1019         }
1020
1021         /* Read the terminator first to validate the length */
1022         ret = regmap_raw_read(regmap, mem->base + term, &val, sizeof(val));
1023         if (ret != 0) {
1024                 adsp_err(dsp, "Failed to read algorithm list end: %d\n",
1025                         ret);
1026                 return ret;
1027         }
1028
1029         if (be32_to_cpu(val) != 0xbedead)
1030                 adsp_warn(dsp, "Algorithm list end %x 0x%x != 0xbeadead\n",
1031                           term, be32_to_cpu(val));
1032
1033         alg = kzalloc((term - pos) * 2, GFP_KERNEL | GFP_DMA);
1034         if (!alg)
1035                 return -ENOMEM;
1036
1037         ret = regmap_raw_read(regmap, mem->base + pos, alg, (term - pos) * 2);
1038         if (ret != 0) {
1039                 adsp_err(dsp, "Failed to read algorithm list: %d\n",
1040                         ret);
1041                 goto out;
1042         }
1043
1044         adsp1_alg = alg;
1045         adsp2_alg = alg;
1046
1047         for (i = 0; i < algs; i++) {
1048                 switch (dsp->type) {
1049                 case WMFW_ADSP1:
1050                         adsp_info(dsp, "%d: ID %x v%d.%d.%d DM@%x ZM@%x\n",
1051                                   i, be32_to_cpu(adsp1_alg[i].alg.id),
1052                                   (be32_to_cpu(adsp1_alg[i].alg.ver) & 0xff0000) >> 16,
1053                                   (be32_to_cpu(adsp1_alg[i].alg.ver) & 0xff00) >> 8,
1054                                   be32_to_cpu(adsp1_alg[i].alg.ver) & 0xff,
1055                                   be32_to_cpu(adsp1_alg[i].dm),
1056                                   be32_to_cpu(adsp1_alg[i].zm));
1057
1058                         region = kzalloc(sizeof(*region), GFP_KERNEL);
1059                         if (!region)
1060                                 return -ENOMEM;
1061                         region->type = WMFW_ADSP1_DM;
1062                         region->alg = be32_to_cpu(adsp1_alg[i].alg.id);
1063                         region->base = be32_to_cpu(adsp1_alg[i].dm);
1064                         region->len = 0;
1065                         list_add_tail(&region->list, &dsp->alg_regions);
1066                         if (i + 1 < algs) {
1067                                 region->len = be32_to_cpu(adsp1_alg[i + 1].dm);
1068                                 region->len -= be32_to_cpu(adsp1_alg[i].dm);
1069                                 wm_adsp_create_control(dsp, region);
1070                         } else {
1071                                 adsp_warn(dsp, "Missing length info for region DM with ID %x\n",
1072                                           be32_to_cpu(adsp1_alg[i].alg.id));
1073                         }
1074
1075                         region = kzalloc(sizeof(*region), GFP_KERNEL);
1076                         if (!region)
1077                                 return -ENOMEM;
1078                         region->type = WMFW_ADSP1_ZM;
1079                         region->alg = be32_to_cpu(adsp1_alg[i].alg.id);
1080                         region->base = be32_to_cpu(adsp1_alg[i].zm);
1081                         region->len = 0;
1082                         list_add_tail(&region->list, &dsp->alg_regions);
1083                         if (i + 1 < algs) {
1084                                 region->len = be32_to_cpu(adsp1_alg[i + 1].zm);
1085                                 region->len -= be32_to_cpu(adsp1_alg[i].zm);
1086                                 wm_adsp_create_control(dsp, region);
1087                         } else {
1088                                 adsp_warn(dsp, "Missing length info for region ZM with ID %x\n",
1089                                           be32_to_cpu(adsp1_alg[i].alg.id));
1090                         }
1091                         break;
1092
1093                 case WMFW_ADSP2:
1094                         adsp_info(dsp,
1095                                   "%d: ID %x v%d.%d.%d XM@%x YM@%x ZM@%x\n",
1096                                   i, be32_to_cpu(adsp2_alg[i].alg.id),
1097                                   (be32_to_cpu(adsp2_alg[i].alg.ver) & 0xff0000) >> 16,
1098                                   (be32_to_cpu(adsp2_alg[i].alg.ver) & 0xff00) >> 8,
1099                                   be32_to_cpu(adsp2_alg[i].alg.ver) & 0xff,
1100                                   be32_to_cpu(adsp2_alg[i].xm),
1101                                   be32_to_cpu(adsp2_alg[i].ym),
1102                                   be32_to_cpu(adsp2_alg[i].zm));
1103
1104                         region = kzalloc(sizeof(*region), GFP_KERNEL);
1105                         if (!region)
1106                                 return -ENOMEM;
1107                         region->type = WMFW_ADSP2_XM;
1108                         region->alg = be32_to_cpu(adsp2_alg[i].alg.id);
1109                         region->base = be32_to_cpu(adsp2_alg[i].xm);
1110                         region->len = 0;
1111                         list_add_tail(&region->list, &dsp->alg_regions);
1112                         if (i + 1 < algs) {
1113                                 region->len = be32_to_cpu(adsp2_alg[i + 1].xm);
1114                                 region->len -= be32_to_cpu(adsp2_alg[i].xm);
1115                                 wm_adsp_create_control(dsp, region);
1116                         } else {
1117                                 adsp_warn(dsp, "Missing length info for region XM with ID %x\n",
1118                                           be32_to_cpu(adsp2_alg[i].alg.id));
1119                         }
1120
1121                         region = kzalloc(sizeof(*region), GFP_KERNEL);
1122                         if (!region)
1123                                 return -ENOMEM;
1124                         region->type = WMFW_ADSP2_YM;
1125                         region->alg = be32_to_cpu(adsp2_alg[i].alg.id);
1126                         region->base = be32_to_cpu(adsp2_alg[i].ym);
1127                         region->len = 0;
1128                         list_add_tail(&region->list, &dsp->alg_regions);
1129                         if (i + 1 < algs) {
1130                                 region->len = be32_to_cpu(adsp2_alg[i + 1].ym);
1131                                 region->len -= be32_to_cpu(adsp2_alg[i].ym);
1132                                 wm_adsp_create_control(dsp, region);
1133                         } else {
1134                                 adsp_warn(dsp, "Missing length info for region YM with ID %x\n",
1135                                           be32_to_cpu(adsp2_alg[i].alg.id));
1136                         }
1137
1138                         region = kzalloc(sizeof(*region), GFP_KERNEL);
1139                         if (!region)
1140                                 return -ENOMEM;
1141                         region->type = WMFW_ADSP2_ZM;
1142                         region->alg = be32_to_cpu(adsp2_alg[i].alg.id);
1143                         region->base = be32_to_cpu(adsp2_alg[i].zm);
1144                         region->len = 0;
1145                         list_add_tail(&region->list, &dsp->alg_regions);
1146                         if (i + 1 < algs) {
1147                                 region->len = be32_to_cpu(adsp2_alg[i + 1].zm);
1148                                 region->len -= be32_to_cpu(adsp2_alg[i].zm);
1149                                 wm_adsp_create_control(dsp, region);
1150                         } else {
1151                                 adsp_warn(dsp, "Missing length info for region ZM with ID %x\n",
1152                                           be32_to_cpu(adsp2_alg[i].alg.id));
1153                         }
1154                         break;
1155                 }
1156         }
1157
1158 out:
1159         kfree(alg);
1160         return ret;
1161 }
1162
1163 static int wm_adsp_load_coeff(struct wm_adsp *dsp)
1164 {
1165         LIST_HEAD(buf_list);
1166         struct regmap *regmap = dsp->regmap;
1167         struct wmfw_coeff_hdr *hdr;
1168         struct wmfw_coeff_item *blk;
1169         const struct firmware *firmware;
1170         const struct wm_adsp_region *mem;
1171         struct wm_adsp_alg_region *alg_region;
1172         const char *region_name;
1173         int ret, pos, blocks, type, offset, reg;
1174         char *file;
1175         struct wm_adsp_buf *buf;
1176         int tmp;
1177
1178         file = kzalloc(PAGE_SIZE, GFP_KERNEL);
1179         if (file == NULL)
1180                 return -ENOMEM;
1181
1182         snprintf(file, PAGE_SIZE, "%s-dsp%d-%s.bin", dsp->part, dsp->num,
1183                  wm_adsp_fw[dsp->fw].file);
1184         file[PAGE_SIZE - 1] = '\0';
1185
1186         ret = request_firmware(&firmware, file, dsp->dev);
1187         if (ret != 0) {
1188                 adsp_warn(dsp, "Failed to request '%s'\n", file);
1189                 ret = 0;
1190                 goto out;
1191         }
1192         ret = -EINVAL;
1193
1194         if (sizeof(*hdr) >= firmware->size) {
1195                 adsp_err(dsp, "%s: file too short, %zu bytes\n",
1196                         file, firmware->size);
1197                 goto out_fw;
1198         }
1199
1200         hdr = (void*)&firmware->data[0];
1201         if (memcmp(hdr->magic, "WMDR", 4) != 0) {
1202                 adsp_err(dsp, "%s: invalid magic\n", file);
1203                 goto out_fw;
1204         }
1205
1206         switch (be32_to_cpu(hdr->rev) & 0xff) {
1207         case 1:
1208                 break;
1209         default:
1210                 adsp_err(dsp, "%s: Unsupported coefficient file format %d\n",
1211                          file, be32_to_cpu(hdr->rev) & 0xff);
1212                 ret = -EINVAL;
1213                 goto out_fw;
1214         }
1215
1216         adsp_dbg(dsp, "%s: v%d.%d.%d\n", file,
1217                 (le32_to_cpu(hdr->ver) >> 16) & 0xff,
1218                 (le32_to_cpu(hdr->ver) >>  8) & 0xff,
1219                 le32_to_cpu(hdr->ver) & 0xff);
1220
1221         pos = le32_to_cpu(hdr->len);
1222
1223         blocks = 0;
1224         while (pos < firmware->size &&
1225                pos - firmware->size > sizeof(*blk)) {
1226                 blk = (void*)(&firmware->data[pos]);
1227
1228                 type = le16_to_cpu(blk->type);
1229                 offset = le16_to_cpu(blk->offset);
1230
1231                 adsp_dbg(dsp, "%s.%d: %x v%d.%d.%d\n",
1232                          file, blocks, le32_to_cpu(blk->id),
1233                          (le32_to_cpu(blk->ver) >> 16) & 0xff,
1234                          (le32_to_cpu(blk->ver) >>  8) & 0xff,
1235                          le32_to_cpu(blk->ver) & 0xff);
1236                 adsp_dbg(dsp, "%s.%d: %d bytes at 0x%x in %x\n",
1237                          file, blocks, le32_to_cpu(blk->len), offset, type);
1238
1239                 reg = 0;
1240                 region_name = "Unknown";
1241                 switch (type) {
1242                 case (WMFW_NAME_TEXT << 8):
1243                 case (WMFW_INFO_TEXT << 8):
1244                         break;
1245                 case (WMFW_ABSOLUTE << 8):
1246                         /*
1247                          * Old files may use this for global
1248                          * coefficients.
1249                          */
1250                         if (le32_to_cpu(blk->id) == dsp->fw_id &&
1251                             offset == 0) {
1252                                 region_name = "global coefficients";
1253                                 mem = wm_adsp_find_region(dsp, type);
1254                                 if (!mem) {
1255                                         adsp_err(dsp, "No ZM\n");
1256                                         break;
1257                                 }
1258                                 reg = wm_adsp_region_to_reg(mem, 0);
1259
1260                         } else {
1261                                 region_name = "register";
1262                                 reg = offset;
1263                         }
1264                         break;
1265
1266                 case WMFW_ADSP1_DM:
1267                 case WMFW_ADSP1_ZM:
1268                 case WMFW_ADSP2_XM:
1269                 case WMFW_ADSP2_YM:
1270                         adsp_dbg(dsp, "%s.%d: %d bytes in %x for %x\n",
1271                                  file, blocks, le32_to_cpu(blk->len),
1272                                  type, le32_to_cpu(blk->id));
1273
1274                         mem = wm_adsp_find_region(dsp, type);
1275                         if (!mem) {
1276                                 adsp_err(dsp, "No base for region %x\n", type);
1277                                 break;
1278                         }
1279
1280                         reg = 0;
1281                         list_for_each_entry(alg_region,
1282                                             &dsp->alg_regions, list) {
1283                                 if (le32_to_cpu(blk->id) == alg_region->alg &&
1284                                     type == alg_region->type) {
1285                                         reg = alg_region->base;
1286                                         reg = wm_adsp_region_to_reg(mem,
1287                                                                     reg);
1288                                         reg += offset;
1289                                 }
1290                         }
1291
1292                         if (reg == 0)
1293                                 adsp_err(dsp, "No %x for algorithm %x\n",
1294                                          type, le32_to_cpu(blk->id));
1295                         break;
1296
1297                 default:
1298                         adsp_err(dsp, "%s.%d: Unknown region type %x at %d\n",
1299                                  file, blocks, type, pos);
1300                         break;
1301                 }
1302
1303                 if (reg) {
1304                         buf = wm_adsp_buf_alloc(blk->data,
1305                                                 le32_to_cpu(blk->len),
1306                                                 &buf_list);
1307                         if (!buf) {
1308                                 adsp_err(dsp, "Out of memory\n");
1309                                 ret = -ENOMEM;
1310                                 goto out_fw;
1311                         }
1312
1313                         adsp_dbg(dsp, "%s.%d: Writing %d bytes at %x\n",
1314                                  file, blocks, le32_to_cpu(blk->len),
1315                                  reg);
1316                         ret = regmap_raw_write_async(regmap, reg, buf->buf,
1317                                                      le32_to_cpu(blk->len));
1318                         if (ret != 0) {
1319                                 adsp_err(dsp,
1320                                         "%s.%d: Failed to write to %x in %s: %d\n",
1321                                         file, blocks, reg, region_name, ret);
1322                         }
1323                 }
1324
1325                 tmp = le32_to_cpu(blk->len) % 4;
1326                 if (tmp)
1327                         pos += le32_to_cpu(blk->len) + (4 - tmp) + sizeof(*blk);
1328                 else
1329                         pos += le32_to_cpu(blk->len) + sizeof(*blk);
1330
1331                 blocks++;
1332         }
1333
1334         ret = regmap_async_complete(regmap);
1335         if (ret != 0)
1336                 adsp_err(dsp, "Failed to complete async write: %d\n", ret);
1337
1338         if (pos > firmware->size)
1339                 adsp_warn(dsp, "%s.%d: %zu bytes at end of file\n",
1340                           file, blocks, pos - firmware->size);
1341
1342 out_fw:
1343         release_firmware(firmware);
1344         wm_adsp_buf_free(&buf_list);
1345 out:
1346         kfree(file);
1347         return ret;
1348 }
1349
1350 int wm_adsp1_init(struct wm_adsp *adsp)
1351 {
1352         INIT_LIST_HEAD(&adsp->alg_regions);
1353
1354         return 0;
1355 }
1356 EXPORT_SYMBOL_GPL(wm_adsp1_init);
1357
1358 int wm_adsp1_event(struct snd_soc_dapm_widget *w,
1359                    struct snd_kcontrol *kcontrol,
1360                    int event)
1361 {
1362         struct snd_soc_codec *codec = w->codec;
1363         struct wm_adsp *dsps = snd_soc_codec_get_drvdata(codec);
1364         struct wm_adsp *dsp = &dsps[w->shift];
1365         struct wm_adsp_alg_region *alg_region;
1366         struct wm_coeff_ctl *ctl;
1367         int ret;
1368         int val;
1369
1370         dsp->card = codec->card;
1371
1372         switch (event) {
1373         case SND_SOC_DAPM_POST_PMU:
1374                 regmap_update_bits(dsp->regmap, dsp->base + ADSP1_CONTROL_30,
1375                                    ADSP1_SYS_ENA, ADSP1_SYS_ENA);
1376
1377                 /*
1378                  * For simplicity set the DSP clock rate to be the
1379                  * SYSCLK rate rather than making it configurable.
1380                  */
1381                 if(dsp->sysclk_reg) {
1382                         ret = regmap_read(dsp->regmap, dsp->sysclk_reg, &val);
1383                         if (ret != 0) {
1384                                 adsp_err(dsp, "Failed to read SYSCLK state: %d\n",
1385                                 ret);
1386                                 return ret;
1387                         }
1388
1389                         val = (val & dsp->sysclk_mask)
1390                                 >> dsp->sysclk_shift;
1391
1392                         ret = regmap_update_bits(dsp->regmap,
1393                                                  dsp->base + ADSP1_CONTROL_31,
1394                                                  ADSP1_CLK_SEL_MASK, val);
1395                         if (ret != 0) {
1396                                 adsp_err(dsp, "Failed to set clock rate: %d\n",
1397                                          ret);
1398                                 return ret;
1399                         }
1400                 }
1401
1402                 ret = wm_adsp_load(dsp);
1403                 if (ret != 0)
1404                         goto err;
1405
1406                 ret = wm_adsp_setup_algs(dsp);
1407                 if (ret != 0)
1408                         goto err;
1409
1410                 ret = wm_adsp_load_coeff(dsp);
1411                 if (ret != 0)
1412                         goto err;
1413
1414                 /* Initialize caches for enabled and unset controls */
1415                 ret = wm_coeff_init_control_caches(dsp);
1416                 if (ret != 0)
1417                         goto err;
1418
1419                 /* Sync set controls */
1420                 ret = wm_coeff_sync_controls(dsp);
1421                 if (ret != 0)
1422                         goto err;
1423
1424                 /* Start the core running */
1425                 regmap_update_bits(dsp->regmap, dsp->base + ADSP1_CONTROL_30,
1426                                    ADSP1_CORE_ENA | ADSP1_START,
1427                                    ADSP1_CORE_ENA | ADSP1_START);
1428                 break;
1429
1430         case SND_SOC_DAPM_PRE_PMD:
1431                 /* Halt the core */
1432                 regmap_update_bits(dsp->regmap, dsp->base + ADSP1_CONTROL_30,
1433                                    ADSP1_CORE_ENA | ADSP1_START, 0);
1434
1435                 regmap_update_bits(dsp->regmap, dsp->base + ADSP1_CONTROL_19,
1436                                    ADSP1_WDMA_BUFFER_LENGTH_MASK, 0);
1437
1438                 regmap_update_bits(dsp->regmap, dsp->base + ADSP1_CONTROL_30,
1439                                    ADSP1_SYS_ENA, 0);
1440
1441                 list_for_each_entry(ctl, &dsp->ctl_list, list)
1442                         ctl->enabled = 0;
1443
1444                 while (!list_empty(&dsp->alg_regions)) {
1445                         alg_region = list_first_entry(&dsp->alg_regions,
1446                                                       struct wm_adsp_alg_region,
1447                                                       list);
1448                         list_del(&alg_region->list);
1449                         kfree(alg_region);
1450                 }
1451                 break;
1452
1453         default:
1454                 break;
1455         }
1456
1457         return 0;
1458
1459 err:
1460         regmap_update_bits(dsp->regmap, dsp->base + ADSP1_CONTROL_30,
1461                            ADSP1_SYS_ENA, 0);
1462         return ret;
1463 }
1464 EXPORT_SYMBOL_GPL(wm_adsp1_event);
1465
1466 static int wm_adsp2_ena(struct wm_adsp *dsp)
1467 {
1468         unsigned int val;
1469         int ret, count;
1470
1471         ret = regmap_update_bits(dsp->regmap, dsp->base + ADSP2_CONTROL,
1472                                  ADSP2_SYS_ENA, ADSP2_SYS_ENA);
1473         if (ret != 0)
1474                 return ret;
1475
1476         /* Wait for the RAM to start, should be near instantaneous */
1477         count = 0;
1478         do {
1479                 ret = regmap_read(dsp->regmap, dsp->base + ADSP2_STATUS1,
1480                                   &val);
1481                 if (ret != 0)
1482                         return ret;
1483         } while (!(val & ADSP2_RAM_RDY) && ++count < 10);
1484
1485         if (!(val & ADSP2_RAM_RDY)) {
1486                 adsp_err(dsp, "Failed to start DSP RAM\n");
1487                 return -EBUSY;
1488         }
1489
1490         adsp_dbg(dsp, "RAM ready after %d polls\n", count);
1491         adsp_info(dsp, "RAM ready after %d polls\n", count);
1492
1493         return 0;
1494 }
1495
1496 int wm_adsp2_event(struct snd_soc_dapm_widget *w,
1497                    struct snd_kcontrol *kcontrol, int event)
1498 {
1499         struct snd_soc_codec *codec = w->codec;
1500         struct wm_adsp *dsps = snd_soc_codec_get_drvdata(codec);
1501         struct wm_adsp *dsp = &dsps[w->shift];
1502         struct wm_adsp_alg_region *alg_region;
1503         struct wm_coeff_ctl *ctl;
1504         unsigned int val;
1505         int ret;
1506
1507         dsp->card = codec->card;
1508
1509         switch (event) {
1510         case SND_SOC_DAPM_POST_PMU:
1511                 /*
1512                  * For simplicity set the DSP clock rate to be the
1513                  * SYSCLK rate rather than making it configurable.
1514                  */
1515                 ret = regmap_read(dsp->regmap, ARIZONA_SYSTEM_CLOCK_1, &val);
1516                 if (ret != 0) {
1517                         adsp_err(dsp, "Failed to read SYSCLK state: %d\n",
1518                                  ret);
1519                         return ret;
1520                 }
1521                 val = (val & ARIZONA_SYSCLK_FREQ_MASK)
1522                         >> ARIZONA_SYSCLK_FREQ_SHIFT;
1523
1524                 ret = regmap_update_bits(dsp->regmap,
1525                                          dsp->base + ADSP2_CLOCKING,
1526                                          ADSP2_CLK_SEL_MASK, val);
1527                 if (ret != 0) {
1528                         adsp_err(dsp, "Failed to set clock rate: %d\n",
1529                                  ret);
1530                         return ret;
1531                 }
1532
1533                 if (dsp->dvfs) {
1534                         ret = regmap_read(dsp->regmap,
1535                                           dsp->base + ADSP2_CLOCKING, &val);
1536                         if (ret != 0) {
1537                                 dev_err(dsp->dev,
1538                                         "Failed to read clocking: %d\n", ret);
1539                                 return ret;
1540                         }
1541
1542                         if ((val & ADSP2_CLK_SEL_MASK) >= 3) {
1543                                 ret = regulator_enable(dsp->dvfs);
1544                                 if (ret != 0) {
1545                                         dev_err(dsp->dev,
1546                                                 "Failed to enable supply: %d\n",
1547                                                 ret);
1548                                         return ret;
1549                                 }
1550
1551                                 ret = regulator_set_voltage(dsp->dvfs,
1552                                                             1800000,
1553                                                             1800000);
1554                                 if (ret != 0) {
1555                                         dev_err(dsp->dev,
1556                                                 "Failed to raise supply: %d\n",
1557                                                 ret);
1558                                         return ret;
1559                                 }
1560                         }
1561                 }
1562
1563                 ret = wm_adsp2_ena(dsp);
1564                 if (ret != 0)
1565                         return ret;
1566
1567                 ret = wm_adsp_load(dsp);
1568                 if (ret != 0)
1569                         goto err;
1570
1571                 ret = wm_adsp_setup_algs(dsp);
1572                 if (ret != 0)
1573                         goto err;
1574
1575                 ret = wm_adsp_load_coeff(dsp);
1576                 if (ret != 0)
1577                         goto err;
1578
1579                 /* Initialize caches for enabled and unset controls */
1580                 ret = wm_coeff_init_control_caches(dsp);
1581                 if (ret != 0)
1582                         goto err;
1583
1584                 /* Sync set controls */
1585                 ret = wm_coeff_sync_controls(dsp);
1586                 if (ret != 0)
1587                         goto err;
1588
1589                 ret = regmap_update_bits(dsp->regmap,
1590                                          dsp->base + ADSP2_CONTROL,
1591                                          ADSP2_CORE_ENA | ADSP2_START,
1592                                          ADSP2_CORE_ENA | ADSP2_START);
1593                 if (ret != 0)
1594                         goto err;
1595
1596                 dsp->running = true;
1597                 break;
1598
1599         case SND_SOC_DAPM_PRE_PMD:
1600                 dsp->running = false;
1601
1602                 regmap_update_bits(dsp->regmap, dsp->base + ADSP2_CONTROL,
1603                                    ADSP2_SYS_ENA | ADSP2_CORE_ENA |
1604                                    ADSP2_START, 0);
1605
1606                 /* Make sure DMAs are quiesced */
1607                 regmap_write(dsp->regmap, dsp->base + ADSP2_WDMA_CONFIG_1, 0);
1608                 regmap_write(dsp->regmap, dsp->base + ADSP2_WDMA_CONFIG_2, 0);
1609                 regmap_write(dsp->regmap, dsp->base + ADSP2_RDMA_CONFIG_1, 0);
1610
1611                 if (dsp->dvfs) {
1612                         ret = regulator_set_voltage(dsp->dvfs, 1200000,
1613                                                     1800000);
1614                         if (ret != 0)
1615                                 dev_warn(dsp->dev,
1616                                          "Failed to lower supply: %d\n",
1617                                          ret);
1618
1619                         ret = regulator_disable(dsp->dvfs);
1620                         if (ret != 0)
1621                                 dev_err(dsp->dev,
1622                                         "Failed to enable supply: %d\n",
1623                                         ret);
1624                 }
1625
1626                 list_for_each_entry(ctl, &dsp->ctl_list, list)
1627                         ctl->enabled = 0;
1628
1629                 while (!list_empty(&dsp->alg_regions)) {
1630                         alg_region = list_first_entry(&dsp->alg_regions,
1631                                                       struct wm_adsp_alg_region,
1632                                                       list);
1633                         list_del(&alg_region->list);
1634                         kfree(alg_region);
1635                 }
1636                 break;
1637
1638         default:
1639                 break;
1640         }
1641
1642         return 0;
1643 err:
1644         regmap_update_bits(dsp->regmap, dsp->base + ADSP2_CONTROL,
1645                            ADSP2_SYS_ENA | ADSP2_CORE_ENA | ADSP2_START, 0);
1646         return ret;
1647 }
1648 EXPORT_SYMBOL_GPL(wm_adsp2_event);
1649
1650 int wm_adsp2_init(struct wm_adsp *adsp, bool dvfs)
1651 {
1652         int ret;
1653
1654         /*
1655          * Disable the DSP memory by default when in reset for a small
1656          * power saving.
1657          */
1658         ret = regmap_update_bits(adsp->regmap, adsp->base + ADSP2_CONTROL,
1659                                  ADSP2_MEM_ENA, 0);
1660         if (ret != 0) {
1661                 adsp_err(adsp, "Failed to clear memory retention: %d\n", ret);
1662                 return ret;
1663         }
1664
1665         INIT_LIST_HEAD(&adsp->alg_regions);
1666         INIT_LIST_HEAD(&adsp->ctl_list);
1667
1668         if (dvfs) {
1669                 adsp->dvfs = devm_regulator_get(adsp->dev, "DCVDD");
1670                 if (IS_ERR(adsp->dvfs)) {
1671                         ret = PTR_ERR(adsp->dvfs);
1672                         dev_err(adsp->dev, "Failed to get DCVDD: %d\n", ret);
1673                         return ret;
1674                 }
1675
1676                 ret = regulator_enable(adsp->dvfs);
1677                 if (ret != 0) {
1678                         dev_err(adsp->dev, "Failed to enable DCVDD: %d\n",
1679                                 ret);
1680                         return ret;
1681                 }
1682
1683                 ret = regulator_set_voltage(adsp->dvfs, 1200000, 1800000);
1684                 if (ret != 0) {
1685                         dev_err(adsp->dev, "Failed to initialise DVFS: %d\n",
1686                                 ret);
1687                         return ret;
1688                 }
1689
1690                 ret = regulator_disable(adsp->dvfs);
1691                 if (ret != 0) {
1692                         dev_err(adsp->dev, "Failed to disable DCVDD: %d\n",
1693                                 ret);
1694                         return ret;
1695                 }
1696         }
1697
1698         return 0;
1699 }
1700 EXPORT_SYMBOL_GPL(wm_adsp2_init);