Pileus Git - ~andy/linux/blob - sound/soc/codecs/uda134x.c

   1 /*
   2  * uda134x.c  --  UDA134X ALSA SoC Codec driver
   3  *
   4  * Modifications by Christian Pellegrin <chripell@evolware.org>
   5  *
   6  * Copyright 2007 Dension Audio Systems Ltd.
   7  * Author: Zoltan Devai
   8  *
   9  * Based on the WM87xx drivers by Liam Girdwood and Richard Purdie
  10  *
  11  * This program is free software; you can redistribute it and/or modify
  12  * it under the terms of the GNU General Public License version 2 as
  13  * published by the Free Software Foundation.
  14  */
  15
  16 #include <linux/module.h>
  17 #include <linux/delay.h>
  18 #include <linux/slab.h>
  19 #include <sound/pcm.h>
  20 #include <sound/pcm_params.h>
  21 #include <sound/soc.h>
  22 #include <sound/soc-dapm.h>
  23 #include <sound/initval.h>
  24
  25 #include <sound/uda134x.h>
  26 #include <sound/l3.h>
  27
  28 #include "uda134x.h"
  29
  30
  31 #define UDA134X_RATES SNDRV_PCM_RATE_8000_48000
  32 #define UDA134X_FORMATS (SNDRV_PCM_FMTBIT_S8 | SNDRV_PCM_FMTBIT_S16_LE | \
  33                 SNDRV_PCM_FMTBIT_S18_3LE | SNDRV_PCM_FMTBIT_S20_3LE)
  34
  35 struct uda134x_priv {
  36         int sysclk;
  37         int dai_fmt;
  38
  39         struct snd_pcm_substream *master_substream;
  40         struct snd_pcm_substream *slave_substream;
  41 };
  42
  43 /* In-data addresses are hard-coded into the reg-cache values */
  44 static const char uda134x_reg[UDA134X_REGS_NUM] = {
  45         /* Extended address registers */
  46         0x04, 0x04, 0x04, 0x00, 0x00, 0x00, 0x00, 0x00,
  47         /* Status, data regs */
  48         0x00, 0x83, 0x00, 0x40, 0x80, 0xC0, 0x00,
  49 };
  50
  51 /*
  52  * The codec has no support for reading its registers except for peak level...
  53  */
  54 static inline unsigned int uda134x_read_reg_cache(struct snd_soc_codec *codec,
  55         unsigned int reg)
  56 {
  57         u8 *cache = codec->reg_cache;
  58
  59         if (reg >= UDA134X_REGS_NUM)
  60                 return -1;
  61         return cache[reg];
  62 }
  63
  64 /*
  65  * Write the register cache
  66  */
  67 static inline void uda134x_write_reg_cache(struct snd_soc_codec *codec,
  68         u8 reg, unsigned int value)
  69 {
  70         u8 *cache = codec->reg_cache;
  71
  72         if (reg >= UDA134X_REGS_NUM)
  73                 return;
  74         cache[reg] = value;
  75 }
  76
  77 /*
  78  * Write to the uda134x registers
  79  *
  80  */
  81 static int uda134x_write(struct snd_soc_codec *codec, unsigned int reg,
  82         unsigned int value)
  83 {
  84         int ret;
  85         u8 addr;
  86         u8 data = value;
  87         struct uda134x_platform_data *pd = codec->control_data;
  88
  89         pr_debug("%s reg: %02X, value:%02X\n", __func__, reg, value);
  90
  91         if (reg >= UDA134X_REGS_NUM) {
  92                 printk(KERN_ERR "%s unknown register: reg: %u",
  93                        __func__, reg);
  94                 return -EINVAL;
  95         }
  96
  97         uda134x_write_reg_cache(codec, reg, value);
  98
  99         switch (reg) {
 100         case UDA134X_STATUS0:
 101         case UDA134X_STATUS1:
 102                 addr = UDA134X_STATUS_ADDR;
 103                 break;
 104         case UDA134X_DATA000:
 105         case UDA134X_DATA001:
 106         case UDA134X_DATA010:
 107         case UDA134X_DATA011:
 108                 addr = UDA134X_DATA0_ADDR;
 109                 break;
 110         case UDA134X_DATA1:
 111                 addr = UDA134X_DATA1_ADDR;
 112                 break;
 113         default:
 114                 /* It's an extended address register */
 115                 addr =  (reg | UDA134X_EXTADDR_PREFIX);
 116
 117                 ret = l3_write(&pd->l3,
 118                                UDA134X_DATA0_ADDR, &addr, 1);
 119                 if (ret != 1)
 120                         return -EIO;
 121
 122                 addr = UDA134X_DATA0_ADDR;
 123                 data = (value | UDA134X_EXTDATA_PREFIX);
 124                 break;
 125         }
 126
 127         ret = l3_write(&pd->l3,
 128                        addr, &data, 1);
 129         if (ret != 1)
 130                 return -EIO;
 131
 132         return 0;
 133 }
 134
 135 static inline void uda134x_reset(struct snd_soc_codec *codec)
 136 {
 137         u8 reset_reg = uda134x_read_reg_cache(codec, UDA134X_STATUS0);
 138         uda134x_write(codec, UDA134X_STATUS0, reset_reg | (1<<6));
 139         msleep(1);
 140         uda134x_write(codec, UDA134X_STATUS0, reset_reg & ~(1<<6));
 141 }
 142
 143 static int uda134x_mute(struct snd_soc_dai *dai, int mute)
 144 {
 145         struct snd_soc_codec *codec = dai->codec;
 146         u8 mute_reg = uda134x_read_reg_cache(codec, UDA134X_DATA010);
 147
 148         pr_debug("%s mute: %d\n", __func__, mute);
 149
 150         if (mute)
 151                 mute_reg |= (1<<2);
 152         else
 153                 mute_reg &= ~(1<<2);
 154
 155         uda134x_write(codec, UDA134X_DATA010, mute_reg);
 156
 157         return 0;
 158 }
 159
 160 static int uda134x_startup(struct snd_pcm_substream *substream,
 161         struct snd_soc_dai *dai)
 162 {
 163         struct snd_soc_pcm_runtime *rtd = substream->private_data;
 164         struct snd_soc_device *socdev = rtd->socdev;
 165         struct snd_soc_codec *codec = socdev->card->codec;
 166         struct uda134x_priv *uda134x = snd_soc_codec_get_drvdata(codec);
 167         struct snd_pcm_runtime *master_runtime;
 168
 169         if (uda134x->master_substream) {
 170                 master_runtime = uda134x->master_substream->runtime;
 171
 172                 pr_debug("%s constraining to %d bits at %d\n", __func__,
 173                          master_runtime->sample_bits,
 174                          master_runtime->rate);
 175
 176                 snd_pcm_hw_constraint_minmax(substream->runtime,
 177                                              SNDRV_PCM_HW_PARAM_RATE,
 178                                              master_runtime->rate,
 179                                              master_runtime->rate);
 180
 181                 snd_pcm_hw_constraint_minmax(substream->runtime,
 182                                              SNDRV_PCM_HW_PARAM_SAMPLE_BITS,
 183                                              master_runtime->sample_bits,
 184                                              master_runtime->sample_bits);
 185
 186                 uda134x->slave_substream = substream;
 187         } else
 188                 uda134x->master_substream = substream;
 189
 190         return 0;
 191 }
 192
 193 static void uda134x_shutdown(struct snd_pcm_substream *substream,
 194         struct snd_soc_dai *dai)
 195 {
 196         struct snd_soc_pcm_runtime *rtd = substream->private_data;
 197         struct snd_soc_device *socdev = rtd->socdev;
 198         struct snd_soc_codec *codec = socdev->card->codec;
 199         struct uda134x_priv *uda134x = snd_soc_codec_get_drvdata(codec);
 200
 201         if (uda134x->master_substream == substream)
 202                 uda134x->master_substream = uda134x->slave_substream;
 203
 204         uda134x->slave_substream = NULL;
 205 }
 206
 207 static int uda134x_hw_params(struct snd_pcm_substream *substream,
 208         struct snd_pcm_hw_params *params,
 209         struct snd_soc_dai *dai)
 210 {
 211         struct snd_soc_pcm_runtime *rtd = substream->private_data;
 212         struct snd_soc_device *socdev = rtd->socdev;
 213         struct snd_soc_codec *codec = socdev->card->codec;
 214         struct uda134x_priv *uda134x = snd_soc_codec_get_drvdata(codec);
 215         u8 hw_params;
 216
 217         if (substream == uda134x->slave_substream) {
 218                 pr_debug("%s ignoring hw_params for slave substream\n",
 219                          __func__);
 220                 return 0;
 221         }
 222
 223         hw_params = uda134x_read_reg_cache(codec, UDA134X_STATUS0);
 224         hw_params &= STATUS0_SYSCLK_MASK;
 225         hw_params &= STATUS0_DAIFMT_MASK;
 226
 227         pr_debug("%s sysclk: %d, rate:%d\n", __func__,
 228                  uda134x->sysclk, params_rate(params));
 229
 230         /* set SYSCLK / fs ratio */
 231         switch (uda134x->sysclk / params_rate(params)) {
 232         case 512:
 233                 break;
 234         case 384:
 235                 hw_params |= (1<<4);
 236                 break;
 237         case 256:
 238                 hw_params |= (1<<5);
 239                 break;
 240         default:
 241                 printk(KERN_ERR "%s unsupported fs\n", __func__);
 242                 return -EINVAL;
 243         }
 244
 245         pr_debug("%s dai_fmt: %d, params_format:%d\n", __func__,
 246                  uda134x->dai_fmt, params_format(params));
 247
 248         /* set DAI format and word length */
 249         switch (uda134x->dai_fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
 250         case SND_SOC_DAIFMT_I2S:
 251                 break;
 252         case SND_SOC_DAIFMT_RIGHT_J:
 253                 switch (params_format(params)) {
 254                 case SNDRV_PCM_FORMAT_S16_LE:
 255                         hw_params |= (1<<1);
 256                         break;
 257                 case SNDRV_PCM_FORMAT_S18_3LE:
 258                         hw_params |= (1<<2);
 259                         break;
 260                 case SNDRV_PCM_FORMAT_S20_3LE:
 261                         hw_params |= ((1<<2) | (1<<1));
 262                         break;
 263                 default:
 264                         printk(KERN_ERR "%s unsupported format (right)\n",
 265                                __func__);
 266                         return -EINVAL;
 267                 }
 268                 break;
 269         case SND_SOC_DAIFMT_LEFT_J:
 270                 hw_params |= (1<<3);
 271                 break;
 272         default:
 273                 printk(KERN_ERR "%s unsupported format\n", __func__);
 274                 return -EINVAL;
 275         }
 276
 277         uda134x_write(codec, UDA134X_STATUS0, hw_params);
 278
 279         return 0;
 280 }
 281
 282 static int uda134x_set_dai_sysclk(struct snd_soc_dai *codec_dai,
 283                                   int clk_id, unsigned int freq, int dir)
 284 {
 285         struct snd_soc_codec *codec = codec_dai->codec;
 286         struct uda134x_priv *uda134x = snd_soc_codec_get_drvdata(codec);
 287
 288         pr_debug("%s clk_id: %d, freq: %u, dir: %d\n", __func__,
 289                  clk_id, freq, dir);
 290
 291         /* Anything between 256fs*8Khz and 512fs*48Khz should be acceptable
 292            because the codec is slave. Of course limitations of the clock
 293            master (the IIS controller) apply.
 294            We'll error out on set_hw_params if it's not OK */
 295         if ((freq >= (256 * 8000)) && (freq <= (512 * 48000))) {
 296                 uda134x->sysclk = freq;
 297                 return 0;
 298         }
 299
 300         printk(KERN_ERR "%s unsupported sysclk\n", __func__);
 301         return -EINVAL;
 302 }
 303
 304 static int uda134x_set_dai_fmt(struct snd_soc_dai *codec_dai,
 305                                unsigned int fmt)
 306 {
 307         struct snd_soc_codec *codec = codec_dai->codec;
 308         struct uda134x_priv *uda134x = snd_soc_codec_get_drvdata(codec);
 309
 310         pr_debug("%s fmt: %08X\n", __func__, fmt);
 311
 312         /* codec supports only full slave mode */
 313         if ((fmt & SND_SOC_DAIFMT_MASTER_MASK) != SND_SOC_DAIFMT_CBS_CFS) {
 314                 printk(KERN_ERR "%s unsupported slave mode\n", __func__);
 315                 return -EINVAL;
 316         }
 317
 318         /* no support for clock inversion */
 319         if ((fmt & SND_SOC_DAIFMT_INV_MASK) != SND_SOC_DAIFMT_NB_NF) {
 320                 printk(KERN_ERR "%s unsupported clock inversion\n", __func__);
 321                 return -EINVAL;
 322         }
 323
 324         /* We can't setup DAI format here as it depends on the word bit num */
 325         /* so let's just store the value for later */
 326         uda134x->dai_fmt = fmt;
 327
 328         return 0;
 329 }
 330
 331 static int uda134x_set_bias_level(struct snd_soc_codec *codec,
 332                                   enum snd_soc_bias_level level)
 333 {
 334         u8 reg;
 335         struct uda134x_platform_data *pd = codec->control_data;
 336         int i;
 337         u8 *cache = codec->reg_cache;
 338
 339         pr_debug("%s bias level %d\n", __func__, level);
 340
 341         switch (level) {
 342         case SND_SOC_BIAS_ON:
 343                 /* ADC, DAC on */
 344                 reg = uda134x_read_reg_cache(codec, UDA134X_STATUS1);
 345                 uda134x_write(codec, UDA134X_STATUS1, reg | 0x03);
 346                 break;
 347         case SND_SOC_BIAS_PREPARE:
 348                 /* power on */
 349                 if (pd->power) {
 350                         pd->power(1);
 351                         /* Sync reg_cache with the hardware */
 352                         for (i = 0; i < ARRAY_SIZE(uda134x_reg); i++)
 353                                 codec->write(codec, i, *cache++);
 354                 }
 355                 break;
 356         case SND_SOC_BIAS_STANDBY:
 357                 /* ADC, DAC power off */
 358                 reg = uda134x_read_reg_cache(codec, UDA134X_STATUS1);
 359                 uda134x_write(codec, UDA134X_STATUS1, reg & ~(0x03));
 360                 break;
 361         case SND_SOC_BIAS_OFF:
 362                 /* power off */
 363                 if (pd->power)
 364                         pd->power(0);
 365                 break;
 366         }
 367         codec->bias_level = level;
 368         return 0;
 369 }
 370
 371 static const char *uda134x_dsp_setting[] = {"Flat", "Minimum1",
 372                                             "Minimum2", "Maximum"};
 373 static const char *uda134x_deemph[] = {"None", "32Khz", "44.1Khz", "48Khz"};
 374 static const char *uda134x_mixmode[] = {"Differential", "Analog1",
 375                                         "Analog2", "Both"};
 376
 377 static const struct soc_enum uda134x_mixer_enum[] = {
 378 SOC_ENUM_SINGLE(UDA134X_DATA010, 0, 0x04, uda134x_dsp_setting),
 379 SOC_ENUM_SINGLE(UDA134X_DATA010, 3, 0x04, uda134x_deemph),
 380 SOC_ENUM_SINGLE(UDA134X_EA010, 0, 0x04, uda134x_mixmode),
 381 };
 382
 383 static const struct snd_kcontrol_new uda1341_snd_controls[] = {
 384 SOC_SINGLE("Master Playback Volume", UDA134X_DATA000, 0, 0x3F, 1),
 385 SOC_SINGLE("Capture Volume", UDA134X_EA010, 2, 0x07, 0),
 386 SOC_SINGLE("Analog1 Volume", UDA134X_EA000, 0, 0x1F, 1),
 387 SOC_SINGLE("Analog2 Volume", UDA134X_EA001, 0, 0x1F, 1),
 388
 389 SOC_SINGLE("Mic Sensitivity", UDA134X_EA010, 2, 7, 0),
 390 SOC_SINGLE("Mic Volume", UDA134X_EA101, 0, 0x1F, 0),
 391
 392 SOC_SINGLE("Tone Control - Bass", UDA134X_DATA001, 2, 0xF, 0),
 393 SOC_SINGLE("Tone Control - Treble", UDA134X_DATA001, 0, 3, 0),
 394
 395 SOC_ENUM("Sound Processing Filter", uda134x_mixer_enum[0]),
 396 SOC_ENUM("PCM Playback De-emphasis", uda134x_mixer_enum[1]),
 397 SOC_ENUM("Input Mux", uda134x_mixer_enum[2]),
 398
 399 SOC_SINGLE("AGC Switch", UDA134X_EA100, 4, 1, 0),
 400 SOC_SINGLE("AGC Target Volume", UDA134X_EA110, 0, 0x03, 1),
 401 SOC_SINGLE("AGC Timing", UDA134X_EA110, 2, 0x07, 0),
 402
 403 SOC_SINGLE("DAC +6dB Switch", UDA134X_STATUS1, 6, 1, 0),
 404 SOC_SINGLE("ADC +6dB Switch", UDA134X_STATUS1, 5, 1, 0),
 405 SOC_SINGLE("ADC Polarity Switch", UDA134X_STATUS1, 4, 1, 0),
 406 SOC_SINGLE("DAC Polarity Switch", UDA134X_STATUS1, 3, 1, 0),
 407 SOC_SINGLE("Double Speed Playback Switch", UDA134X_STATUS1, 2, 1, 0),
 408 SOC_SINGLE("DC Filter Enable Switch", UDA134X_STATUS0, 0, 1, 0),
 409 };
 410
 411 static const struct snd_kcontrol_new uda1340_snd_controls[] = {
 412 SOC_SINGLE("Master Playback Volume", UDA134X_DATA000, 0, 0x3F, 1),
 413
 414 SOC_SINGLE("Tone Control - Bass", UDA134X_DATA001, 2, 0xF, 0),
 415 SOC_SINGLE("Tone Control - Treble", UDA134X_DATA001, 0, 3, 0),
 416
 417 SOC_ENUM("Sound Processing Filter", uda134x_mixer_enum[0]),
 418 SOC_ENUM("PCM Playback De-emphasis", uda134x_mixer_enum[1]),
 419
 420 SOC_SINGLE("DC Filter Enable Switch", UDA134X_STATUS0, 0, 1, 0),
 421 };
 422
 423 static const struct snd_kcontrol_new uda1345_snd_controls[] = {
 424 SOC_SINGLE("Master Playback Volume", UDA134X_DATA000, 0, 0x3F, 1),
 425
 426 SOC_ENUM("PCM Playback De-emphasis", uda134x_mixer_enum[1]),
 427
 428 SOC_SINGLE("DC Filter Enable Switch", UDA134X_STATUS0, 0, 1, 0),
 429 };
 430
 431 static struct snd_soc_dai_ops uda134x_dai_ops = {
 432         .startup        = uda134x_startup,
 433         .shutdown       = uda134x_shutdown,
 434         .hw_params      = uda134x_hw_params,
 435         .digital_mute   = uda134x_mute,
 436         .set_sysclk     = uda134x_set_dai_sysclk,
 437         .set_fmt        = uda134x_set_dai_fmt,
 438 };
 439
 440 struct snd_soc_dai uda134x_dai = {
 441         .name = "UDA134X",
 442         /* playback capabilities */
 443         .playback = {
 444                 .stream_name = "Playback",
 445                 .channels_min = 1,
 446                 .channels_max = 2,
 447                 .rates = UDA134X_RATES,
 448                 .formats = UDA134X_FORMATS,
 449         },
 450         /* capture capabilities */
 451         .capture = {
 452                 .stream_name = "Capture",
 453                 .channels_min = 1,
 454                 .channels_max = 2,
 455                 .rates = UDA134X_RATES,
 456                 .formats = UDA134X_FORMATS,
 457         },
 458         /* pcm operations */
 459         .ops = &uda134x_dai_ops,
 460 };
 461 EXPORT_SYMBOL(uda134x_dai);
 462
 463
 464 static int uda134x_soc_probe(struct platform_device *pdev)
 465 {
 466         struct snd_soc_device *socdev = platform_get_drvdata(pdev);
 467         struct snd_soc_codec *codec;
 468         struct uda134x_priv *uda134x;
 469         void *codec_setup_data = socdev->codec_data;
 470         int ret = -ENOMEM;
 471         struct uda134x_platform_data *pd;
 472
 473         printk(KERN_INFO "UDA134X SoC Audio Codec\n");
 474
 475         if (!codec_setup_data) {
 476                 printk(KERN_ERR "UDA134X SoC codec: "
 477                        "missing L3 bitbang function\n");
 478                 return -ENODEV;
 479         }
 480
 481         pd = codec_setup_data;
 482         switch (pd->model) {
 483         case UDA134X_UDA1340:
 484         case UDA134X_UDA1341:
 485         case UDA134X_UDA1344:
 486         case UDA134X_UDA1345:
 487                 break;
 488         default:
 489                 printk(KERN_ERR "UDA134X SoC codec: "
 490                        "unsupported model %d\n",
 491                         pd->model);
 492                 return -EINVAL;
 493         }
 494
 495         socdev->card->codec = kzalloc(sizeof(struct snd_soc_codec), GFP_KERNEL);
 496         if (socdev->card->codec == NULL)
 497                 return ret;
 498
 499         codec = socdev->card->codec;
 500
 501         uda134x = kzalloc(sizeof(struct uda134x_priv), GFP_KERNEL);
 502         if (uda134x == NULL)
 503                 goto priv_err;
 504         snd_soc_codec_set_drvdata(codec, uda134x);
 505
 506         codec->reg_cache = kmemdup(uda134x_reg, sizeof(uda134x_reg),
 507                                    GFP_KERNEL);
 508         if (codec->reg_cache == NULL)
 509                 goto reg_err;
 510
 511         mutex_init(&codec->mutex);
 512
 513         codec->reg_cache_size = sizeof(uda134x_reg);
 514         codec->reg_cache_step = 1;
 515
 516         codec->name = "UDA134X";
 517         codec->owner = THIS_MODULE;
 518         codec->dai = &uda134x_dai;
 519         codec->num_dai = 1;
 520         codec->read = uda134x_read_reg_cache;
 521         codec->write = uda134x_write;
 522
 523         INIT_LIST_HEAD(&codec->dapm_widgets);
 524         INIT_LIST_HEAD(&codec->dapm_paths);
 525
 526         codec->control_data = codec_setup_data;
 527
 528         if (pd->power)
 529                 pd->power(1);
 530
 531         uda134x_reset(codec);
 532
 533         if (pd->is_powered_on_standby) {
 534                 codec->set_bias_level = NULL;
 535                 uda134x_set_bias_level(codec, SND_SOC_BIAS_ON);
 536         } else {
 537                 codec->set_bias_level = uda134x_set_bias_level;
 538                 uda134x_set_bias_level(codec, SND_SOC_BIAS_STANDBY);
 539         }
 540
 541         /* register pcms */
 542         ret = snd_soc_new_pcms(socdev, SNDRV_DEFAULT_IDX1, SNDRV_DEFAULT_STR1);
 543         if (ret < 0) {
 544                 printk(KERN_ERR "UDA134X: failed to register pcms\n");
 545                 goto pcm_err;
 546         }
 547
 548         switch (pd->model) {
 549         case UDA134X_UDA1340:
 550         case UDA134X_UDA1344:
 551                 ret = snd_soc_add_controls(codec, uda1340_snd_controls,
 552                                         ARRAY_SIZE(uda1340_snd_controls));
 553         break;
 554         case UDA134X_UDA1341:
 555                 ret = snd_soc_add_controls(codec, uda1341_snd_controls,
 556                                         ARRAY_SIZE(uda1341_snd_controls));
 557         break;
 558         case UDA134X_UDA1345:
 559                 ret = snd_soc_add_controls(codec, uda1345_snd_controls,
 560                                         ARRAY_SIZE(uda1345_snd_controls));
 561         break;
 562         default:
 563                 printk(KERN_ERR "%s unknown codec type: %d",
 564                         __func__, pd->model);
 565         return -EINVAL;
 566         }
 567
 568         if (ret < 0) {
 569                 printk(KERN_ERR "UDA134X: failed to register controls\n");
 570                 goto pcm_err;
 571         }
 572
 573         return 0;
 574
 575 pcm_err:
 576         kfree(codec->reg_cache);
 577 reg_err:
 578         kfree(snd_soc_codec_get_drvdata(codec));
 579 priv_err:
 580         kfree(codec);
 581         return ret;
 582 }
 583
 584 /* power down chip */
 585 static int uda134x_soc_remove(struct platform_device *pdev)
 586 {
 587         struct snd_soc_device *socdev = platform_get_drvdata(pdev);
 588         struct snd_soc_codec *codec = socdev->card->codec;
 589
 590         uda134x_set_bias_level(codec, SND_SOC_BIAS_STANDBY);
 591         uda134x_set_bias_level(codec, SND_SOC_BIAS_OFF);
 592
 593         snd_soc_free_pcms(socdev);
 594         snd_soc_dapm_free(socdev);
 595
 596         kfree(snd_soc_codec_get_drvdata(codec));
 597         kfree(codec->reg_cache);
 598         kfree(codec);
 599
 600         return 0;
 601 }
 602
 603 #if defined(CONFIG_PM)
 604 static int uda134x_soc_suspend(struct platform_device *pdev,
 605                                                 pm_message_t state)
 606 {
 607         struct snd_soc_device *socdev = platform_get_drvdata(pdev);
 608         struct snd_soc_codec *codec = socdev->card->codec;
 609
 610         uda134x_set_bias_level(codec, SND_SOC_BIAS_STANDBY);
 611         uda134x_set_bias_level(codec, SND_SOC_BIAS_OFF);
 612         return 0;
 613 }
 614
 615 static int uda134x_soc_resume(struct platform_device *pdev)
 616 {
 617         struct snd_soc_device *socdev = platform_get_drvdata(pdev);
 618         struct snd_soc_codec *codec = socdev->card->codec;
 619
 620         uda134x_set_bias_level(codec, SND_SOC_BIAS_PREPARE);
 621         uda134x_set_bias_level(codec, SND_SOC_BIAS_ON);
 622         return 0;
 623 }
 624 #else
 625 #define uda134x_soc_suspend NULL
 626 #define uda134x_soc_resume NULL
 627 #endif /* CONFIG_PM */
 628
 629 struct snd_soc_codec_device soc_codec_dev_uda134x = {
 630         .probe =        uda134x_soc_probe,
 631         .remove =       uda134x_soc_remove,
 632         .suspend =      uda134x_soc_suspend,
 633         .resume =       uda134x_soc_resume,
 634 };
 635 EXPORT_SYMBOL_GPL(soc_codec_dev_uda134x);
 636
 637 static int __init uda134x_init(void)
 638 {
 639         return snd_soc_register_dai(&uda134x_dai);
 640 }
 641 module_init(uda134x_init);
 642
 643 static void __exit uda134x_exit(void)
 644 {
 645         snd_soc_unregister_dai(&uda134x_dai);
 646 }
 647 module_exit(uda134x_exit);
 648
 649 MODULE_DESCRIPTION("UDA134X ALSA soc codec driver");
 650 MODULE_AUTHOR("Zoltan Devai, Christian Pellegrin <chripell@evolware.org>");
 651 MODULE_LICENSE("GPL");