2 * TC Applied Technologies Digital Interface Communications Engine driver
4 * Copyright (c) Clemens Ladisch <clemens@ladisch.de>
5 * Licensed under the terms of the GNU General Public License, version 2.
8 #include <linux/compat.h>
9 #include <linux/delay.h>
10 #include <linux/device.h>
11 #include <linux/firewire.h>
12 #include <linux/firewire-constants.h>
13 #include <linux/module.h>
14 #include <linux/mod_devicetable.h>
15 #include <linux/mutex.h>
16 #include <linux/slab.h>
17 #include <linux/spinlock.h>
18 #include <linux/wait.h>
19 #include <sound/control.h>
20 #include <sound/core.h>
21 #include <sound/firewire.h>
22 #include <sound/hwdep.h>
23 #include <sound/initval.h>
24 #include <sound/pcm.h>
25 #include <sound/pcm_params.h>
27 #include "iso-resources.h"
29 #include "dice-interface.h"
33 struct snd_card *card;
37 unsigned int global_offset;
38 unsigned int rx_offset;
39 struct fw_address_handler notification_handler;
41 int dev_lock_count; /* > 0 driver, < 0 userspace */
42 bool dev_lock_changed;
44 wait_queue_head_t hwdep_wait;
45 u32 notification_bits;
46 struct snd_pcm_substream *pcm;
47 struct fw_iso_resources resources;
48 struct amdtp_out_stream stream;
51 MODULE_DESCRIPTION("DICE driver");
52 MODULE_AUTHOR("Clemens Ladisch <clemens@ladisch.de>");
53 MODULE_LICENSE("GPL v2");
55 static const unsigned int dice_rates[] = {
65 static void dice_lock_changed(struct dice *dice)
67 dice->dev_lock_changed = true;
68 wake_up(&dice->hwdep_wait);
71 static int dice_try_lock(struct dice *dice)
75 spin_lock_irq(&dice->lock);
77 if (dice->dev_lock_count < 0) {
82 if (dice->dev_lock_count++ == 0)
83 dice_lock_changed(dice);
87 spin_unlock_irq(&dice->lock);
92 static void dice_unlock(struct dice *dice)
94 spin_lock_irq(&dice->lock);
96 if (WARN_ON(dice->dev_lock_count <= 0))
99 if (--dice->dev_lock_count == 0)
100 dice_lock_changed(dice);
103 spin_unlock_irq(&dice->lock);
106 static inline u64 global_address(struct dice *dice, unsigned int offset)
108 return DICE_PRIVATE_SPACE + dice->global_offset + offset;
112 static inline u64 rx_address(struct dice *dice, unsigned int offset)
114 return DICE_PRIVATE_SPACE + dice->rx_offset + offset;
117 static int dice_owner_set(struct dice *dice)
119 struct fw_device *device = fw_parent_device(dice->unit);
123 buffer = kmalloc(2 * 8, GFP_KERNEL);
128 buffer[0] = cpu_to_be64(OWNER_NO_OWNER);
129 buffer[1] = cpu_to_be64(
130 ((u64)device->card->node_id << OWNER_NODE_SHIFT) |
131 dice->notification_handler.offset);
133 dice->owner_generation = device->generation;
134 smp_rmb(); /* node_id vs. generation */
135 err = snd_fw_transaction(dice->unit,
136 TCODE_LOCK_COMPARE_SWAP,
137 global_address(dice, GLOBAL_OWNER),
139 FW_FIXED_GENERATION |
140 dice->owner_generation);
143 if (buffer[0] != cpu_to_be64(OWNER_NO_OWNER)) {
144 dev_err(&dice->unit->device,
145 "device is already in use\n");
150 if (err != -EAGAIN || ++errors >= 3)
161 static int dice_owner_update(struct dice *dice)
163 struct fw_device *device = fw_parent_device(dice->unit);
167 if (dice->owner_generation == -1)
170 buffer = kmalloc(2 * 8, GFP_KERNEL);
174 buffer[0] = cpu_to_be64(OWNER_NO_OWNER);
175 buffer[1] = cpu_to_be64(
176 ((u64)device->card->node_id << OWNER_NODE_SHIFT) |
177 dice->notification_handler.offset);
179 dice->owner_generation = device->generation;
180 smp_rmb(); /* node_id vs. generation */
181 err = snd_fw_transaction(dice->unit, TCODE_LOCK_COMPARE_SWAP,
182 global_address(dice, GLOBAL_OWNER),
184 FW_FIXED_GENERATION | dice->owner_generation);
187 if (buffer[0] != cpu_to_be64(OWNER_NO_OWNER)) {
188 dev_err(&dice->unit->device,
189 "device is already in use\n");
192 } else if (err == -EAGAIN) {
193 err = 0; /* try again later */
199 dice->owner_generation = -1;
204 static void dice_owner_clear(struct dice *dice)
206 struct fw_device *device = fw_parent_device(dice->unit);
209 buffer = kmalloc(2 * 8, GFP_KERNEL);
213 buffer[0] = cpu_to_be64(
214 ((u64)device->card->node_id << OWNER_NODE_SHIFT) |
215 dice->notification_handler.offset);
216 buffer[1] = cpu_to_be64(OWNER_NO_OWNER);
217 snd_fw_transaction(dice->unit, TCODE_LOCK_COMPARE_SWAP,
218 global_address(dice, GLOBAL_OWNER),
219 buffer, 2 * 8, FW_QUIET |
220 FW_FIXED_GENERATION | dice->owner_generation);
224 dice->owner_generation = -1;
227 static int dice_enable_set(struct dice *dice)
232 value = cpu_to_be32(1);
233 err = snd_fw_transaction(dice->unit, TCODE_WRITE_QUADLET_REQUEST,
234 global_address(dice, GLOBAL_ENABLE),
236 FW_FIXED_GENERATION | dice->owner_generation);
240 dice->global_enabled = true;
245 static void dice_enable_clear(struct dice *dice)
249 if (!dice->global_enabled)
253 snd_fw_transaction(dice->unit, TCODE_WRITE_QUADLET_REQUEST,
254 global_address(dice, GLOBAL_ENABLE),
255 &value, 4, FW_QUIET |
256 FW_FIXED_GENERATION | dice->owner_generation);
258 dice->global_enabled = false;
261 static void dice_notification(struct fw_card *card, struct fw_request *request,
262 int tcode, int destination, int source,
263 int generation, unsigned long long offset,
264 void *data, size_t length, void *callback_data)
266 struct dice *dice = callback_data;
269 if (tcode != TCODE_WRITE_QUADLET_REQUEST) {
270 fw_send_response(card, request, RCODE_TYPE_ERROR);
273 if ((offset & 3) != 0) {
274 fw_send_response(card, request, RCODE_ADDRESS_ERROR);
277 spin_lock_irqsave(&dice->lock, flags);
278 dice->notification_bits |= be32_to_cpup(data);
279 spin_unlock_irqrestore(&dice->lock, flags);
280 fw_send_response(card, request, RCODE_COMPLETE);
281 wake_up(&dice->hwdep_wait);
284 static int dice_open(struct snd_pcm_substream *substream)
286 static const struct snd_pcm_hardware hardware = {
287 .info = SNDRV_PCM_INFO_MMAP |
288 SNDRV_PCM_INFO_MMAP_VALID |
289 SNDRV_PCM_INFO_BATCH |
290 SNDRV_PCM_INFO_INTERLEAVED |
291 SNDRV_PCM_INFO_BLOCK_TRANSFER,
292 .formats = AMDTP_OUT_PCM_FORMAT_BITS,
293 .buffer_bytes_max = 16 * 1024 * 1024,
294 .period_bytes_min = 1,
295 .period_bytes_max = UINT_MAX,
297 .periods_max = UINT_MAX,
299 struct dice *dice = substream->private_data;
300 struct snd_pcm_runtime *runtime = substream->runtime;
301 __be32 clock_sel, data[2];
302 unsigned int rate_index, number_audio, number_midi;
305 err = dice_try_lock(dice);
309 err = snd_fw_transaction(dice->unit, TCODE_READ_QUADLET_REQUEST,
310 global_address(dice, GLOBAL_CLOCK_SELECT),
314 rate_index = (be32_to_cpu(clock_sel) & CLOCK_RATE_MASK)
316 if (rate_index >= ARRAY_SIZE(dice_rates)) {
321 err = snd_fw_transaction(dice->unit, TCODE_READ_BLOCK_REQUEST,
322 rx_address(dice, RX_NUMBER_AUDIO),
326 number_audio = be32_to_cpu(data[0]);
327 number_midi = be32_to_cpu(data[1]);
329 runtime->hw = hardware;
331 runtime->hw.rates = snd_pcm_rate_to_rate_bit(dice_rates[rate_index]);
332 snd_pcm_limit_hw_rates(runtime);
334 runtime->hw.channels_min = number_audio;
335 runtime->hw.channels_max = number_audio;
337 amdtp_out_stream_set_parameters(&dice->stream, dice_rates[rate_index],
338 number_audio, number_midi);
340 err = snd_pcm_hw_constraint_step(runtime, 0,
341 SNDRV_PCM_HW_PARAM_PERIOD_SIZE,
342 amdtp_syt_intervals[rate_index]);
345 err = snd_pcm_hw_constraint_step(runtime, 0,
346 SNDRV_PCM_HW_PARAM_BUFFER_SIZE,
347 amdtp_syt_intervals[rate_index]);
351 err = snd_pcm_hw_constraint_minmax(runtime,
352 SNDRV_PCM_HW_PARAM_PERIOD_TIME,
357 err = snd_pcm_hw_constraint_msbits(runtime, 0, 32, 24);
369 static int dice_close(struct snd_pcm_substream *substream)
371 struct dice *dice = substream->private_data;
378 static int dice_stream_start_packets(struct dice *dice)
382 if (amdtp_out_stream_running(&dice->stream))
385 err = amdtp_out_stream_start(&dice->stream, dice->resources.channel,
386 fw_parent_device(dice->unit)->max_speed);
390 err = dice_enable_set(dice);
392 amdtp_out_stream_stop(&dice->stream);
399 static int dice_stream_start(struct dice *dice)
404 if (!dice->resources.allocated) {
405 err = fw_iso_resources_allocate(&dice->resources,
406 amdtp_out_stream_get_max_payload(&dice->stream),
407 fw_parent_device(dice->unit)->max_speed);
411 channel = cpu_to_be32(dice->resources.channel);
412 err = snd_fw_transaction(dice->unit,
413 TCODE_WRITE_QUADLET_REQUEST,
414 rx_address(dice, RX_ISOCHRONOUS),
420 err = dice_stream_start_packets(dice);
427 channel = cpu_to_be32((u32)-1);
428 snd_fw_transaction(dice->unit, TCODE_WRITE_QUADLET_REQUEST,
429 rx_address(dice, RX_ISOCHRONOUS), &channel, 4, 0);
431 fw_iso_resources_free(&dice->resources);
436 static void dice_stream_stop_packets(struct dice *dice)
438 if (amdtp_out_stream_running(&dice->stream)) {
439 dice_enable_clear(dice);
440 amdtp_out_stream_stop(&dice->stream);
444 static void dice_stream_stop(struct dice *dice)
448 dice_stream_stop_packets(dice);
450 if (!dice->resources.allocated)
453 channel = cpu_to_be32((u32)-1);
454 snd_fw_transaction(dice->unit, TCODE_WRITE_QUADLET_REQUEST,
455 rx_address(dice, RX_ISOCHRONOUS), &channel, 4, 0);
457 fw_iso_resources_free(&dice->resources);
460 static int dice_hw_params(struct snd_pcm_substream *substream,
461 struct snd_pcm_hw_params *hw_params)
463 struct dice *dice = substream->private_data;
466 mutex_lock(&dice->mutex);
467 dice_stream_stop(dice);
468 mutex_unlock(&dice->mutex);
470 err = snd_pcm_lib_alloc_vmalloc_buffer(substream,
471 params_buffer_bytes(hw_params));
475 amdtp_out_stream_set_pcm_format(&dice->stream,
476 params_format(hw_params));
484 static int dice_hw_free(struct snd_pcm_substream *substream)
486 struct dice *dice = substream->private_data;
488 mutex_lock(&dice->mutex);
489 dice_stream_stop(dice);
490 mutex_unlock(&dice->mutex);
492 return snd_pcm_lib_free_vmalloc_buffer(substream);
495 static int dice_prepare(struct snd_pcm_substream *substream)
497 struct dice *dice = substream->private_data;
500 mutex_lock(&dice->mutex);
502 if (amdtp_out_streaming_error(&dice->stream))
503 dice_stream_stop_packets(dice);
505 err = dice_stream_start(dice);
507 mutex_unlock(&dice->mutex);
511 mutex_unlock(&dice->mutex);
513 amdtp_out_stream_pcm_prepare(&dice->stream);
518 static int dice_trigger(struct snd_pcm_substream *substream, int cmd)
520 struct dice *dice = substream->private_data;
521 struct snd_pcm_substream *pcm;
524 case SNDRV_PCM_TRIGGER_START:
527 case SNDRV_PCM_TRIGGER_STOP:
533 amdtp_out_stream_pcm_trigger(&dice->stream, pcm);
538 static snd_pcm_uframes_t dice_pointer(struct snd_pcm_substream *substream)
540 struct dice *dice = substream->private_data;
542 return amdtp_out_stream_pcm_pointer(&dice->stream);
545 static int dice_create_pcm(struct dice *dice)
547 static struct snd_pcm_ops ops = {
550 .ioctl = snd_pcm_lib_ioctl,
551 .hw_params = dice_hw_params,
552 .hw_free = dice_hw_free,
553 .prepare = dice_prepare,
554 .trigger = dice_trigger,
555 .pointer = dice_pointer,
556 .page = snd_pcm_lib_get_vmalloc_page,
557 .mmap = snd_pcm_lib_mmap_vmalloc,
562 err = snd_pcm_new(dice->card, "DICE", 0, 1, 0, &pcm);
565 pcm->private_data = dice;
566 strcpy(pcm->name, dice->card->shortname);
567 dice->pcm = pcm->streams[SNDRV_PCM_STREAM_PLAYBACK].substream;
568 dice->pcm->ops = &ops;
573 static long dice_hwdep_read(struct snd_hwdep *hwdep, char __user *buf,
574 long count, loff_t *offset)
576 struct dice *dice = hwdep->private_data;
578 union snd_firewire_event event;
580 spin_lock_irq(&dice->lock);
582 while (!dice->dev_lock_changed && dice->notification_bits == 0) {
583 prepare_to_wait(&dice->hwdep_wait, &wait, TASK_INTERRUPTIBLE);
584 spin_unlock_irq(&dice->lock);
586 finish_wait(&dice->hwdep_wait, &wait);
587 if (signal_pending(current))
589 spin_lock_irq(&dice->lock);
592 memset(&event, 0, sizeof(event));
593 if (dice->dev_lock_changed) {
594 event.lock_status.type = SNDRV_FIREWIRE_EVENT_LOCK_STATUS;
595 event.lock_status.status = dice->dev_lock_count > 0;
596 dice->dev_lock_changed = false;
598 count = min(count, (long)sizeof(event.lock_status));
600 event.dice_notification.type = SNDRV_FIREWIRE_EVENT_DICE_NOTIFICATION;
601 event.dice_notification.notification = dice->notification_bits;
602 dice->notification_bits = 0;
604 count = min(count, (long)sizeof(event.dice_notification));
607 spin_unlock_irq(&dice->lock);
609 if (copy_to_user(buf, &event, count))
615 static unsigned int dice_hwdep_poll(struct snd_hwdep *hwdep, struct file *file,
618 struct dice *dice = hwdep->private_data;
621 poll_wait(file, &dice->hwdep_wait, wait);
623 spin_lock_irq(&dice->lock);
624 if (dice->dev_lock_changed || dice->notification_bits != 0)
625 events = POLLIN | POLLRDNORM;
628 spin_unlock_irq(&dice->lock);
633 static int dice_hwdep_get_info(struct dice *dice, void __user *arg)
635 struct fw_device *dev = fw_parent_device(dice->unit);
636 struct snd_firewire_get_info info;
638 memset(&info, 0, sizeof(info));
639 info.type = SNDRV_FIREWIRE_TYPE_DICE;
640 info.card = dev->card->index;
641 *(__be32 *)&info.guid[0] = cpu_to_be32(dev->config_rom[3]);
642 *(__be32 *)&info.guid[4] = cpu_to_be32(dev->config_rom[4]);
643 strlcpy(info.device_name, dev_name(&dev->device),
644 sizeof(info.device_name));
646 if (copy_to_user(arg, &info, sizeof(info)))
652 static int dice_hwdep_lock(struct dice *dice)
656 spin_lock_irq(&dice->lock);
658 if (dice->dev_lock_count == 0) {
659 dice->dev_lock_count = -1;
665 spin_unlock_irq(&dice->lock);
670 static int dice_hwdep_unlock(struct dice *dice)
674 spin_lock_irq(&dice->lock);
676 if (dice->dev_lock_count == -1) {
677 dice->dev_lock_count = 0;
683 spin_unlock_irq(&dice->lock);
688 static int dice_hwdep_release(struct snd_hwdep *hwdep, struct file *file)
690 struct dice *dice = hwdep->private_data;
692 spin_lock_irq(&dice->lock);
693 if (dice->dev_lock_count == -1)
694 dice->dev_lock_count = 0;
695 spin_unlock_irq(&dice->lock);
700 static int dice_hwdep_ioctl(struct snd_hwdep *hwdep, struct file *file,
701 unsigned int cmd, unsigned long arg)
703 struct dice *dice = hwdep->private_data;
706 case SNDRV_FIREWIRE_IOCTL_GET_INFO:
707 return dice_hwdep_get_info(dice, (void __user *)arg);
708 case SNDRV_FIREWIRE_IOCTL_LOCK:
709 return dice_hwdep_lock(dice);
710 case SNDRV_FIREWIRE_IOCTL_UNLOCK:
711 return dice_hwdep_unlock(dice);
718 static int dice_hwdep_compat_ioctl(struct snd_hwdep *hwdep, struct file *file,
719 unsigned int cmd, unsigned long arg)
721 return dice_hwdep_ioctl(hwdep, file, cmd,
722 (unsigned long)compat_ptr(arg));
725 #define dice_hwdep_compat_ioctl NULL
728 static int dice_create_hwdep(struct dice *dice)
730 static const struct snd_hwdep_ops ops = {
731 .read = dice_hwdep_read,
732 .release = dice_hwdep_release,
733 .poll = dice_hwdep_poll,
734 .ioctl = dice_hwdep_ioctl,
735 .ioctl_compat = dice_hwdep_compat_ioctl,
737 struct snd_hwdep *hwdep;
740 err = snd_hwdep_new(dice->card, "DICE", 0, &hwdep);
743 strcpy(hwdep->name, "DICE");
744 hwdep->iface = SNDRV_HWDEP_IFACE_FW_DICE;
746 hwdep->private_data = dice;
747 hwdep->exclusive = true;
752 static void dice_card_free(struct snd_card *card)
754 struct dice *dice = card->private_data;
756 amdtp_out_stream_destroy(&dice->stream);
757 fw_core_remove_address_handler(&dice->notification_handler);
758 mutex_destroy(&dice->mutex);
761 #define DICE_CATEGORY_ID 0x04
763 static int dice_interface_check(struct fw_unit *unit)
765 static const int min_values[10] = {
772 struct fw_device *device = fw_parent_device(unit);
773 struct fw_csr_iterator it;
774 int key, value, vendor = -1, model = -1, err;
776 __be32 pointers[ARRAY_SIZE(min_values)];
780 * Check that GUID and unit directory are constructed according to DICE
781 * rules, i.e., that the specifier ID is the GUID's OUI, and that the
782 * GUID chip ID consists of the 8-bit DICE category ID, the 10-bit
783 * product ID, and a 22-bit serial number.
785 fw_csr_iterator_init(&it, unit->directory);
786 while (fw_csr_iterator_next(&it, &key, &value)) {
788 case CSR_SPECIFIER_ID:
796 if (device->config_rom[3] != ((vendor << 8) | DICE_CATEGORY_ID) ||
797 device->config_rom[4] >> 22 != model)
801 * Check that the sub address spaces exist and are located inside the
802 * private address space. The minimum values are chosen so that all
803 * minimally required registers are included.
805 err = snd_fw_transaction(unit, TCODE_READ_BLOCK_REQUEST,
807 pointers, sizeof(pointers), 0);
810 for (i = 0; i < ARRAY_SIZE(pointers); ++i) {
811 value = be32_to_cpu(pointers[i]);
812 if (value < min_values[i] || value >= 0x40000)
817 * Check that the implemented DICE driver specification major version
820 err = snd_fw_transaction(unit, TCODE_READ_QUADLET_REQUEST,
822 be32_to_cpu(pointers[0]) * 4 + GLOBAL_VERSION,
826 if ((version & cpu_to_be32(0xff000000)) != cpu_to_be32(0x01000000)) {
827 dev_err(&unit->device,
828 "unknown DICE version: 0x%08x\n", be32_to_cpu(version));
835 static int dice_init_offsets(struct dice *dice)
840 err = snd_fw_transaction(dice->unit, TCODE_READ_BLOCK_REQUEST,
842 pointers, sizeof(pointers), 0);
846 dice->global_offset = be32_to_cpu(pointers[0]) * 4;
847 dice->rx_offset = be32_to_cpu(pointers[4]) * 4;
852 static void dice_card_strings(struct dice *dice)
854 struct snd_card *card = dice->card;
855 struct fw_device *dev = fw_parent_device(dice->unit);
856 char vendor[32], model[32];
860 strcpy(card->driver, "DICE");
862 strcpy(card->shortname, "DICE");
863 BUILD_BUG_ON(NICK_NAME_SIZE < sizeof(card->shortname));
864 err = snd_fw_transaction(dice->unit, TCODE_READ_BLOCK_REQUEST,
865 global_address(dice, GLOBAL_NICK_NAME),
866 card->shortname, sizeof(card->shortname), 0);
868 /* DICE strings are returned in "always-wrong" endianness */
869 BUILD_BUG_ON(sizeof(card->shortname) % 4 != 0);
870 for (i = 0; i < sizeof(card->shortname); i += 4)
871 swab32s((u32 *)&card->shortname[i]);
872 card->shortname[sizeof(card->shortname) - 1] = '\0';
876 fw_csr_string(dev->config_rom + 5, CSR_VENDOR, vendor, sizeof(vendor));
878 fw_csr_string(dice->unit->directory, CSR_MODEL, model, sizeof(model));
879 snprintf(card->longname, sizeof(card->longname),
880 "%s %s (serial %u) at %s, S%d",
881 vendor, model, dev->config_rom[4] & 0x3fffff,
882 dev_name(&dice->unit->device), 100 << dev->max_speed);
884 strcpy(card->mixername, "DICE");
887 static int dice_probe(struct fw_unit *unit, const struct ieee1394_device_id *id)
889 struct snd_card *card;
894 err = dice_interface_check(unit);
898 err = snd_card_create(-1, NULL, THIS_MODULE, sizeof(*dice), &card);
901 snd_card_set_dev(card, &unit->device);
903 dice = card->private_data;
905 spin_lock_init(&dice->lock);
906 mutex_init(&dice->mutex);
908 init_waitqueue_head(&dice->hwdep_wait);
910 err = dice_init_offsets(dice);
914 dice->notification_handler.length = 4;
915 dice->notification_handler.address_callback = dice_notification;
916 dice->notification_handler.callback_data = dice;
917 err = fw_core_add_address_handler(&dice->notification_handler,
918 &fw_high_memory_region);
922 err = fw_iso_resources_init(&dice->resources, unit);
924 goto err_notification_handler;
925 dice->resources.channels_mask = 0x00000000ffffffffuLL;
927 err = amdtp_out_stream_init(&dice->stream, unit,
928 CIP_BLOCKING | CIP_HI_DUALWIRE);
932 err = dice_owner_set(dice);
936 card->private_free = dice_card_free;
938 dice_card_strings(dice);
940 err = snd_fw_transaction(unit, TCODE_READ_QUADLET_REQUEST,
941 global_address(dice, GLOBAL_CLOCK_SELECT),
945 clock_sel &= cpu_to_be32(~CLOCK_SOURCE_MASK);
946 clock_sel |= cpu_to_be32(CLOCK_SOURCE_ARX1);
947 err = snd_fw_transaction(unit, TCODE_WRITE_QUADLET_REQUEST,
948 global_address(dice, GLOBAL_CLOCK_SELECT),
953 err = dice_create_pcm(dice);
957 err = dice_create_hwdep(dice);
961 err = snd_card_register(card);
965 dev_set_drvdata(&unit->device, dice);
970 amdtp_out_stream_destroy(&dice->stream);
972 fw_iso_resources_destroy(&dice->resources);
973 err_notification_handler:
974 fw_core_remove_address_handler(&dice->notification_handler);
976 mutex_destroy(&dice->mutex);
982 static void dice_remove(struct fw_unit *unit)
984 struct dice *dice = dev_get_drvdata(&unit->device);
986 mutex_lock(&dice->mutex);
988 amdtp_out_stream_pcm_abort(&dice->stream);
990 snd_card_disconnect(dice->card);
992 dice_stream_stop(dice);
993 dice_owner_clear(dice);
995 mutex_unlock(&dice->mutex);
997 snd_card_free_when_closed(dice->card);
1000 static void dice_bus_reset(struct fw_unit *unit)
1002 struct dice *dice = dev_get_drvdata(&unit->device);
1004 mutex_lock(&dice->mutex);
1007 * On a bus reset, the DICE firmware disables streaming and then goes
1008 * off contemplating its own navel for hundreds of milliseconds before
1009 * it can react to any of our attempts to reenable streaming. This
1010 * means that we lose synchronization anyway, so we force our streams
1011 * to stop so that the application can restart them in an orderly
1014 amdtp_out_stream_pcm_abort(&dice->stream);
1016 dice->global_enabled = false;
1017 dice_stream_stop_packets(dice);
1019 dice_owner_update(dice);
1021 fw_iso_resources_update(&dice->resources);
1023 mutex_unlock(&dice->mutex);
1026 #define DICE_INTERFACE 0x000001
1028 static const struct ieee1394_device_id dice_id_table[] = {
1030 .match_flags = IEEE1394_MATCH_VERSION,
1031 .version = DICE_INTERFACE,
1035 MODULE_DEVICE_TABLE(ieee1394, dice_id_table);
1037 static struct fw_driver dice_driver = {
1039 .owner = THIS_MODULE,
1040 .name = KBUILD_MODNAME,
1041 .bus = &fw_bus_type,
1043 .probe = dice_probe,
1044 .update = dice_bus_reset,
1045 .remove = dice_remove,
1046 .id_table = dice_id_table,
1049 static int __init alsa_dice_init(void)
1051 return driver_register(&dice_driver.driver);
1054 static void __exit alsa_dice_exit(void)
1056 driver_unregister(&dice_driver.driver);
1059 module_init(alsa_dice_init);
1060 module_exit(alsa_dice_exit);