Pileus Git - ~andy/linux/blob - include/video/omapdss.h

   1 /*
   2  * Copyright (C) 2008 Nokia Corporation
   3  * Author: Tomi Valkeinen <tomi.valkeinen@nokia.com>
   4  *
   5  * This program is free software; you can redistribute it and/or modify it
   6  * under the terms of the GNU General Public License version 2 as published by
   7  * the Free Software Foundation.
   8  *
   9  * This program is distributed in the hope that it will be useful, but WITHOUT
  10  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  11  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
  12  * more details.
  13  *
  14  * You should have received a copy of the GNU General Public License along with
  15  * this program.  If not, see <http://www.gnu.org/licenses/>.
  16  */
  17
  18 #ifndef __OMAP_OMAPDSS_H
  19 #define __OMAP_OMAPDSS_H
  20
  21 #include <linux/list.h>
  22 #include <linux/kobject.h>
  23 #include <linux/device.h>
  24
  25 #define DISPC_IRQ_FRAMEDONE             (1 << 0)
  26 #define DISPC_IRQ_VSYNC                 (1 << 1)
  27 #define DISPC_IRQ_EVSYNC_EVEN           (1 << 2)
  28 #define DISPC_IRQ_EVSYNC_ODD            (1 << 3)
  29 #define DISPC_IRQ_ACBIAS_COUNT_STAT     (1 << 4)
  30 #define DISPC_IRQ_PROG_LINE_NUM         (1 << 5)
  31 #define DISPC_IRQ_GFX_FIFO_UNDERFLOW    (1 << 6)
  32 #define DISPC_IRQ_GFX_END_WIN           (1 << 7)
  33 #define DISPC_IRQ_PAL_GAMMA_MASK        (1 << 8)
  34 #define DISPC_IRQ_OCP_ERR               (1 << 9)
  35 #define DISPC_IRQ_VID1_FIFO_UNDERFLOW   (1 << 10)
  36 #define DISPC_IRQ_VID1_END_WIN          (1 << 11)
  37 #define DISPC_IRQ_VID2_FIFO_UNDERFLOW   (1 << 12)
  38 #define DISPC_IRQ_VID2_END_WIN          (1 << 13)
  39 #define DISPC_IRQ_SYNC_LOST             (1 << 14)
  40 #define DISPC_IRQ_SYNC_LOST_DIGIT       (1 << 15)
  41 #define DISPC_IRQ_WAKEUP                (1 << 16)
  42 #define DISPC_IRQ_SYNC_LOST2            (1 << 17)
  43 #define DISPC_IRQ_VSYNC2                (1 << 18)
  44 #define DISPC_IRQ_ACBIAS_COUNT_STAT2    (1 << 21)
  45 #define DISPC_IRQ_FRAMEDONE2            (1 << 22)
  46
  47 struct omap_dss_device;
  48 struct omap_overlay_manager;
  49
  50 enum omap_display_type {
  51         OMAP_DISPLAY_TYPE_NONE          = 0,
  52         OMAP_DISPLAY_TYPE_DPI           = 1 << 0,
  53         OMAP_DISPLAY_TYPE_DBI           = 1 << 1,
  54         OMAP_DISPLAY_TYPE_SDI           = 1 << 2,
  55         OMAP_DISPLAY_TYPE_DSI           = 1 << 3,
  56         OMAP_DISPLAY_TYPE_VENC          = 1 << 4,
  57         OMAP_DISPLAY_TYPE_HDMI          = 1 << 5,
  58 };
  59
  60 enum omap_plane {
  61         OMAP_DSS_GFX    = 0,
  62         OMAP_DSS_VIDEO1 = 1,
  63         OMAP_DSS_VIDEO2 = 2
  64 };
  65
  66 enum omap_channel {
  67         OMAP_DSS_CHANNEL_LCD    = 0,
  68         OMAP_DSS_CHANNEL_DIGIT  = 1,
  69         OMAP_DSS_CHANNEL_LCD2   = 2,
  70 };
  71
  72 enum omap_color_mode {
  73         OMAP_DSS_COLOR_CLUT1    = 1 << 0,  /* BITMAP 1 */
  74         OMAP_DSS_COLOR_CLUT2    = 1 << 1,  /* BITMAP 2 */
  75         OMAP_DSS_COLOR_CLUT4    = 1 << 2,  /* BITMAP 4 */
  76         OMAP_DSS_COLOR_CLUT8    = 1 << 3,  /* BITMAP 8 */
  77         OMAP_DSS_COLOR_RGB12U   = 1 << 4,  /* RGB12, 16-bit container */
  78         OMAP_DSS_COLOR_ARGB16   = 1 << 5,  /* ARGB16 */
  79         OMAP_DSS_COLOR_RGB16    = 1 << 6,  /* RGB16 */
  80         OMAP_DSS_COLOR_RGB24U   = 1 << 7,  /* RGB24, 32-bit container */
  81         OMAP_DSS_COLOR_RGB24P   = 1 << 8,  /* RGB24, 24-bit container */
  82         OMAP_DSS_COLOR_YUV2     = 1 << 9,  /* YUV2 4:2:2 co-sited */
  83         OMAP_DSS_COLOR_UYVY     = 1 << 10, /* UYVY 4:2:2 co-sited */
  84         OMAP_DSS_COLOR_ARGB32   = 1 << 11, /* ARGB32 */
  85         OMAP_DSS_COLOR_RGBA32   = 1 << 12, /* RGBA32 */
  86         OMAP_DSS_COLOR_RGBX32   = 1 << 13, /* RGBx32 */
  87         OMAP_DSS_COLOR_NV12             = 1 << 14, /* NV12 format: YUV 4:2:0 */
  88         OMAP_DSS_COLOR_RGBA16           = 1 << 15, /* RGBA16 - 4444 */
  89         OMAP_DSS_COLOR_RGBX16           = 1 << 16, /* RGBx16 - 4444 */
  90         OMAP_DSS_COLOR_ARGB16_1555      = 1 << 17, /* ARGB16 - 1555 */
  91         OMAP_DSS_COLOR_XRGB16_1555      = 1 << 18, /* xRGB16 - 1555 */
  92 };
  93
  94 enum omap_lcd_display_type {
  95         OMAP_DSS_LCD_DISPLAY_STN,
  96         OMAP_DSS_LCD_DISPLAY_TFT,
  97 };
  98
  99 enum omap_dss_load_mode {
 100         OMAP_DSS_LOAD_CLUT_AND_FRAME    = 0,
 101         OMAP_DSS_LOAD_CLUT_ONLY         = 1,
 102         OMAP_DSS_LOAD_FRAME_ONLY        = 2,
 103         OMAP_DSS_LOAD_CLUT_ONCE_FRAME   = 3,
 104 };
 105
 106 enum omap_dss_trans_key_type {
 107         OMAP_DSS_COLOR_KEY_GFX_DST = 0,
 108         OMAP_DSS_COLOR_KEY_VID_SRC = 1,
 109 };
 110
 111 enum omap_rfbi_te_mode {
 112         OMAP_DSS_RFBI_TE_MODE_1 = 1,
 113         OMAP_DSS_RFBI_TE_MODE_2 = 2,
 114 };
 115
 116 enum omap_panel_config {
 117         OMAP_DSS_LCD_IVS                = 1<<0,
 118         OMAP_DSS_LCD_IHS                = 1<<1,
 119         OMAP_DSS_LCD_IPC                = 1<<2,
 120         OMAP_DSS_LCD_IEO                = 1<<3,
 121         OMAP_DSS_LCD_RF                 = 1<<4,
 122         OMAP_DSS_LCD_ONOFF              = 1<<5,
 123
 124         OMAP_DSS_LCD_TFT                = 1<<20,
 125 };
 126
 127 enum omap_dss_venc_type {
 128         OMAP_DSS_VENC_TYPE_COMPOSITE,
 129         OMAP_DSS_VENC_TYPE_SVIDEO,
 130 };
 131
 132 enum omap_dss_dsi_mode {
 133         OMAP_DSS_DSI_CMD_MODE = 0,
 134         OMAP_DSS_DSI_VIDEO_MODE,
 135 };
 136
 137 enum omap_display_caps {
 138         OMAP_DSS_DISPLAY_CAP_MANUAL_UPDATE      = 1 << 0,
 139         OMAP_DSS_DISPLAY_CAP_TEAR_ELIM          = 1 << 1,
 140 };
 141
 142 enum omap_dss_display_state {
 143         OMAP_DSS_DISPLAY_DISABLED = 0,
 144         OMAP_DSS_DISPLAY_ACTIVE,
 145         OMAP_DSS_DISPLAY_SUSPENDED,
 146 };
 147
 148 /* XXX perhaps this should be removed */
 149 enum omap_dss_overlay_managers {
 150         OMAP_DSS_OVL_MGR_LCD,
 151         OMAP_DSS_OVL_MGR_TV,
 152         OMAP_DSS_OVL_MGR_LCD2,
 153 };
 154
 155 enum omap_dss_rotation_type {
 156         OMAP_DSS_ROT_DMA = 0,
 157         OMAP_DSS_ROT_VRFB = 1,
 158 };
 159
 160 /* clockwise rotation angle */
 161 enum omap_dss_rotation_angle {
 162         OMAP_DSS_ROT_0   = 0,
 163         OMAP_DSS_ROT_90  = 1,
 164         OMAP_DSS_ROT_180 = 2,
 165         OMAP_DSS_ROT_270 = 3,
 166 };
 167
 168 enum omap_overlay_caps {
 169         OMAP_DSS_OVL_CAP_SCALE = 1 << 0,
 170         OMAP_DSS_OVL_CAP_GLOBAL_ALPHA = 1 << 1,
 171         OMAP_DSS_OVL_CAP_PRE_MULT_ALPHA = 1 << 2,
 172 };
 173
 174 enum omap_overlay_manager_caps {
 175         OMAP_DSS_DUMMY_VALUE, /* add a dummy value to prevent compiler error */
 176 };
 177
 178 enum omap_dss_clk_source {
 179         OMAP_DSS_CLK_SRC_FCK = 0,               /* OMAP2/3: DSS1_ALWON_FCLK
 180                                                  * OMAP4: DSS_FCLK */
 181         OMAP_DSS_CLK_SRC_DSI_PLL_HSDIV_DISPC,   /* OMAP3: DSI1_PLL_FCLK
 182                                                  * OMAP4: PLL1_CLK1 */
 183         OMAP_DSS_CLK_SRC_DSI_PLL_HSDIV_DSI,     /* OMAP3: DSI2_PLL_FCLK
 184                                                  * OMAP4: PLL1_CLK2 */
 185         OMAP_DSS_CLK_SRC_DSI2_PLL_HSDIV_DISPC,  /* OMAP4: PLL2_CLK1 */
 186         OMAP_DSS_CLK_SRC_DSI2_PLL_HSDIV_DSI,    /* OMAP4: PLL2_CLK2 */
 187 };
 188
 189 /* RFBI */
 190
 191 struct rfbi_timings {
 192         int cs_on_time;
 193         int cs_off_time;
 194         int we_on_time;
 195         int we_off_time;
 196         int re_on_time;
 197         int re_off_time;
 198         int we_cycle_time;
 199         int re_cycle_time;
 200         int cs_pulse_width;
 201         int access_time;
 202
 203         int clk_div;
 204
 205         u32 tim[5];             /* set by rfbi_convert_timings() */
 206
 207         int converted;
 208 };
 209
 210 void omap_rfbi_write_command(const void *buf, u32 len);
 211 void omap_rfbi_read_data(void *buf, u32 len);
 212 void omap_rfbi_write_data(const void *buf, u32 len);
 213 void omap_rfbi_write_pixels(const void __iomem *buf, int scr_width,
 214                 u16 x, u16 y,
 215                 u16 w, u16 h);
 216 int omap_rfbi_enable_te(bool enable, unsigned line);
 217 int omap_rfbi_setup_te(enum omap_rfbi_te_mode mode,
 218                              unsigned hs_pulse_time, unsigned vs_pulse_time,
 219                              int hs_pol_inv, int vs_pol_inv, int extif_div);
 220 void rfbi_bus_lock(void);
 221 void rfbi_bus_unlock(void);
 222
 223 /* DSI */
 224 void dsi_bus_lock(struct omap_dss_device *dssdev);
 225 void dsi_bus_unlock(struct omap_dss_device *dssdev);
 226 int dsi_vc_dcs_write(struct omap_dss_device *dssdev, int channel, u8 *data,
 227                 int len);
 228 int dsi_vc_dcs_write_0(struct omap_dss_device *dssdev, int channel,
 229                 u8 dcs_cmd);
 230 int dsi_vc_dcs_write_1(struct omap_dss_device *dssdev, int channel, u8 dcs_cmd,
 231                 u8 param);
 232 int dsi_vc_dcs_write_nosync(struct omap_dss_device *dssdev, int channel,
 233                 u8 *data, int len);
 234 int dsi_vc_dcs_read(struct omap_dss_device *dssdev, int channel, u8 dcs_cmd,
 235                 u8 *buf, int buflen);
 236 int dsi_vc_dcs_read_1(struct omap_dss_device *dssdev, int channel, u8 dcs_cmd,
 237                 u8 *data);
 238 int dsi_vc_dcs_read_2(struct omap_dss_device *dssdev, int channel, u8 dcs_cmd,
 239                 u8 *data1, u8 *data2);
 240 int dsi_vc_set_max_rx_packet_size(struct omap_dss_device *dssdev, int channel,
 241                 u16 len);
 242 int dsi_vc_send_null(struct omap_dss_device *dssdev, int channel);
 243 int dsi_vc_send_bta_sync(struct omap_dss_device *dssdev, int channel);
 244
 245 /* Board specific data */
 246 struct omap_dss_board_info {
 247         int (*get_context_loss_count)(struct device *dev);
 248         int num_devices;
 249         struct omap_dss_device **devices;
 250         struct omap_dss_device *default_device;
 251         int (*dsi_enable_pads)(int dsi_id, unsigned lane_mask);
 252         void (*dsi_disable_pads)(int dsi_id, unsigned lane_mask);
 253 };
 254
 255 #if defined(CONFIG_OMAP2_DSS_MODULE) || defined(CONFIG_OMAP2_DSS)
 256 /* Init with the board info */
 257 extern int omap_display_init(struct omap_dss_board_info *board_data);
 258 #else
 259 static inline int omap_display_init(struct omap_dss_board_info *board_data)
 260 {
 261         return 0;
 262 }
 263 #endif
 264
 265 struct omap_display_platform_data {
 266         struct omap_dss_board_info *board_data;
 267         /* TODO: Additional members to be added when PM is considered */
 268 };
 269
 270 struct omap_video_timings {
 271         /* Unit: pixels */
 272         u16 x_res;
 273         /* Unit: pixels */
 274         u16 y_res;
 275         /* Unit: KHz */
 276         u32 pixel_clock;
 277         /* Unit: pixel clocks */
 278         u16 hsw;        /* Horizontal synchronization pulse width */
 279         /* Unit: pixel clocks */
 280         u16 hfp;        /* Horizontal front porch */
 281         /* Unit: pixel clocks */
 282         u16 hbp;        /* Horizontal back porch */
 283         /* Unit: line clocks */
 284         u16 vsw;        /* Vertical synchronization pulse width */
 285         /* Unit: line clocks */
 286         u16 vfp;        /* Vertical front porch */
 287         /* Unit: line clocks */
 288         u16 vbp;        /* Vertical back porch */
 289 };
 290
 291 #ifdef CONFIG_OMAP2_DSS_VENC
 292 /* Hardcoded timings for tv modes. Venc only uses these to
 293  * identify the mode, and does not actually use the configs
 294  * itself. However, the configs should be something that
 295  * a normal monitor can also show */
 296 extern const struct omap_video_timings omap_dss_pal_timings;
 297 extern const struct omap_video_timings omap_dss_ntsc_timings;
 298 #endif
 299
 300 struct omap_dss_cpr_coefs {
 301         s16 rr, rg, rb;
 302         s16 gr, gg, gb;
 303         s16 br, bg, bb;
 304 };
 305
 306 struct omap_overlay_info {
 307         bool enabled;
 308
 309         u32 paddr;
 310         void __iomem *vaddr;
 311         u32 p_uv_addr;  /* for NV12 format */
 312         u16 screen_width;
 313         u16 width;
 314         u16 height;
 315         enum omap_color_mode color_mode;
 316         u8 rotation;
 317         enum omap_dss_rotation_type rotation_type;
 318         bool mirror;
 319
 320         u16 pos_x;
 321         u16 pos_y;
 322         u16 out_width;  /* if 0, out_width == width */
 323         u16 out_height; /* if 0, out_height == height */
 324         u8 global_alpha;
 325         u8 pre_mult_alpha;
 326 };
 327
 328 struct omap_overlay {
 329         struct kobject kobj;
 330         struct list_head list;
 331
 332         /* static fields */
 333         const char *name;
 334         enum omap_plane id;
 335         enum omap_color_mode supported_modes;
 336         enum omap_overlay_caps caps;
 337
 338         /* dynamic fields */
 339         struct omap_overlay_manager *manager;
 340         struct omap_overlay_info info;
 341
 342         bool manager_changed;
 343         /* if true, info has been changed, but not applied() yet */
 344         bool info_dirty;
 345
 346         int (*set_manager)(struct omap_overlay *ovl,
 347                 struct omap_overlay_manager *mgr);
 348         int (*unset_manager)(struct omap_overlay *ovl);
 349
 350         int (*set_overlay_info)(struct omap_overlay *ovl,
 351                         struct omap_overlay_info *info);
 352         void (*get_overlay_info)(struct omap_overlay *ovl,
 353                         struct omap_overlay_info *info);
 354
 355         int (*wait_for_go)(struct omap_overlay *ovl);
 356 };
 357
 358 struct omap_overlay_manager_info {
 359         u32 default_color;
 360
 361         enum omap_dss_trans_key_type trans_key_type;
 362         u32 trans_key;
 363         bool trans_enabled;
 364
 365         bool alpha_enabled;
 366
 367         bool cpr_enable;
 368         struct omap_dss_cpr_coefs cpr_coefs;
 369 };
 370
 371 struct omap_overlay_manager {
 372         struct kobject kobj;
 373         struct list_head list;
 374
 375         /* static fields */
 376         const char *name;
 377         enum omap_channel id;
 378         enum omap_overlay_manager_caps caps;
 379         int num_overlays;
 380         struct omap_overlay **overlays;
 381         enum omap_display_type supported_displays;
 382
 383         /* dynamic fields */
 384         struct omap_dss_device *device;
 385         struct omap_overlay_manager_info info;
 386
 387         bool device_changed;
 388         /* if true, info has been changed but not applied() yet */
 389         bool info_dirty;
 390
 391         int (*set_device)(struct omap_overlay_manager *mgr,
 392                 struct omap_dss_device *dssdev);
 393         int (*unset_device)(struct omap_overlay_manager *mgr);
 394
 395         int (*set_manager_info)(struct omap_overlay_manager *mgr,
 396                         struct omap_overlay_manager_info *info);
 397         void (*get_manager_info)(struct omap_overlay_manager *mgr,
 398                         struct omap_overlay_manager_info *info);
 399
 400         int (*apply)(struct omap_overlay_manager *mgr);
 401         int (*wait_for_go)(struct omap_overlay_manager *mgr);
 402         int (*wait_for_vsync)(struct omap_overlay_manager *mgr);
 403
 404         int (*enable)(struct omap_overlay_manager *mgr);
 405         int (*disable)(struct omap_overlay_manager *mgr);
 406 };
 407
 408 struct omap_dss_device {
 409         struct device dev;
 410
 411         enum omap_display_type type;
 412
 413         enum omap_channel channel;
 414
 415         union {
 416                 struct {
 417                         u8 data_lines;
 418                 } dpi;
 419
 420                 struct {
 421                         u8 channel;
 422                         u8 data_lines;
 423                 } rfbi;
 424
 425                 struct {
 426                         u8 datapairs;
 427                 } sdi;
 428
 429                 struct {
 430                         u8 clk_lane;
 431                         u8 clk_pol;
 432                         u8 data1_lane;
 433                         u8 data1_pol;
 434                         u8 data2_lane;
 435                         u8 data2_pol;
 436                         u8 data3_lane;
 437                         u8 data3_pol;
 438                         u8 data4_lane;
 439                         u8 data4_pol;
 440
 441                         int module;
 442
 443                         bool ext_te;
 444                         u8 ext_te_gpio;
 445                 } dsi;
 446
 447                 struct {
 448                         enum omap_dss_venc_type type;
 449                         bool invert_polarity;
 450                 } venc;
 451         } phy;
 452
 453         struct {
 454                 struct {
 455                         struct {
 456                                 u16 lck_div;
 457                                 u16 pck_div;
 458                                 enum omap_dss_clk_source lcd_clk_src;
 459                         } channel;
 460
 461                         enum omap_dss_clk_source dispc_fclk_src;
 462                 } dispc;
 463
 464                 struct {
 465                         u16 regn;
 466                         u16 regm;
 467                         u16 regm_dispc;
 468                         u16 regm_dsi;
 469
 470                         u16 lp_clk_div;
 471                         enum omap_dss_clk_source dsi_fclk_src;
 472                 } dsi;
 473
 474                 struct {
 475                         u16 regn;
 476                         u16 regm2;
 477                 } hdmi;
 478         } clocks;
 479
 480         struct {
 481                 struct omap_video_timings timings;
 482
 483                 int acbi;       /* ac-bias pin transitions per interrupt */
 484                 /* Unit: line clocks */
 485                 int acb;        /* ac-bias pin frequency */
 486
 487                 enum omap_panel_config config;
 488
 489                 enum omap_dss_dsi_mode dsi_mode;
 490         } panel;
 491
 492         struct {
 493                 u8 pixel_size;
 494                 struct rfbi_timings rfbi_timings;
 495         } ctrl;
 496
 497         int reset_gpio;
 498
 499         int max_backlight_level;
 500
 501         const char *name;
 502
 503         /* used to match device to driver */
 504         const char *driver_name;
 505
 506         void *data;
 507
 508         struct omap_dss_driver *driver;
 509
 510         /* helper variable for driver suspend/resume */
 511         bool activate_after_resume;
 512
 513         enum omap_display_caps caps;
 514
 515         struct omap_overlay_manager *manager;
 516
 517         enum omap_dss_display_state state;
 518
 519         /* platform specific  */
 520         int (*platform_enable)(struct omap_dss_device *dssdev);
 521         void (*platform_disable)(struct omap_dss_device *dssdev);
 522         int (*set_backlight)(struct omap_dss_device *dssdev, int level);
 523         int (*get_backlight)(struct omap_dss_device *dssdev);
 524 };
 525
 526 struct omap_dss_driver {
 527         struct device_driver driver;
 528
 529         int (*probe)(struct omap_dss_device *);
 530         void (*remove)(struct omap_dss_device *);
 531
 532         int (*enable)(struct omap_dss_device *display);
 533         void (*disable)(struct omap_dss_device *display);
 534         int (*suspend)(struct omap_dss_device *display);
 535         int (*resume)(struct omap_dss_device *display);
 536         int (*run_test)(struct omap_dss_device *display, int test);
 537
 538         int (*update)(struct omap_dss_device *dssdev,
 539                                u16 x, u16 y, u16 w, u16 h);
 540         int (*sync)(struct omap_dss_device *dssdev);
 541
 542         int (*enable_te)(struct omap_dss_device *dssdev, bool enable);
 543         int (*get_te)(struct omap_dss_device *dssdev);
 544
 545         u8 (*get_rotate)(struct omap_dss_device *dssdev);
 546         int (*set_rotate)(struct omap_dss_device *dssdev, u8 rotate);
 547
 548         bool (*get_mirror)(struct omap_dss_device *dssdev);
 549         int (*set_mirror)(struct omap_dss_device *dssdev, bool enable);
 550
 551         int (*memory_read)(struct omap_dss_device *dssdev,
 552                         void *buf, size_t size,
 553                         u16 x, u16 y, u16 w, u16 h);
 554
 555         void (*get_resolution)(struct omap_dss_device *dssdev,
 556                         u16 *xres, u16 *yres);
 557         void (*get_dimensions)(struct omap_dss_device *dssdev,
 558                         u32 *width, u32 *height);
 559         int (*get_recommended_bpp)(struct omap_dss_device *dssdev);
 560
 561         int (*check_timings)(struct omap_dss_device *dssdev,
 562                         struct omap_video_timings *timings);
 563         void (*set_timings)(struct omap_dss_device *dssdev,
 564                         struct omap_video_timings *timings);
 565         void (*get_timings)(struct omap_dss_device *dssdev,
 566                         struct omap_video_timings *timings);
 567
 568         int (*set_wss)(struct omap_dss_device *dssdev, u32 wss);
 569         u32 (*get_wss)(struct omap_dss_device *dssdev);
 570 };
 571
 572 int omap_dss_register_driver(struct omap_dss_driver *);
 573 void omap_dss_unregister_driver(struct omap_dss_driver *);
 574
 575 void omap_dss_get_device(struct omap_dss_device *dssdev);
 576 void omap_dss_put_device(struct omap_dss_device *dssdev);
 577 #define for_each_dss_dev(d) while ((d = omap_dss_get_next_device(d)) != NULL)
 578 struct omap_dss_device *omap_dss_get_next_device(struct omap_dss_device *from);
 579 struct omap_dss_device *omap_dss_find_device(void *data,
 580                 int (*match)(struct omap_dss_device *dssdev, void *data));
 581
 582 int omap_dss_start_device(struct omap_dss_device *dssdev);
 583 void omap_dss_stop_device(struct omap_dss_device *dssdev);
 584
 585 int omap_dss_get_num_overlay_managers(void);
 586 struct omap_overlay_manager *omap_dss_get_overlay_manager(int num);
 587
 588 int omap_dss_get_num_overlays(void);
 589 struct omap_overlay *omap_dss_get_overlay(int num);
 590
 591 void omapdss_default_get_resolution(struct omap_dss_device *dssdev,
 592                 u16 *xres, u16 *yres);
 593 int omapdss_default_get_recommended_bpp(struct omap_dss_device *dssdev);
 594
 595 typedef void (*omap_dispc_isr_t) (void *arg, u32 mask);
 596 int omap_dispc_register_isr(omap_dispc_isr_t isr, void *arg, u32 mask);
 597 int omap_dispc_unregister_isr(omap_dispc_isr_t isr, void *arg, u32 mask);
 598
 599 int omap_dispc_wait_for_irq_timeout(u32 irqmask, unsigned long timeout);
 600 int omap_dispc_wait_for_irq_interruptible_timeout(u32 irqmask,
 601                 unsigned long timeout);
 602
 603 #define to_dss_driver(x) container_of((x), struct omap_dss_driver, driver)
 604 #define to_dss_device(x) container_of((x), struct omap_dss_device, dev)
 605
 606 void omapdss_dsi_vc_enable_hs(struct omap_dss_device *dssdev, int channel,
 607                 bool enable);
 608 int omapdss_dsi_enable_te(struct omap_dss_device *dssdev, bool enable);
 609
 610 int omap_dsi_prepare_update(struct omap_dss_device *dssdev,
 611                                     u16 *x, u16 *y, u16 *w, u16 *h,
 612                                     bool enlarge_update_area);
 613 int omap_dsi_update(struct omap_dss_device *dssdev,
 614                 int channel,
 615                 u16 x, u16 y, u16 w, u16 h,
 616                 void (*callback)(int, void *), void *data);
 617 int omap_dsi_request_vc(struct omap_dss_device *dssdev, int *channel);
 618 int omap_dsi_set_vc_id(struct omap_dss_device *dssdev, int channel, int vc_id);
 619 void omap_dsi_release_vc(struct omap_dss_device *dssdev, int channel);
 620
 621 int omapdss_dsi_display_enable(struct omap_dss_device *dssdev);
 622 void omapdss_dsi_display_disable(struct omap_dss_device *dssdev,
 623                 bool disconnect_lanes, bool enter_ulps);
 624
 625 int omapdss_dpi_display_enable(struct omap_dss_device *dssdev);
 626 void omapdss_dpi_display_disable(struct omap_dss_device *dssdev);
 627 void dpi_set_timings(struct omap_dss_device *dssdev,
 628                         struct omap_video_timings *timings);
 629 int dpi_check_timings(struct omap_dss_device *dssdev,
 630                         struct omap_video_timings *timings);
 631
 632 int omapdss_sdi_display_enable(struct omap_dss_device *dssdev);
 633 void omapdss_sdi_display_disable(struct omap_dss_device *dssdev);
 634
 635 int omapdss_rfbi_display_enable(struct omap_dss_device *dssdev);
 636 void omapdss_rfbi_display_disable(struct omap_dss_device *dssdev);
 637 int omap_rfbi_prepare_update(struct omap_dss_device *dssdev,
 638                 u16 *x, u16 *y, u16 *w, u16 *h);
 639 int omap_rfbi_update(struct omap_dss_device *dssdev,
 640                 u16 x, u16 y, u16 w, u16 h,
 641                 void (*callback)(void *), void *data);
 642 int omap_rfbi_configure(struct omap_dss_device *dssdev, int pixel_size,
 643                 int data_lines);
 644
 645 #endif