2 * SuperH Pin Function Controller Support
4 * Copyright (c) 2008 Magnus Damm
6 * This file is subject to the terms and conditions of the GNU General Public
7 * License. See the file "COPYING" in the main directory of this archive
14 #include <asm-generic/gpio.h>
16 typedef unsigned short pinmux_enum_t;
17 typedef unsigned short pinmux_flag_t;
19 #define PINMUX_TYPE_NONE 0
20 #define PINMUX_TYPE_FUNCTION 1
21 #define PINMUX_TYPE_GPIO 2
22 #define PINMUX_TYPE_OUTPUT 3
23 #define PINMUX_TYPE_INPUT 4
24 #define PINMUX_TYPE_INPUT_PULLUP 5
25 #define PINMUX_TYPE_INPUT_PULLDOWN 6
27 #define PINMUX_FLAG_TYPE (0x7)
28 #define PINMUX_FLAG_WANT_PULLUP (1 << 3)
29 #define PINMUX_FLAG_WANT_PULLDOWN (1 << 4)
31 #define PINMUX_FLAG_DBIT_SHIFT 5
32 #define PINMUX_FLAG_DBIT (0x1f << PINMUX_FLAG_DBIT_SHIFT)
33 #define PINMUX_FLAG_DREG_SHIFT 10
34 #define PINMUX_FLAG_DREG (0x3f << PINMUX_FLAG_DREG_SHIFT)
37 pinmux_enum_t enum_id;
41 #define PINMUX_GPIO(gpio, data_or_mark) [gpio] = { data_or_mark }
42 #define PINMUX_DATA(data_or_mark, ids...) data_or_mark, ids, 0
44 struct pinmux_cfg_reg {
45 unsigned long reg, reg_width, field_width;
47 pinmux_enum_t *enum_ids;
50 #define PINMUX_CFG_REG(name, r, r_width, f_width) \
51 .reg = r, .reg_width = r_width, .field_width = f_width, \
52 .cnt = (unsigned long [r_width / f_width]) {}, \
53 .enum_ids = (pinmux_enum_t [(r_width / f_width) * (1 << f_width)]) \
55 struct pinmux_data_reg {
56 unsigned long reg, reg_width, reg_shadow;
57 pinmux_enum_t *enum_ids;
58 void __iomem *mapped_reg;
61 #define PINMUX_DATA_REG(name, r, r_width) \
62 .reg = r, .reg_width = r_width, \
63 .enum_ids = (pinmux_enum_t [r_width]) \
67 pinmux_enum_t *enum_ids;
70 #define PINMUX_IRQ(irq_nr, ids...) \
71 { .irq = irq_nr, .enum_ids = (pinmux_enum_t []) { ids, 0 } } \
87 pinmux_enum_t reserved_id;
88 struct pinmux_range data;
89 struct pinmux_range input;
90 struct pinmux_range input_pd;
91 struct pinmux_range input_pu;
92 struct pinmux_range output;
93 struct pinmux_range mark;
94 struct pinmux_range function;
96 unsigned first_gpio, last_gpio;
98 struct pinmux_gpio *gpios;
99 struct pinmux_cfg_reg *cfg_regs;
100 struct pinmux_data_reg *data_regs;
102 pinmux_enum_t *gpio_data;
103 unsigned int gpio_data_size;
105 struct pinmux_irq *gpio_irq;
106 unsigned int gpio_irq_size;
108 struct resource *resource;
109 unsigned int num_resources;
110 struct pfc_window *window;
112 struct gpio_chip chip;
115 int register_pinmux(struct pinmux_info *pip);
116 int unregister_pinmux(struct pinmux_info *pip);
118 /* helper macro for port */
119 #define PORT_1(fn, pfx, sfx) fn(pfx, sfx)
121 #define PORT_10(fn, pfx, sfx) \
122 PORT_1(fn, pfx##0, sfx), PORT_1(fn, pfx##1, sfx), \
123 PORT_1(fn, pfx##2, sfx), PORT_1(fn, pfx##3, sfx), \
124 PORT_1(fn, pfx##4, sfx), PORT_1(fn, pfx##5, sfx), \
125 PORT_1(fn, pfx##6, sfx), PORT_1(fn, pfx##7, sfx), \
126 PORT_1(fn, pfx##8, sfx), PORT_1(fn, pfx##9, sfx)
128 #define PORT_90(fn, pfx, sfx) \
129 PORT_10(fn, pfx##1, sfx), PORT_10(fn, pfx##2, sfx), \
130 PORT_10(fn, pfx##3, sfx), PORT_10(fn, pfx##4, sfx), \
131 PORT_10(fn, pfx##5, sfx), PORT_10(fn, pfx##6, sfx), \
132 PORT_10(fn, pfx##7, sfx), PORT_10(fn, pfx##8, sfx), \
133 PORT_10(fn, pfx##9, sfx)
135 #define _PORT_ALL(pfx, sfx) pfx##_##sfx
136 #define _GPIO_PORT(pfx, sfx) PINMUX_GPIO(GPIO_PORT##pfx, PORT##pfx##_DATA)
137 #define PORT_ALL(str) CPU_ALL_PORT(_PORT_ALL, PORT, str)
138 #define GPIO_PORT_ALL() CPU_ALL_PORT(_GPIO_PORT, , unused)
139 #define GPIO_FN(str) PINMUX_GPIO(GPIO_FN_##str, str##_MARK)
141 /* helper macro for pinmux_enum_t */
142 #define PORT_DATA_I(nr) \
143 PINMUX_DATA(PORT##nr##_DATA, PORT##nr##_FN0, PORT##nr##_IN)
145 #define PORT_DATA_I_PD(nr) \
146 PINMUX_DATA(PORT##nr##_DATA, PORT##nr##_FN0, \
147 PORT##nr##_IN, PORT##nr##_IN_PD)
149 #define PORT_DATA_I_PU(nr) \
150 PINMUX_DATA(PORT##nr##_DATA, PORT##nr##_FN0, \
151 PORT##nr##_IN, PORT##nr##_IN_PU)
153 #define PORT_DATA_I_PU_PD(nr) \
154 PINMUX_DATA(PORT##nr##_DATA, PORT##nr##_FN0, \
155 PORT##nr##_IN, PORT##nr##_IN_PD, PORT##nr##_IN_PU)
157 #define PORT_DATA_O(nr) \
158 PINMUX_DATA(PORT##nr##_DATA, PORT##nr##_FN0, PORT##nr##_OUT)
160 #define PORT_DATA_IO(nr) \
161 PINMUX_DATA(PORT##nr##_DATA, PORT##nr##_FN0, PORT##nr##_OUT, \
164 #define PORT_DATA_IO_PD(nr) \
165 PINMUX_DATA(PORT##nr##_DATA, PORT##nr##_FN0, PORT##nr##_OUT, \
166 PORT##nr##_IN, PORT##nr##_IN_PD)
168 #define PORT_DATA_IO_PU(nr) \
169 PINMUX_DATA(PORT##nr##_DATA, PORT##nr##_FN0, PORT##nr##_OUT, \
170 PORT##nr##_IN, PORT##nr##_IN_PU)
172 #define PORT_DATA_IO_PU_PD(nr) \
173 PINMUX_DATA(PORT##nr##_DATA, PORT##nr##_FN0, PORT##nr##_OUT, \
174 PORT##nr##_IN, PORT##nr##_IN_PD, PORT##nr##_IN_PU)
176 /* helper macro for top 4 bits in PORTnCR */
177 #define _PCRH(in, in_pd, in_pu, out) \
183 #define PORTCR(nr, reg) \
185 PINMUX_CFG_REG("PORT" nr "CR", reg, 8, 4) { \
186 _PCRH(PORT##nr##_IN, PORT##nr##_IN_PD, \
187 PORT##nr##_IN_PU, PORT##nr##_OUT), \
188 PORT##nr##_FN0, PORT##nr##_FN1, \
189 PORT##nr##_FN2, PORT##nr##_FN3, \
190 PORT##nr##_FN4, PORT##nr##_FN5, \
191 PORT##nr##_FN6, PORT##nr##_FN7 } \
194 #endif /* __SH_PFC_H */