1 #ifndef __LINUX_REGMAP_H
2 #define __LINUX_REGMAP_H
5 * Register map access API
7 * Copyright 2011 Wolfson Microelectronics plc
9 * Author: Mark Brown <broonie@opensource.wolfsonmicro.com>
11 * This program is free software; you can redistribute it and/or modify
12 * it under the terms of the GNU General Public License version 2 as
13 * published by the Free Software Foundation.
16 #include <linux/device.h>
17 #include <linux/list.h>
23 /* An enum of all the supported cache types */
31 * Default value for a register. We use an array of structs rather
32 * than a simple array as many modern devices have very sparse
35 * @reg: Register address.
36 * @def: Register default value.
44 * Configuration for the register map of a device.
46 * @reg_bits: Number of bits in a register address, mandatory.
47 * @val_bits: Number of bits in a register value, mandatory.
49 * @writeable_reg: Optional callback returning true if the register
51 * @readable_reg: Optional callback returning true if the register
53 * @volatile_reg: Optional callback returning true if the register
54 * value can't be cached.
55 * @precious_reg: Optional callback returning true if the rgister
56 * should not be read outside of a call from the driver
57 * (eg, a clear on read interrupt status register).
59 * @max_register: Optional, specifies the maximum valid register index.
60 * @reg_defaults: Power on reset values for registers (for use with
61 * register cache support).
62 * @num_reg_defaults: Number of elements in reg_defaults.
64 * @read_flag_mask: Mask to be set in the top byte of the register when doing
66 * @write_flag_mask: Mask to be set in the top byte of the register when doing
67 * a write. If both read_flag_mask and write_flag_mask are
68 * empty the regmap_bus default masks are used.
70 * @cache_type: The actual cache type.
71 * @reg_defaults_raw: Power on reset values for registers (for use with
72 * register cache support).
73 * @num_reg_defaults_raw: Number of elements in reg_defaults_raw.
75 struct regmap_config {
79 bool (*writeable_reg)(struct device *dev, unsigned int reg);
80 bool (*readable_reg)(struct device *dev, unsigned int reg);
81 bool (*volatile_reg)(struct device *dev, unsigned int reg);
82 bool (*precious_reg)(struct device *dev, unsigned int reg);
84 unsigned int max_register;
85 const struct reg_default *reg_defaults;
86 unsigned int num_reg_defaults;
87 enum regcache_type cache_type;
88 const void *reg_defaults_raw;
89 unsigned int num_reg_defaults_raw;
95 typedef int (*regmap_hw_write)(struct device *dev, const void *data,
97 typedef int (*regmap_hw_gather_write)(struct device *dev,
98 const void *reg, size_t reg_len,
99 const void *val, size_t val_len);
100 typedef int (*regmap_hw_read)(struct device *dev,
101 const void *reg_buf, size_t reg_size,
102 void *val_buf, size_t val_size);
105 * Description of a hardware bus for the register map infrastructure.
107 * @write: Write operation.
108 * @gather_write: Write operation with split register/value, return -ENOTSUPP
109 * if not implemented on a given device.
110 * @read: Read operation. Data is returned in the buffer used to transmit
112 * @read_flag_mask: Mask to be set in the top byte of the register when doing
116 regmap_hw_write write;
117 regmap_hw_gather_write gather_write;
122 struct regmap *regmap_init(struct device *dev,
123 const struct regmap_bus *bus,
124 const struct regmap_config *config);
125 struct regmap *regmap_init_i2c(struct i2c_client *i2c,
126 const struct regmap_config *config);
127 struct regmap *regmap_init_spi(struct spi_device *dev,
128 const struct regmap_config *config);
130 void regmap_exit(struct regmap *map);
131 int regmap_write(struct regmap *map, unsigned int reg, unsigned int val);
132 int regmap_raw_write(struct regmap *map, unsigned int reg,
133 const void *val, size_t val_len);
134 int regmap_read(struct regmap *map, unsigned int reg, unsigned int *val);
135 int regmap_raw_read(struct regmap *map, unsigned int reg,
136 void *val, size_t val_len);
137 int regmap_bulk_read(struct regmap *map, unsigned int reg, void *val,
139 int regmap_update_bits(struct regmap *map, unsigned int reg,
140 unsigned int mask, unsigned int val);
141 int regmap_update_bits_check(struct regmap *map, unsigned int reg,
142 unsigned int mask, unsigned int val,
145 int regcache_sync(struct regmap *map);
146 void regcache_cache_only(struct regmap *map, bool enable);
147 void regcache_cache_bypass(struct regmap *map, bool enable);
148 void regcache_mark_dirty(struct regmap *map);
151 * Description of an IRQ for the generic regmap irq_chip.
153 * @reg_offset: Offset of the status/mask register within the bank
154 * @mask: Mask used to flag/control the register.
157 unsigned int reg_offset;
162 * Description of a generic regmap irq_chip. This is not intended to
163 * handle every possible interrupt controller, but it should handle a
164 * substantial proportion of those that are found in the wild.
166 * @name: Descriptive name for IRQ controller.
168 * @status_base: Base status register address.
169 * @mask_base: Base mask register address.
170 * @ack_base: Base ack address. If zero then the chip is clear on read.
172 * @num_regs: Number of registers in each control bank.
173 * @irqs: Descriptors for individual IRQs. Interrupt numbers are
174 * assigned based on the index in the array of the interrupt.
175 * @num_irqs: Number of descriptors.
177 struct regmap_irq_chip {
180 unsigned int status_base;
181 unsigned int mask_base;
182 unsigned int ack_base;
186 const struct regmap_irq *irqs;
190 struct regmap_irq_chip_data;
192 int regmap_add_irq_chip(struct regmap *map, int irq, int irq_flags,
193 int irq_base, struct regmap_irq_chip *chip,
194 struct regmap_irq_chip_data **data);
195 void regmap_del_irq_chip(int irq, struct regmap_irq_chip_data *data);