1 #ifndef __ASM_PARAVIRT_H
2 #define __ASM_PARAVIRT_H
3 /* Various instructions on x86 need to be replaced for
4 * para-virtualization: those hooks are defined here. */
10 /* Bitmask of what can be clobbered: usually at least eax. */
12 #define CLBR_EAX (1 << 0)
13 #define CLBR_ECX (1 << 1)
14 #define CLBR_EDX (1 << 2)
17 #define CLBR_RSI (1 << 3)
18 #define CLBR_RDI (1 << 4)
19 #define CLBR_R8 (1 << 5)
20 #define CLBR_R9 (1 << 6)
21 #define CLBR_R10 (1 << 7)
22 #define CLBR_R11 (1 << 8)
23 #define CLBR_ANY ((1 << 9) - 1)
24 #include <asm/desc_defs.h>
26 /* CLBR_ANY should match all regs platform has. For i386, that's just it */
27 #define CLBR_ANY ((1 << 3) - 1)
31 #include <linux/types.h>
32 #include <linux/cpumask.h>
33 #include <asm/kmap_types.h>
34 #include <asm/desc_defs.h>
45 unsigned int kernel_rpl;
46 int shared_kernel_pmd;
53 * Patch may replace one of the defined code sequences with
54 * arbitrary code, subject to the same register constraints.
55 * This generally means the code is not free to clobber any
56 * registers other than EAX. The patch function should return
57 * the number of bytes of code generated, as we nop pad the
58 * rest in generic code.
60 unsigned (*patch)(u8 type, u16 clobber, void *insnbuf,
61 unsigned long addr, unsigned len);
63 /* Basic arch-specific setup */
64 void (*arch_setup)(void);
65 char *(*memory_setup)(void);
66 void (*post_allocator_init)(void);
68 /* Print a banner to identify the environment */
74 /* Set deferred update mode, used for batching operations. */
80 void (*time_init)(void);
82 /* Set and set time of day */
83 unsigned long (*get_wallclock)(void);
84 int (*set_wallclock)(unsigned long);
86 unsigned long long (*sched_clock)(void);
87 unsigned long (*get_cpu_khz)(void);
91 /* hooks for various privileged instructions */
92 unsigned long (*get_debugreg)(int regno);
93 void (*set_debugreg)(int regno, unsigned long value);
97 unsigned long (*read_cr0)(void);
98 void (*write_cr0)(unsigned long);
100 unsigned long (*read_cr4_safe)(void);
101 unsigned long (*read_cr4)(void);
102 void (*write_cr4)(unsigned long);
105 unsigned long (*read_cr8)(void);
106 void (*write_cr8)(unsigned long);
109 /* Segment descriptor handling */
110 void (*load_tr_desc)(void);
111 void (*load_gdt)(const struct desc_ptr *);
112 void (*load_idt)(const struct desc_ptr *);
113 void (*store_gdt)(struct desc_ptr *);
114 void (*store_idt)(struct desc_ptr *);
115 void (*set_ldt)(const void *desc, unsigned entries);
116 unsigned long (*store_tr)(void);
117 void (*load_tls)(struct thread_struct *t, unsigned int cpu);
118 void (*write_ldt_entry)(struct desc_struct *ldt, int entrynum,
120 void (*write_gdt_entry)(struct desc_struct *,
121 int entrynum, const void *desc, int size);
122 void (*write_idt_entry)(gate_desc *,
123 int entrynum, const gate_desc *gate);
124 void (*load_sp0)(struct tss_struct *tss, struct thread_struct *t);
126 void (*set_iopl_mask)(unsigned mask);
128 void (*wbinvd)(void);
129 void (*io_delay)(void);
131 /* cpuid emulation, mostly so that caps bits can be disabled */
132 void (*cpuid)(unsigned int *eax, unsigned int *ebx,
133 unsigned int *ecx, unsigned int *edx);
135 /* MSR, PMC and TSR operations.
136 err = 0/-EFAULT. wrmsr returns 0/-EFAULT. */
137 u64 (*read_msr)(unsigned int msr, int *err);
138 int (*write_msr)(unsigned int msr, unsigned low, unsigned high);
140 u64 (*read_tsc)(void);
141 u64 (*read_pmc)(int counter);
142 unsigned long long (*read_tscp)(unsigned int *aux);
144 /* These two are jmp to, not actually called. */
145 void (*irq_enable_syscall_ret)(void);
148 void (*swapgs)(void);
150 struct pv_lazy_ops lazy_mode;
154 void (*init_IRQ)(void);
157 * Get/set interrupt state. save_fl and restore_fl are only
158 * expected to use X86_EFLAGS_IF; all other bits
159 * returned from save_fl are undefined, and may be ignored by
162 unsigned long (*save_fl)(void);
163 void (*restore_fl)(unsigned long);
164 void (*irq_disable)(void);
165 void (*irq_enable)(void);
166 void (*safe_halt)(void);
171 #ifdef CONFIG_X86_LOCAL_APIC
173 * Direct APIC operations, principally for VMI. Ideally
174 * these shouldn't be in this interface.
176 void (*apic_write)(unsigned long reg, u32 v);
177 void (*apic_write_atomic)(unsigned long reg, u32 v);
178 u32 (*apic_read)(unsigned long reg);
179 void (*setup_boot_clock)(void);
180 void (*setup_secondary_clock)(void);
182 void (*startup_ipi_hook)(int phys_apicid,
183 unsigned long start_eip,
184 unsigned long start_esp);
190 * Called before/after init_mm pagetable setup. setup_start
191 * may reset %cr3, and may pre-install parts of the pagetable;
192 * pagetable setup is expected to preserve any existing
195 void (*pagetable_setup_start)(pgd_t *pgd_base);
196 void (*pagetable_setup_done)(pgd_t *pgd_base);
198 unsigned long (*read_cr2)(void);
199 void (*write_cr2)(unsigned long);
201 unsigned long (*read_cr3)(void);
202 void (*write_cr3)(unsigned long);
205 * Hooks for intercepting the creation/use/destruction of an
208 void (*activate_mm)(struct mm_struct *prev,
209 struct mm_struct *next);
210 void (*dup_mmap)(struct mm_struct *oldmm,
211 struct mm_struct *mm);
212 void (*exit_mmap)(struct mm_struct *mm);
216 void (*flush_tlb_user)(void);
217 void (*flush_tlb_kernel)(void);
218 void (*flush_tlb_single)(unsigned long addr);
219 void (*flush_tlb_others)(const cpumask_t *cpus, struct mm_struct *mm,
222 /* Hooks for allocating/releasing pagetable pages */
223 void (*alloc_pt)(struct mm_struct *mm, u32 pfn);
224 void (*alloc_pd)(u32 pfn);
225 void (*alloc_pd_clone)(u32 pfn, u32 clonepfn, u32 start, u32 count);
226 void (*release_pt)(u32 pfn);
227 void (*release_pd)(u32 pfn);
229 /* Pagetable manipulation functions */
230 void (*set_pte)(pte_t *ptep, pte_t pteval);
231 void (*set_pte_at)(struct mm_struct *mm, unsigned long addr,
232 pte_t *ptep, pte_t pteval);
233 void (*set_pmd)(pmd_t *pmdp, pmd_t pmdval);
234 void (*pte_update)(struct mm_struct *mm, unsigned long addr, pte_t *ptep);
235 void (*pte_update_defer)(struct mm_struct *mm,
236 unsigned long addr, pte_t *ptep);
238 pteval_t (*pte_val)(pte_t);
239 pte_t (*make_pte)(pteval_t pte);
241 pgdval_t (*pgd_val)(pgd_t);
242 pgd_t (*make_pgd)(pgdval_t pgd);
244 #if PAGETABLE_LEVELS >= 3
245 #ifdef CONFIG_X86_PAE
246 void (*set_pte_atomic)(pte_t *ptep, pte_t pteval);
247 void (*set_pte_present)(struct mm_struct *mm, unsigned long addr,
248 pte_t *ptep, pte_t pte);
249 void (*pte_clear)(struct mm_struct *mm, unsigned long addr, pte_t *ptep);
250 void (*pmd_clear)(pmd_t *pmdp);
252 #endif /* CONFIG_X86_PAE */
254 void (*set_pud)(pud_t *pudp, pud_t pudval);
256 pmdval_t (*pmd_val)(pmd_t);
257 pmd_t (*make_pmd)(pmdval_t pmd);
259 #if PAGETABLE_LEVELS == 4
260 pudval_t (*pud_val)(pud_t);
261 pud_t (*make_pud)(pudval_t pud);
262 #endif /* PAGETABLE_LEVELS == 4 */
263 #endif /* PAGETABLE_LEVELS >= 3 */
265 #ifdef CONFIG_HIGHPTE
266 void *(*kmap_atomic_pte)(struct page *page, enum km_type type);
269 struct pv_lazy_ops lazy_mode;
272 /* This contains all the paravirt structures: we get a convenient
273 * number for each function using the offset which we use to indicate
275 struct paravirt_patch_template
277 struct pv_init_ops pv_init_ops;
278 struct pv_time_ops pv_time_ops;
279 struct pv_cpu_ops pv_cpu_ops;
280 struct pv_irq_ops pv_irq_ops;
281 struct pv_apic_ops pv_apic_ops;
282 struct pv_mmu_ops pv_mmu_ops;
285 extern struct pv_info pv_info;
286 extern struct pv_init_ops pv_init_ops;
287 extern struct pv_time_ops pv_time_ops;
288 extern struct pv_cpu_ops pv_cpu_ops;
289 extern struct pv_irq_ops pv_irq_ops;
290 extern struct pv_apic_ops pv_apic_ops;
291 extern struct pv_mmu_ops pv_mmu_ops;
293 #define PARAVIRT_PATCH(x) \
294 (offsetof(struct paravirt_patch_template, x) / sizeof(void *))
296 #define paravirt_type(op) \
297 [paravirt_typenum] "i" (PARAVIRT_PATCH(op)), \
298 [paravirt_opptr] "m" (op)
299 #define paravirt_clobber(clobber) \
300 [paravirt_clobber] "i" (clobber)
303 * Generate some code, and mark it as patchable by the
304 * apply_paravirt() alternate instruction patcher.
306 #define _paravirt_alt(insn_string, type, clobber) \
307 "771:\n\t" insn_string "\n" "772:\n" \
308 ".pushsection .parainstructions,\"a\"\n" \
311 " .byte " type "\n" \
312 " .byte 772b-771b\n" \
313 " .short " clobber "\n" \
316 /* Generate patchable code, with the default asm parameters. */
317 #define paravirt_alt(insn_string) \
318 _paravirt_alt(insn_string, "%c[paravirt_typenum]", "%c[paravirt_clobber]")
320 /* Simple instruction patching code. */
321 #define DEF_NATIVE(ops, name, code) \
322 extern const char start_##ops##_##name[], end_##ops##_##name[]; \
323 asm("start_" #ops "_" #name ": " code "; end_" #ops "_" #name ":")
325 unsigned paravirt_patch_nop(void);
326 unsigned paravirt_patch_ignore(unsigned len);
327 unsigned paravirt_patch_call(void *insnbuf,
328 const void *target, u16 tgt_clobbers,
329 unsigned long addr, u16 site_clobbers,
331 unsigned paravirt_patch_jmp(void *insnbuf, const void *target,
332 unsigned long addr, unsigned len);
333 unsigned paravirt_patch_default(u8 type, u16 clobbers, void *insnbuf,
334 unsigned long addr, unsigned len);
336 unsigned paravirt_patch_insns(void *insnbuf, unsigned len,
337 const char *start, const char *end);
339 unsigned native_patch(u8 type, u16 clobbers, void *ibuf,
340 unsigned long addr, unsigned len);
342 int paravirt_disable_iospace(void);
345 * This generates an indirect call based on the operation type number.
346 * The type number, computed in PARAVIRT_PATCH, is derived from the
347 * offset into the paravirt_patch_template structure, and can therefore be
348 * freely converted back into a structure offset.
350 #define PARAVIRT_CALL "call *%[paravirt_opptr];"
353 * These macros are intended to wrap calls through one of the paravirt
354 * ops structs, so that they can be later identified and patched at
357 * Normally, a call to a pv_op function is a simple indirect call:
358 * (pv_op_struct.operations)(args...).
360 * Unfortunately, this is a relatively slow operation for modern CPUs,
361 * because it cannot necessarily determine what the destination
362 * address is. In this case, the address is a runtime constant, so at
363 * the very least we can patch the call to e a simple direct call, or
364 * ideally, patch an inline implementation into the callsite. (Direct
365 * calls are essentially free, because the call and return addresses
366 * are completely predictable.)
368 * For i386, these macros rely on the standard gcc "regparm(3)" calling
369 * convention, in which the first three arguments are placed in %eax,
370 * %edx, %ecx (in that order), and the remaining arguments are placed
371 * on the stack. All caller-save registers (eax,edx,ecx) are expected
372 * to be modified (either clobbered or used for return values).
373 * X86_64, on the other hand, already specifies a register-based calling
374 * conventions, returning at %rax, with parameteres going on %rdi, %rsi,
375 * %rdx, and %rcx. Note that for this reason, x86_64 does not need any
376 * special handling for dealing with 4 arguments, unlike i386.
377 * However, x86_64 also have to clobber all caller saved registers, which
378 * unfortunately, are quite a bit (r8 - r11)
380 * The call instruction itself is marked by placing its start address
381 * and size into the .parainstructions section, so that
382 * apply_paravirt() in arch/i386/kernel/alternative.c can do the
383 * appropriate patching under the control of the backend pv_init_ops
386 * Unfortunately there's no way to get gcc to generate the args setup
387 * for the call, and then allow the call itself to be generated by an
388 * inline asm. Because of this, we must do the complete arg setup and
389 * return value handling from within these macros. This is fairly
392 * There are 5 sets of PVOP_* macros for dealing with 0-4 arguments.
393 * It could be extended to more arguments, but there would be little
394 * to be gained from that. For each number of arguments, there are
395 * the two VCALL and CALL variants for void and non-void functions.
397 * When there is a return value, the invoker of the macro must specify
398 * the return type. The macro then uses sizeof() on that type to
399 * determine whether its a 32 or 64 bit value, and places the return
400 * in the right register(s) (just %eax for 32-bit, and %edx:%eax for
401 * 64-bit). For x86_64 machines, it just returns at %rax regardless of
402 * the return value size.
404 * 64-bit arguments are passed as a pair of adjacent 32-bit arguments
405 * i386 also passes 64-bit arguments as a pair of adjacent 32-bit arguments
408 * Small structures are passed and returned in registers. The macro
409 * calling convention can't directly deal with this, so the wrapper
410 * functions must do this.
412 * These PVOP_* macros are only defined within this header. This
413 * means that all uses must be wrapped in inline functions. This also
414 * makes sure the incoming and outgoing types are always correct.
417 #define PVOP_VCALL_ARGS unsigned long __eax, __edx, __ecx
418 #define PVOP_CALL_ARGS PVOP_VCALL_ARGS
419 #define PVOP_VCALL_CLOBBERS "=a" (__eax), "=d" (__edx), \
421 #define PVOP_CALL_CLOBBERS PVOP_VCALL_CLOBBERS
422 #define EXTRA_CLOBBERS
423 #define VEXTRA_CLOBBERS
425 #define PVOP_VCALL_ARGS unsigned long __edi, __esi, __edx, __ecx
426 #define PVOP_CALL_ARGS PVOP_VCALL_ARGS, __eax
427 #define PVOP_VCALL_CLOBBERS "=D" (__edi), \
428 "=S" (__esi), "=d" (__edx), \
431 #define PVOP_CALL_CLOBBERS PVOP_VCALL_CLOBBERS, "=a" (__eax)
433 #define EXTRA_CLOBBERS , "r8", "r9", "r10", "r11"
434 #define VEXTRA_CLOBBERS , "rax", "r8", "r9", "r10", "r11"
437 #define __PVOP_CALL(rettype, op, pre, post, ...) \
441 /* This is 32-bit specific, but is okay in 64-bit */ \
442 /* since this condition will never hold */ \
443 if (sizeof(rettype) > sizeof(unsigned long)) { \
445 paravirt_alt(PARAVIRT_CALL) \
447 : PVOP_CALL_CLOBBERS \
448 : paravirt_type(op), \
449 paravirt_clobber(CLBR_ANY), \
451 : "memory", "cc" EXTRA_CLOBBERS); \
452 __ret = (rettype)((((u64)__edx) << 32) | __eax); \
455 paravirt_alt(PARAVIRT_CALL) \
457 : PVOP_CALL_CLOBBERS \
458 : paravirt_type(op), \
459 paravirt_clobber(CLBR_ANY), \
461 : "memory", "cc" EXTRA_CLOBBERS); \
462 __ret = (rettype)__eax; \
466 #define __PVOP_VCALL(op, pre, post, ...) \
470 paravirt_alt(PARAVIRT_CALL) \
472 : PVOP_VCALL_CLOBBERS \
473 : paravirt_type(op), \
474 paravirt_clobber(CLBR_ANY), \
476 : "memory", "cc" VEXTRA_CLOBBERS); \
479 #define PVOP_CALL0(rettype, op) \
480 __PVOP_CALL(rettype, op, "", "")
481 #define PVOP_VCALL0(op) \
482 __PVOP_VCALL(op, "", "")
484 #define PVOP_CALL1(rettype, op, arg1) \
485 __PVOP_CALL(rettype, op, "", "", "0" ((unsigned long)(arg1)))
486 #define PVOP_VCALL1(op, arg1) \
487 __PVOP_VCALL(op, "", "", "0" ((unsigned long)(arg1)))
489 #define PVOP_CALL2(rettype, op, arg1, arg2) \
490 __PVOP_CALL(rettype, op, "", "", "0" ((unsigned long)(arg1)), \
491 "1" ((unsigned long)(arg2)))
492 #define PVOP_VCALL2(op, arg1, arg2) \
493 __PVOP_VCALL(op, "", "", "0" ((unsigned long)(arg1)), \
494 "1" ((unsigned long)(arg2)))
496 #define PVOP_CALL3(rettype, op, arg1, arg2, arg3) \
497 __PVOP_CALL(rettype, op, "", "", "0" ((unsigned long)(arg1)), \
498 "1"((unsigned long)(arg2)), "2"((unsigned long)(arg3)))
499 #define PVOP_VCALL3(op, arg1, arg2, arg3) \
500 __PVOP_VCALL(op, "", "", "0" ((unsigned long)(arg1)), \
501 "1"((unsigned long)(arg2)), "2"((unsigned long)(arg3)))
503 /* This is the only difference in x86_64. We can make it much simpler */
505 #define PVOP_CALL4(rettype, op, arg1, arg2, arg3, arg4) \
506 __PVOP_CALL(rettype, op, \
507 "push %[_arg4];", "lea 4(%%esp),%%esp;", \
508 "0" ((u32)(arg1)), "1" ((u32)(arg2)), \
509 "2" ((u32)(arg3)), [_arg4] "mr" ((u32)(arg4)))
510 #define PVOP_VCALL4(op, arg1, arg2, arg3, arg4) \
512 "push %[_arg4];", "lea 4(%%esp),%%esp;", \
513 "0" ((u32)(arg1)), "1" ((u32)(arg2)), \
514 "2" ((u32)(arg3)), [_arg4] "mr" ((u32)(arg4)))
516 #define PVOP_CALL4(rettype, op, arg1, arg2, arg3, arg4) \
517 __PVOP_CALL(rettype, op, "", "", "0" ((unsigned long)(arg1)), \
518 "1"((unsigned long)(arg2)), "2"((unsigned long)(arg3)), \
519 "3"((unsigned long)(arg4)))
520 #define PVOP_VCALL4(op, arg1, arg2, arg3, arg4) \
521 __PVOP_VCALL(op, "", "", "0" ((unsigned long)(arg1)), \
522 "1"((unsigned long)(arg2)), "2"((unsigned long)(arg3)), \
523 "3"((unsigned long)(arg4)))
526 static inline int paravirt_enabled(void)
528 return pv_info.paravirt_enabled;
531 static inline void load_sp0(struct tss_struct *tss,
532 struct thread_struct *thread)
534 PVOP_VCALL2(pv_cpu_ops.load_sp0, tss, thread);
537 #define ARCH_SETUP pv_init_ops.arch_setup();
538 static inline unsigned long get_wallclock(void)
540 return PVOP_CALL0(unsigned long, pv_time_ops.get_wallclock);
543 static inline int set_wallclock(unsigned long nowtime)
545 return PVOP_CALL1(int, pv_time_ops.set_wallclock, nowtime);
548 static inline void (*choose_time_init(void))(void)
550 return pv_time_ops.time_init;
553 /* The paravirtualized CPUID instruction. */
554 static inline void __cpuid(unsigned int *eax, unsigned int *ebx,
555 unsigned int *ecx, unsigned int *edx)
557 PVOP_VCALL4(pv_cpu_ops.cpuid, eax, ebx, ecx, edx);
561 * These special macros can be used to get or set a debugging register
563 static inline unsigned long paravirt_get_debugreg(int reg)
565 return PVOP_CALL1(unsigned long, pv_cpu_ops.get_debugreg, reg);
567 #define get_debugreg(var, reg) var = paravirt_get_debugreg(reg)
568 static inline void set_debugreg(unsigned long val, int reg)
570 PVOP_VCALL2(pv_cpu_ops.set_debugreg, reg, val);
573 static inline void clts(void)
575 PVOP_VCALL0(pv_cpu_ops.clts);
578 static inline unsigned long read_cr0(void)
580 return PVOP_CALL0(unsigned long, pv_cpu_ops.read_cr0);
583 static inline void write_cr0(unsigned long x)
585 PVOP_VCALL1(pv_cpu_ops.write_cr0, x);
588 static inline unsigned long read_cr2(void)
590 return PVOP_CALL0(unsigned long, pv_mmu_ops.read_cr2);
593 static inline void write_cr2(unsigned long x)
595 PVOP_VCALL1(pv_mmu_ops.write_cr2, x);
598 static inline unsigned long read_cr3(void)
600 return PVOP_CALL0(unsigned long, pv_mmu_ops.read_cr3);
603 static inline void write_cr3(unsigned long x)
605 PVOP_VCALL1(pv_mmu_ops.write_cr3, x);
608 static inline unsigned long read_cr4(void)
610 return PVOP_CALL0(unsigned long, pv_cpu_ops.read_cr4);
612 static inline unsigned long read_cr4_safe(void)
614 return PVOP_CALL0(unsigned long, pv_cpu_ops.read_cr4_safe);
617 static inline void write_cr4(unsigned long x)
619 PVOP_VCALL1(pv_cpu_ops.write_cr4, x);
623 static inline unsigned long read_cr8(void)
625 return PVOP_CALL0(unsigned long, pv_cpu_ops.read_cr8);
628 static inline void write_cr8(unsigned long x)
630 PVOP_VCALL1(pv_cpu_ops.write_cr8, x);
634 static inline void raw_safe_halt(void)
636 PVOP_VCALL0(pv_irq_ops.safe_halt);
639 static inline void halt(void)
641 PVOP_VCALL0(pv_irq_ops.safe_halt);
644 static inline void wbinvd(void)
646 PVOP_VCALL0(pv_cpu_ops.wbinvd);
649 #define get_kernel_rpl() (pv_info.kernel_rpl)
651 static inline u64 paravirt_read_msr(unsigned msr, int *err)
653 return PVOP_CALL2(u64, pv_cpu_ops.read_msr, msr, err);
655 static inline int paravirt_write_msr(unsigned msr, unsigned low, unsigned high)
657 return PVOP_CALL3(int, pv_cpu_ops.write_msr, msr, low, high);
660 /* These should all do BUG_ON(_err), but our headers are too tangled. */
661 #define rdmsr(msr,val1,val2) do { \
663 u64 _l = paravirt_read_msr(msr, &_err); \
668 #define wrmsr(msr,val1,val2) do { \
669 paravirt_write_msr(msr, val1, val2); \
672 #define rdmsrl(msr,val) do { \
674 val = paravirt_read_msr(msr, &_err); \
677 #define wrmsrl(msr,val) wrmsr(msr, (u32)((u64)(val)), ((u64)(val))>>32)
678 #define wrmsr_safe(msr,a,b) paravirt_write_msr(msr, a, b)
680 /* rdmsr with exception handling */
681 #define rdmsr_safe(msr,a,b) ({ \
683 u64 _l = paravirt_read_msr(msr, &_err); \
689 static inline u64 paravirt_read_tsc(void)
691 return PVOP_CALL0(u64, pv_cpu_ops.read_tsc);
694 #define rdtscl(low) do { \
695 u64 _l = paravirt_read_tsc(); \
699 #define rdtscll(val) (val = paravirt_read_tsc())
701 static inline unsigned long long paravirt_sched_clock(void)
703 return PVOP_CALL0(unsigned long long, pv_time_ops.sched_clock);
705 #define calculate_cpu_khz() (pv_time_ops.get_cpu_khz())
707 static inline unsigned long long paravirt_read_pmc(int counter)
709 return PVOP_CALL1(u64, pv_cpu_ops.read_pmc, counter);
712 #define rdpmc(counter,low,high) do { \
713 u64 _l = paravirt_read_pmc(counter); \
718 static inline unsigned long long paravirt_rdtscp(unsigned int *aux)
720 return PVOP_CALL1(u64, pv_cpu_ops.read_tscp, aux);
723 #define rdtscp(low, high, aux) \
726 unsigned long __val = paravirt_rdtscp(&__aux); \
727 (low) = (u32)__val; \
728 (high) = (u32)(__val >> 32); \
732 #define rdtscpll(val, aux) \
734 unsigned long __aux; \
735 val = paravirt_rdtscp(&__aux); \
739 static inline void load_TR_desc(void)
741 PVOP_VCALL0(pv_cpu_ops.load_tr_desc);
743 static inline void load_gdt(const struct desc_ptr *dtr)
745 PVOP_VCALL1(pv_cpu_ops.load_gdt, dtr);
747 static inline void load_idt(const struct desc_ptr *dtr)
749 PVOP_VCALL1(pv_cpu_ops.load_idt, dtr);
751 static inline void set_ldt(const void *addr, unsigned entries)
753 PVOP_VCALL2(pv_cpu_ops.set_ldt, addr, entries);
755 static inline void store_gdt(struct desc_ptr *dtr)
757 PVOP_VCALL1(pv_cpu_ops.store_gdt, dtr);
759 static inline void store_idt(struct desc_ptr *dtr)
761 PVOP_VCALL1(pv_cpu_ops.store_idt, dtr);
763 static inline unsigned long paravirt_store_tr(void)
765 return PVOP_CALL0(unsigned long, pv_cpu_ops.store_tr);
767 #define store_tr(tr) ((tr) = paravirt_store_tr())
768 static inline void load_TLS(struct thread_struct *t, unsigned cpu)
770 PVOP_VCALL2(pv_cpu_ops.load_tls, t, cpu);
773 static inline void write_ldt_entry(struct desc_struct *dt, int entry,
776 PVOP_VCALL3(pv_cpu_ops.write_ldt_entry, dt, entry, desc);
779 static inline void write_gdt_entry(struct desc_struct *dt, int entry,
780 void *desc, int type)
782 PVOP_VCALL4(pv_cpu_ops.write_gdt_entry, dt, entry, desc, type);
785 static inline void write_idt_entry(gate_desc *dt, int entry, const gate_desc *g)
787 PVOP_VCALL3(pv_cpu_ops.write_idt_entry, dt, entry, g);
789 static inline void set_iopl_mask(unsigned mask)
791 PVOP_VCALL1(pv_cpu_ops.set_iopl_mask, mask);
794 /* The paravirtualized I/O functions */
795 static inline void slow_down_io(void) {
796 pv_cpu_ops.io_delay();
797 #ifdef REALLY_SLOW_IO
798 pv_cpu_ops.io_delay();
799 pv_cpu_ops.io_delay();
800 pv_cpu_ops.io_delay();
804 #ifdef CONFIG_X86_LOCAL_APIC
806 * Basic functions accessing APICs.
808 static inline void apic_write(unsigned long reg, u32 v)
810 PVOP_VCALL2(pv_apic_ops.apic_write, reg, v);
813 static inline void apic_write_atomic(unsigned long reg, u32 v)
815 PVOP_VCALL2(pv_apic_ops.apic_write_atomic, reg, v);
818 static inline u32 apic_read(unsigned long reg)
820 return PVOP_CALL1(unsigned long, pv_apic_ops.apic_read, reg);
823 static inline void setup_boot_clock(void)
825 PVOP_VCALL0(pv_apic_ops.setup_boot_clock);
828 static inline void setup_secondary_clock(void)
830 PVOP_VCALL0(pv_apic_ops.setup_secondary_clock);
834 static inline void paravirt_post_allocator_init(void)
836 if (pv_init_ops.post_allocator_init)
837 (*pv_init_ops.post_allocator_init)();
840 static inline void paravirt_pagetable_setup_start(pgd_t *base)
842 (*pv_mmu_ops.pagetable_setup_start)(base);
845 static inline void paravirt_pagetable_setup_done(pgd_t *base)
847 (*pv_mmu_ops.pagetable_setup_done)(base);
851 static inline void startup_ipi_hook(int phys_apicid, unsigned long start_eip,
852 unsigned long start_esp)
854 PVOP_VCALL3(pv_apic_ops.startup_ipi_hook,
855 phys_apicid, start_eip, start_esp);
859 static inline void paravirt_activate_mm(struct mm_struct *prev,
860 struct mm_struct *next)
862 PVOP_VCALL2(pv_mmu_ops.activate_mm, prev, next);
865 static inline void arch_dup_mmap(struct mm_struct *oldmm,
866 struct mm_struct *mm)
868 PVOP_VCALL2(pv_mmu_ops.dup_mmap, oldmm, mm);
871 static inline void arch_exit_mmap(struct mm_struct *mm)
873 PVOP_VCALL1(pv_mmu_ops.exit_mmap, mm);
876 static inline void __flush_tlb(void)
878 PVOP_VCALL0(pv_mmu_ops.flush_tlb_user);
880 static inline void __flush_tlb_global(void)
882 PVOP_VCALL0(pv_mmu_ops.flush_tlb_kernel);
884 static inline void __flush_tlb_single(unsigned long addr)
886 PVOP_VCALL1(pv_mmu_ops.flush_tlb_single, addr);
889 static inline void flush_tlb_others(cpumask_t cpumask, struct mm_struct *mm,
892 PVOP_VCALL3(pv_mmu_ops.flush_tlb_others, &cpumask, mm, va);
895 static inline void paravirt_alloc_pt(struct mm_struct *mm, unsigned pfn)
897 PVOP_VCALL2(pv_mmu_ops.alloc_pt, mm, pfn);
899 static inline void paravirt_release_pt(unsigned pfn)
901 PVOP_VCALL1(pv_mmu_ops.release_pt, pfn);
904 static inline void paravirt_alloc_pd(unsigned pfn)
906 PVOP_VCALL1(pv_mmu_ops.alloc_pd, pfn);
909 static inline void paravirt_alloc_pd_clone(unsigned pfn, unsigned clonepfn,
910 unsigned start, unsigned count)
912 PVOP_VCALL4(pv_mmu_ops.alloc_pd_clone, pfn, clonepfn, start, count);
914 static inline void paravirt_release_pd(unsigned pfn)
916 PVOP_VCALL1(pv_mmu_ops.release_pd, pfn);
919 #ifdef CONFIG_HIGHPTE
920 static inline void *kmap_atomic_pte(struct page *page, enum km_type type)
923 ret = PVOP_CALL2(unsigned long, pv_mmu_ops.kmap_atomic_pte, page, type);
928 static inline void pte_update(struct mm_struct *mm, unsigned long addr,
931 PVOP_VCALL3(pv_mmu_ops.pte_update, mm, addr, ptep);
934 static inline void pte_update_defer(struct mm_struct *mm, unsigned long addr,
937 PVOP_VCALL3(pv_mmu_ops.pte_update_defer, mm, addr, ptep);
940 static inline pte_t __pte(pteval_t val)
944 if (sizeof(pteval_t) > sizeof(long))
945 ret = PVOP_CALL2(pteval_t,
947 val, (u64)val >> 32);
949 ret = PVOP_CALL1(pteval_t,
953 return (pte_t) { .pte = ret };
956 static inline pteval_t pte_val(pte_t pte)
960 if (sizeof(pteval_t) > sizeof(long))
961 ret = PVOP_CALL2(pteval_t, pv_mmu_ops.pte_val,
962 pte.pte, (u64)pte.pte >> 32);
964 ret = PVOP_CALL1(pteval_t, pv_mmu_ops.pte_val,
970 static inline pgd_t __pgd(pgdval_t val)
974 if (sizeof(pgdval_t) > sizeof(long))
975 ret = PVOP_CALL2(pgdval_t, pv_mmu_ops.make_pgd,
976 val, (u64)val >> 32);
978 ret = PVOP_CALL1(pgdval_t, pv_mmu_ops.make_pgd,
981 return (pgd_t) { ret };
984 static inline pgdval_t pgd_val(pgd_t pgd)
988 if (sizeof(pgdval_t) > sizeof(long))
989 ret = PVOP_CALL2(pgdval_t, pv_mmu_ops.pgd_val,
990 pgd.pgd, (u64)pgd.pgd >> 32);
992 ret = PVOP_CALL1(pgdval_t, pv_mmu_ops.pgd_val,
998 static inline void set_pte(pte_t *ptep, pte_t pte)
1000 if (sizeof(pteval_t) > sizeof(long))
1001 PVOP_VCALL3(pv_mmu_ops.set_pte, ptep,
1002 pte.pte, (u64)pte.pte >> 32);
1004 PVOP_VCALL2(pv_mmu_ops.set_pte, ptep,
1008 static inline void set_pte_at(struct mm_struct *mm, unsigned long addr,
1009 pte_t *ptep, pte_t pte)
1011 if (sizeof(pteval_t) > sizeof(long))
1013 pv_mmu_ops.set_pte_at(mm, addr, ptep, pte);
1015 PVOP_VCALL4(pv_mmu_ops.set_pte_at, mm, addr, ptep, pte.pte);
1018 static inline void set_pmd(pmd_t *pmdp, pmd_t pmd)
1020 pmdval_t val = native_pmd_val(pmd);
1022 if (sizeof(pmdval_t) > sizeof(long))
1023 PVOP_VCALL3(pv_mmu_ops.set_pmd, pmdp, val, (u64)val >> 32);
1025 PVOP_VCALL2(pv_mmu_ops.set_pmd, pmdp, val);
1028 #if PAGETABLE_LEVELS >= 3
1029 static inline pmd_t __pmd(pmdval_t val)
1033 if (sizeof(pmdval_t) > sizeof(long))
1034 ret = PVOP_CALL2(pmdval_t, pv_mmu_ops.make_pmd,
1035 val, (u64)val >> 32);
1037 ret = PVOP_CALL1(pmdval_t, pv_mmu_ops.make_pmd,
1040 return (pmd_t) { ret };
1043 static inline pmdval_t pmd_val(pmd_t pmd)
1047 if (sizeof(pmdval_t) > sizeof(long))
1048 ret = PVOP_CALL2(pmdval_t, pv_mmu_ops.pmd_val,
1049 pmd.pmd, (u64)pmd.pmd >> 32);
1051 ret = PVOP_CALL1(pmdval_t, pv_mmu_ops.pmd_val,
1057 static inline void set_pud(pud_t *pudp, pud_t pud)
1059 pudval_t val = native_pud_val(pud);
1061 if (sizeof(pudval_t) > sizeof(long))
1062 PVOP_VCALL3(pv_mmu_ops.set_pud, pudp,
1063 val, (u64)val >> 32);
1065 PVOP_VCALL2(pv_mmu_ops.set_pud, pudp,
1068 #endif /* PAGETABLE_LEVELS >= 3 */
1070 #ifdef CONFIG_X86_PAE
1071 /* Special-case pte-setting operations for PAE, which can't update a
1072 64-bit pte atomically */
1073 static inline void set_pte_atomic(pte_t *ptep, pte_t pte)
1075 PVOP_VCALL3(pv_mmu_ops.set_pte_atomic, ptep,
1076 pte.pte, pte.pte >> 32);
1079 static inline void set_pte_present(struct mm_struct *mm, unsigned long addr,
1080 pte_t *ptep, pte_t pte)
1083 pv_mmu_ops.set_pte_present(mm, addr, ptep, pte);
1086 static inline void pte_clear(struct mm_struct *mm, unsigned long addr,
1089 PVOP_VCALL3(pv_mmu_ops.pte_clear, mm, addr, ptep);
1092 static inline void pmd_clear(pmd_t *pmdp)
1094 PVOP_VCALL1(pv_mmu_ops.pmd_clear, pmdp);
1096 #else /* !CONFIG_X86_PAE */
1097 static inline void set_pte_atomic(pte_t *ptep, pte_t pte)
1102 static inline void set_pte_present(struct mm_struct *mm, unsigned long addr,
1103 pte_t *ptep, pte_t pte)
1108 static inline void pte_clear(struct mm_struct *mm, unsigned long addr,
1111 set_pte_at(mm, addr, ptep, __pte(0));
1114 static inline void pmd_clear(pmd_t *pmdp)
1116 set_pmd(pmdp, __pmd(0));
1118 #endif /* CONFIG_X86_PAE */
1120 /* Lazy mode for batching updates / context switch */
1121 enum paravirt_lazy_mode {
1127 enum paravirt_lazy_mode paravirt_get_lazy_mode(void);
1128 void paravirt_enter_lazy_cpu(void);
1129 void paravirt_leave_lazy_cpu(void);
1130 void paravirt_enter_lazy_mmu(void);
1131 void paravirt_leave_lazy_mmu(void);
1132 void paravirt_leave_lazy(enum paravirt_lazy_mode mode);
1134 #define __HAVE_ARCH_ENTER_LAZY_CPU_MODE
1135 static inline void arch_enter_lazy_cpu_mode(void)
1137 PVOP_VCALL0(pv_cpu_ops.lazy_mode.enter);
1140 static inline void arch_leave_lazy_cpu_mode(void)
1142 PVOP_VCALL0(pv_cpu_ops.lazy_mode.leave);
1145 static inline void arch_flush_lazy_cpu_mode(void)
1147 if (unlikely(paravirt_get_lazy_mode() == PARAVIRT_LAZY_CPU)) {
1148 arch_leave_lazy_cpu_mode();
1149 arch_enter_lazy_cpu_mode();
1154 #define __HAVE_ARCH_ENTER_LAZY_MMU_MODE
1155 static inline void arch_enter_lazy_mmu_mode(void)
1157 PVOP_VCALL0(pv_mmu_ops.lazy_mode.enter);
1160 static inline void arch_leave_lazy_mmu_mode(void)
1162 PVOP_VCALL0(pv_mmu_ops.lazy_mode.leave);
1165 static inline void arch_flush_lazy_mmu_mode(void)
1167 if (unlikely(paravirt_get_lazy_mode() == PARAVIRT_LAZY_MMU)) {
1168 arch_leave_lazy_mmu_mode();
1169 arch_enter_lazy_mmu_mode();
1173 void _paravirt_nop(void);
1174 #define paravirt_nop ((void *)_paravirt_nop)
1176 /* These all sit in the .parainstructions section to tell us what to patch. */
1177 struct paravirt_patch_site {
1178 u8 *instr; /* original instructions */
1179 u8 instrtype; /* type of this instruction */
1180 u8 len; /* length of original instruction */
1181 u16 clobbers; /* what registers you may clobber */
1184 extern struct paravirt_patch_site __parainstructions[],
1185 __parainstructions_end[];
1187 #ifdef CONFIG_X86_32
1188 #define PV_SAVE_REGS "pushl %%ecx; pushl %%edx;"
1189 #define PV_RESTORE_REGS "popl %%edx; popl %%ecx"
1190 #define PV_FLAGS_ARG "0"
1191 #define PV_EXTRA_CLOBBERS
1192 #define PV_VEXTRA_CLOBBERS
1194 /* We save some registers, but all of them, that's too much. We clobber all
1195 * caller saved registers but the argument parameter */
1196 #define PV_SAVE_REGS "pushq %%rdi;"
1197 #define PV_RESTORE_REGS "popq %%rdi;"
1198 #define PV_EXTRA_CLOBBERS EXTRA_CLOBBERS, "rcx" , "rdx"
1199 #define PV_VEXTRA_CLOBBERS EXTRA_CLOBBERS, "rdi", "rcx" , "rdx"
1200 #define PV_FLAGS_ARG "D"
1203 static inline unsigned long __raw_local_save_flags(void)
1207 asm volatile(paravirt_alt(PV_SAVE_REGS
1211 : paravirt_type(pv_irq_ops.save_fl),
1212 paravirt_clobber(CLBR_EAX)
1213 : "memory", "cc" PV_VEXTRA_CLOBBERS);
1217 static inline void raw_local_irq_restore(unsigned long f)
1219 asm volatile(paravirt_alt(PV_SAVE_REGS
1224 paravirt_type(pv_irq_ops.restore_fl),
1225 paravirt_clobber(CLBR_EAX)
1226 : "memory", "cc" PV_EXTRA_CLOBBERS);
1229 static inline void raw_local_irq_disable(void)
1231 asm volatile(paravirt_alt(PV_SAVE_REGS
1235 : paravirt_type(pv_irq_ops.irq_disable),
1236 paravirt_clobber(CLBR_EAX)
1237 : "memory", "eax", "cc" PV_EXTRA_CLOBBERS);
1240 static inline void raw_local_irq_enable(void)
1242 asm volatile(paravirt_alt(PV_SAVE_REGS
1246 : paravirt_type(pv_irq_ops.irq_enable),
1247 paravirt_clobber(CLBR_EAX)
1248 : "memory", "eax", "cc" PV_EXTRA_CLOBBERS);
1251 static inline unsigned long __raw_local_irq_save(void)
1255 f = __raw_local_save_flags();
1256 raw_local_irq_disable();
1260 /* Make sure as little as possible of this mess escapes. */
1261 #undef PARAVIRT_CALL
1275 #else /* __ASSEMBLY__ */
1277 #define _PVSITE(ptype, clobbers, ops, word, algn) \
1281 .pushsection .parainstructions,"a"; \
1290 #ifdef CONFIG_X86_64
1291 #define PV_SAVE_REGS pushq %rax; pushq %rdi; pushq %rcx; pushq %rdx
1292 #define PV_RESTORE_REGS popq %rdx; popq %rcx; popq %rdi; popq %rax
1293 #define PARA_PATCH(struct, off) ((PARAVIRT_PATCH_##struct + (off)) / 8)
1294 #define PARA_SITE(ptype, clobbers, ops) _PVSITE(ptype, clobbers, ops, .quad, 8)
1296 #define PV_SAVE_REGS pushl %eax; pushl %edi; pushl %ecx; pushl %edx
1297 #define PV_RESTORE_REGS popl %edx; popl %ecx; popl %edi; popl %eax
1298 #define PARA_PATCH(struct, off) ((PARAVIRT_PATCH_##struct + (off)) / 4)
1299 #define PARA_SITE(ptype, clobbers, ops) _PVSITE(ptype, clobbers, ops, .long, 4)
1302 #define INTERRUPT_RETURN \
1303 PARA_SITE(PARA_PATCH(pv_cpu_ops, PV_CPU_iret), CLBR_NONE, \
1304 jmp *%cs:pv_cpu_ops+PV_CPU_iret)
1306 #define DISABLE_INTERRUPTS(clobbers) \
1307 PARA_SITE(PARA_PATCH(pv_irq_ops, PV_IRQ_irq_disable), clobbers, \
1309 call *%cs:pv_irq_ops+PV_IRQ_irq_disable; \
1312 #define ENABLE_INTERRUPTS(clobbers) \
1313 PARA_SITE(PARA_PATCH(pv_irq_ops, PV_IRQ_irq_enable), clobbers, \
1315 call *%cs:pv_irq_ops+PV_IRQ_irq_enable; \
1318 #define ENABLE_INTERRUPTS_SYSCALL_RET \
1319 PARA_SITE(PARA_PATCH(pv_cpu_ops, PV_CPU_irq_enable_syscall_ret),\
1321 jmp *%cs:pv_cpu_ops+PV_CPU_irq_enable_syscall_ret)
1324 #ifdef CONFIG_X86_32
1325 #define GET_CR0_INTO_EAX \
1326 push %ecx; push %edx; \
1327 call *pv_cpu_ops+PV_CPU_read_cr0; \
1331 PARA_SITE(PARA_PATCH(pv_cpu_ops, PV_CPU_swapgs), CLBR_NONE, \
1333 call *pv_cpu_ops+PV_CPU_swapgs; \
1337 #define GET_CR2_INTO_RCX \
1338 call *pv_mmu_ops+PV_MMU_read_cr2; \
1344 #endif /* __ASSEMBLY__ */
1345 #endif /* CONFIG_PARAVIRT */
1346 #endif /* __ASM_PARAVIRT_H */