1 #ifndef __ASM_SH_HW_IRQ_H
2 #define __ASM_SH_HW_IRQ_H
4 #include <linux/init.h>
5 #include <asm/atomic.h>
7 extern atomic_t irq_err_count;
11 unsigned char ipr_offset, ipr_shift;
12 unsigned char msk_offset, msk_shift;
13 unsigned char priority;
17 unsigned long prio_base;
18 unsigned long msk_base;
19 unsigned long mskclr_base;
20 struct intc2_data *intc2_data;
25 void register_intc2_controller(struct intc2_desc *);
29 unsigned char ipr_idx; /* Index for the IPR registered */
30 unsigned char shift; /* Number of bits to shift the data */
31 unsigned char priority; /* The priority */
35 unsigned long *ipr_offsets;
36 unsigned int nr_offsets;
37 struct ipr_data *ipr_data;
42 void register_ipr_controller(struct ipr_desc *);
44 typedef unsigned char intc_enum;
51 #define INTC_VECT(enum_id, vect) { enum_id, vect }
55 unsigned char priority;
58 #define INTC_PRIO(enum_id, prio) { enum_id, prio }
65 #define INTC_GROUP(enum_id, ids...) { enum_id, (intc_enum []) { ids, 0 } }
67 struct intc_mask_reg {
68 unsigned long set_reg, clr_reg, reg_width;
69 intc_enum enum_ids[32];
72 struct intc_prio_reg {
73 unsigned long reg, reg_width, field_width;
74 intc_enum enum_ids[16];
77 struct intc_sense_reg {
78 unsigned long reg, reg_width, field_width;
79 intc_enum enum_ids[16];
83 struct intc_vect *vectors;
84 unsigned int nr_vectors;
85 struct intc_group *groups;
86 unsigned int nr_groups;
87 struct intc_prio *priorities;
88 unsigned int nr_priorities;
89 struct intc_mask_reg *mask_regs;
90 unsigned int nr_mask_regs;
91 struct intc_prio_reg *prio_regs;
92 unsigned int nr_prio_regs;
93 struct intc_sense_reg *sense_regs;
94 unsigned int nr_sense_regs;
98 #define _INTC_ARRAY(a) a, sizeof(a)/sizeof(*a)
99 #define DECLARE_INTC_DESC(symbol, chipname, vectors, groups, \
100 priorities, mask_regs, prio_regs, sense_regs) \
101 struct intc_desc symbol = { \
102 _INTC_ARRAY(vectors), _INTC_ARRAY(groups), \
103 _INTC_ARRAY(priorities), \
104 _INTC_ARRAY(mask_regs), _INTC_ARRAY(prio_regs), \
105 _INTC_ARRAY(sense_regs), \
106 .chip.name = chipname, \
109 void __init register_intc_controller(struct intc_desc *desc);
111 void __init plat_irq_setup(void);
113 enum { IRQ_MODE_IRQ, IRQ_MODE_IRQ7654, IRQ_MODE_IRQ3210,
114 IRQ_MODE_IRL7654, IRQ_MODE_IRL3210 };
115 void __init plat_irq_setup_pins(int mode);
117 #endif /* __ASM_SH_HW_IRQ_H */