2 * drivers/char/watchdog/sp805-wdt.c
4 * Watchdog driver for ARM SP805 watchdog module
6 * Copyright (C) 2010 ST Microelectronics
7 * Viresh Kumar<viresh.kumar@st.com>
9 * This file is licensed under the terms of the GNU General Public
10 * License version 2 or later. This program is licensed "as is" without any
11 * warranty of any kind, whether express or implied.
14 #include <linux/device.h>
15 #include <linux/resource.h>
16 #include <linux/amba/bus.h>
17 #include <linux/bitops.h>
18 #include <linux/clk.h>
19 #include <linux/init.h>
21 #include <linux/ioport.h>
22 #include <linux/kernel.h>
23 #include <linux/math64.h>
24 #include <linux/module.h>
25 #include <linux/moduleparam.h>
27 #include <linux/slab.h>
28 #include <linux/spinlock.h>
29 #include <linux/types.h>
30 #include <linux/watchdog.h>
32 /* default timeout in seconds */
33 #define DEFAULT_TIMEOUT 60
35 #define MODULE_NAME "sp805-wdt"
37 /* watchdog register offsets and masks */
39 #define LOAD_MIN 0x00000001
40 #define LOAD_MAX 0xFFFFFFFF
41 #define WDTVALUE 0x004
42 #define WDTCONTROL 0x008
43 /* control register masks */
44 #define INT_ENABLE (1 << 0)
45 #define RESET_ENABLE (1 << 1)
46 #define WDTINTCLR 0x00C
49 #define INT_MASK (1 << 0)
51 #define UNLOCK 0x1ACCE551
52 #define LOCK 0x00000001
55 * struct sp805_wdt: sp805 wdt device structure
56 * @wdd: instance of struct watchdog_device
57 * @lock: spin lock protecting dev structure and io access
58 * @base: base address of wdt
59 * @clk: clock structure of wdt
60 * @adev: amba device structure of wdt
61 * @status: current status of wdt
62 * @load_val: load value to be set for current timeout
63 * @timeout: current programmed timeout
66 struct watchdog_device wdd;
70 struct amba_device *adev;
71 unsigned int load_val;
75 static bool nowayout = WATCHDOG_NOWAYOUT;
76 module_param(nowayout, bool, 0);
77 MODULE_PARM_DESC(nowayout,
78 "Set to 1 to keep watchdog running after device release");
80 /* This routine finds load value that will reset system in required timout */
81 static int wdt_setload(struct watchdog_device *wdd, unsigned int timeout)
83 struct sp805_wdt *wdt = watchdog_get_drvdata(wdd);
86 rate = clk_get_rate(wdt->clk);
89 * sp805 runs counter with given value twice, after the end of first
90 * counter it gives an interrupt and then starts counter again. If
91 * interrupt already occurred then it resets the system. This is why
92 * load is half of what should be required.
94 load = div_u64(rate, 2) * timeout - 1;
96 load = (load > LOAD_MAX) ? LOAD_MAX : load;
97 load = (load < LOAD_MIN) ? LOAD_MIN : load;
99 spin_lock(&wdt->lock);
100 wdt->load_val = load;
101 /* roundup timeout to closest positive integer value */
102 wdt->timeout = div_u64((load + 1) * 2 + (rate / 2), rate);
103 spin_unlock(&wdt->lock);
108 /* returns number of seconds left for reset to occur */
109 static unsigned int wdt_timeleft(struct watchdog_device *wdd)
111 struct sp805_wdt *wdt = watchdog_get_drvdata(wdd);
114 rate = clk_get_rate(wdt->clk);
116 spin_lock(&wdt->lock);
117 load = readl_relaxed(wdt->base + WDTVALUE);
119 /*If the interrupt is inactive then time left is WDTValue + WDTLoad. */
120 if (!(readl_relaxed(wdt->base + WDTRIS) & INT_MASK))
121 load += wdt->load_val + 1;
122 spin_unlock(&wdt->lock);
124 return div_u64(load, rate);
127 static int wdt_config(struct watchdog_device *wdd, bool ping)
129 struct sp805_wdt *wdt = watchdog_get_drvdata(wdd);
133 ret = clk_enable(wdt->clk);
135 dev_err(&wdt->adev->dev, "clock enable fail");
140 spin_lock(&wdt->lock);
142 writel_relaxed(UNLOCK, wdt->base + WDTLOCK);
143 writel_relaxed(wdt->load_val, wdt->base + WDTLOAD);
146 writel_relaxed(INT_MASK, wdt->base + WDTINTCLR);
147 writel_relaxed(INT_ENABLE | RESET_ENABLE, wdt->base +
151 writel_relaxed(LOCK, wdt->base + WDTLOCK);
153 /* Flush posted writes. */
154 readl_relaxed(wdt->base + WDTLOCK);
155 spin_unlock(&wdt->lock);
160 static int wdt_ping(struct watchdog_device *wdd)
162 return wdt_config(wdd, true);
165 /* enables watchdog timers reset */
166 static int wdt_enable(struct watchdog_device *wdd)
168 return wdt_config(wdd, false);
171 /* disables watchdog timers reset */
172 static int wdt_disable(struct watchdog_device *wdd)
174 struct sp805_wdt *wdt = watchdog_get_drvdata(wdd);
176 spin_lock(&wdt->lock);
178 writel_relaxed(UNLOCK, wdt->base + WDTLOCK);
179 writel_relaxed(0, wdt->base + WDTCONTROL);
180 writel_relaxed(LOCK, wdt->base + WDTLOCK);
182 /* Flush posted writes. */
183 readl_relaxed(wdt->base + WDTLOCK);
184 spin_unlock(&wdt->lock);
186 clk_disable(wdt->clk);
191 static const struct watchdog_info wdt_info = {
192 .options = WDIOF_MAGICCLOSE | WDIOF_SETTIMEOUT | WDIOF_KEEPALIVEPING,
193 .identity = MODULE_NAME,
196 static const struct watchdog_ops wdt_ops = {
197 .owner = THIS_MODULE,
201 .set_timeout = wdt_setload,
202 .get_timeleft = wdt_timeleft,
206 sp805_wdt_probe(struct amba_device *adev, const struct amba_id *id)
208 struct sp805_wdt *wdt;
211 if (!devm_request_mem_region(&adev->dev, adev->res.start,
212 resource_size(&adev->res), "sp805_wdt")) {
213 dev_warn(&adev->dev, "Failed to get memory region resource\n");
218 wdt = devm_kzalloc(&adev->dev, sizeof(*wdt), GFP_KERNEL);
220 dev_warn(&adev->dev, "Kzalloc failed\n");
225 wdt->base = devm_ioremap(&adev->dev, adev->res.start,
226 resource_size(&adev->res));
229 dev_warn(&adev->dev, "ioremap fail\n");
233 wdt->clk = clk_get(&adev->dev, NULL);
234 if (IS_ERR(wdt->clk)) {
235 dev_warn(&adev->dev, "Clock not found\n");
236 ret = PTR_ERR(wdt->clk);
241 wdt->wdd.info = &wdt_info;
242 wdt->wdd.ops = &wdt_ops;
244 spin_lock_init(&wdt->lock);
245 watchdog_set_nowayout(&wdt->wdd, nowayout);
246 watchdog_set_drvdata(&wdt->wdd, wdt);
247 wdt_setload(&wdt->wdd, DEFAULT_TIMEOUT);
249 ret = watchdog_register_device(&wdt->wdd);
251 dev_err(&adev->dev, "watchdog_register_device() failed: %d\n",
255 amba_set_drvdata(adev, wdt);
257 dev_info(&adev->dev, "registration successful\n");
263 dev_err(&adev->dev, "Probe Failed!!!\n");
267 static int __devexit sp805_wdt_remove(struct amba_device *adev)
269 struct sp805_wdt *wdt = amba_get_drvdata(adev);
271 watchdog_unregister_device(&wdt->wdd);
272 amba_set_drvdata(adev, NULL);
273 watchdog_set_drvdata(&wdt->wdd, NULL);
280 static int sp805_wdt_suspend(struct device *dev)
282 struct sp805_wdt *wdt = dev_get_drvdata(dev);
284 if (watchdog_active(&wdt->wdd))
285 return wdt_disable(&wdt->wdd);
290 static int sp805_wdt_resume(struct device *dev)
292 struct sp805_wdt *wdt = dev_get_drvdata(dev);
294 if (watchdog_active(&wdt->wdd))
295 return wdt_enable(&wdt->wdd);
299 #endif /* CONFIG_PM */
301 static SIMPLE_DEV_PM_OPS(sp805_wdt_dev_pm_ops, sp805_wdt_suspend,
304 static struct amba_id sp805_wdt_ids[] = {
312 MODULE_DEVICE_TABLE(amba, sp805_wdt_ids);
314 static struct amba_driver sp805_wdt_driver = {
317 .pm = &sp805_wdt_dev_pm_ops,
319 .id_table = sp805_wdt_ids,
320 .probe = sp805_wdt_probe,
321 .remove = __devexit_p(sp805_wdt_remove),
324 module_amba_driver(sp805_wdt_driver);
326 MODULE_AUTHOR("Viresh Kumar <viresh.kumar@st.com>");
327 MODULE_DESCRIPTION("ARM SP805 Watchdog Driver");
328 MODULE_LICENSE("GPL");