2 * Watchdog driver for CSR SiRFprimaII and SiRFatlasVI
4 * Copyright (c) 2013 Cambridge Silicon Radio Limited, a CSR plc group company.
6 * Licensed under GPLv2 or later.
9 #include <linux/module.h>
10 #include <linux/watchdog.h>
11 #include <linux/platform_device.h>
12 #include <linux/moduleparam.h>
15 #include <linux/uaccess.h>
17 #define SIRFSOC_TIMER_COUNTER_LO 0x0000
18 #define SIRFSOC_TIMER_MATCH_0 0x0008
19 #define SIRFSOC_TIMER_INT_EN 0x0024
20 #define SIRFSOC_TIMER_WATCHDOG_EN 0x0028
21 #define SIRFSOC_TIMER_LATCH 0x0030
22 #define SIRFSOC_TIMER_LATCHED_LO 0x0034
24 #define SIRFSOC_TIMER_WDT_INDEX 5
26 #define SIRFSOC_WDT_MIN_TIMEOUT 30 /* 30 secs */
27 #define SIRFSOC_WDT_MAX_TIMEOUT (10 * 60) /* 10 mins */
28 #define SIRFSOC_WDT_DEFAULT_TIMEOUT 30 /* 30 secs */
30 static unsigned int timeout = SIRFSOC_WDT_DEFAULT_TIMEOUT;
31 static bool nowayout = WATCHDOG_NOWAYOUT;
33 module_param(timeout, uint, 0);
34 module_param(nowayout, bool, 0);
36 MODULE_PARM_DESC(timeout, "Default watchdog timeout (in seconds)");
37 MODULE_PARM_DESC(nowayout, "Watchdog cannot be stopped once started (default="
38 __MODULE_STRING(WATCHDOG_NOWAYOUT) ")");
40 static unsigned int sirfsoc_wdt_gettimeleft(struct watchdog_device *wdd)
43 void __iomem *wdt_base;
46 wdt_base = watchdog_get_drvdata(wdd);
47 counter = readl(wdt_base + SIRFSOC_TIMER_COUNTER_LO);
48 match = readl(wdt_base +
49 SIRFSOC_TIMER_MATCH_0 + (SIRFSOC_TIMER_WDT_INDEX << 2));
51 time_left = match - counter;
53 return time_left / CLOCK_TICK_RATE;
56 static int sirfsoc_wdt_updatetimeout(struct watchdog_device *wdd)
58 u32 counter, timeout_ticks;
59 void __iomem *wdt_base;
61 timeout_ticks = wdd->timeout * CLOCK_TICK_RATE;
62 wdt_base = watchdog_get_drvdata(wdd);
64 /* Enable the latch before reading the LATCH_LO register */
65 writel(1, wdt_base + SIRFSOC_TIMER_LATCH);
67 /* Set the TO value */
68 counter = readl(wdt_base + SIRFSOC_TIMER_LATCHED_LO);
70 counter += timeout_ticks;
72 writel(counter, wdt_base +
73 SIRFSOC_TIMER_MATCH_0 + (SIRFSOC_TIMER_WDT_INDEX << 2));
78 static int sirfsoc_wdt_enable(struct watchdog_device *wdd)
80 void __iomem *wdt_base = watchdog_get_drvdata(wdd);
81 sirfsoc_wdt_updatetimeout(wdd);
84 * NOTE: If interrupt is not enabled
85 * then WD-Reset doesn't get generated at all.
87 writel(readl(wdt_base + SIRFSOC_TIMER_INT_EN)
88 | (1 << SIRFSOC_TIMER_WDT_INDEX),
89 wdt_base + SIRFSOC_TIMER_INT_EN);
90 writel(1, wdt_base + SIRFSOC_TIMER_WATCHDOG_EN);
95 static int sirfsoc_wdt_disable(struct watchdog_device *wdd)
97 void __iomem *wdt_base = watchdog_get_drvdata(wdd);
99 writel(0, wdt_base + SIRFSOC_TIMER_WATCHDOG_EN);
100 writel(readl(wdt_base + SIRFSOC_TIMER_INT_EN)
101 & (~(1 << SIRFSOC_TIMER_WDT_INDEX)),
102 wdt_base + SIRFSOC_TIMER_INT_EN);
107 static int sirfsoc_wdt_settimeout(struct watchdog_device *wdd, unsigned int to)
110 sirfsoc_wdt_updatetimeout(wdd);
115 #define OPTIONS (WDIOF_SETTIMEOUT | WDIOF_KEEPALIVEPING | WDIOF_MAGICCLOSE)
117 static const struct watchdog_info sirfsoc_wdt_ident = {
119 .firmware_version = 0,
120 .identity = "SiRFSOC Watchdog",
123 static struct watchdog_ops sirfsoc_wdt_ops = {
124 .owner = THIS_MODULE,
125 .start = sirfsoc_wdt_enable,
126 .stop = sirfsoc_wdt_disable,
127 .get_timeleft = sirfsoc_wdt_gettimeleft,
128 .ping = sirfsoc_wdt_updatetimeout,
129 .set_timeout = sirfsoc_wdt_settimeout,
132 static struct watchdog_device sirfsoc_wdd = {
133 .info = &sirfsoc_wdt_ident,
134 .ops = &sirfsoc_wdt_ops,
135 .timeout = SIRFSOC_WDT_DEFAULT_TIMEOUT,
136 .min_timeout = SIRFSOC_WDT_MIN_TIMEOUT,
137 .max_timeout = SIRFSOC_WDT_MAX_TIMEOUT,
140 static int sirfsoc_wdt_probe(struct platform_device *pdev)
142 struct resource *res;
146 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
147 base = devm_ioremap_resource(&pdev->dev, res);
149 return PTR_ERR(base);
151 watchdog_set_drvdata(&sirfsoc_wdd, base);
153 watchdog_init_timeout(&sirfsoc_wdd, timeout, &pdev->dev);
154 watchdog_set_nowayout(&sirfsoc_wdd, nowayout);
156 ret = watchdog_register_device(&sirfsoc_wdd);
160 platform_set_drvdata(pdev, &sirfsoc_wdd);
165 static void sirfsoc_wdt_shutdown(struct platform_device *pdev)
167 struct watchdog_device *wdd = platform_get_drvdata(pdev);
169 sirfsoc_wdt_disable(wdd);
172 static int sirfsoc_wdt_remove(struct platform_device *pdev)
174 sirfsoc_wdt_shutdown(pdev);
178 #ifdef CONFIG_PM_SLEEP
179 static int sirfsoc_wdt_suspend(struct device *dev)
184 static int sirfsoc_wdt_resume(struct device *dev)
186 struct watchdog_device *wdd = dev_get_drvdata(dev);
189 * NOTE: Since timer controller registers settings are saved
190 * and restored back by the timer-prima2.c, so we need not
191 * update WD settings except refreshing timeout.
193 sirfsoc_wdt_updatetimeout(wdd);
199 static SIMPLE_DEV_PM_OPS(sirfsoc_wdt_pm_ops,
200 sirfsoc_wdt_suspend, sirfsoc_wdt_resume);
202 static const struct of_device_id sirfsoc_wdt_of_match[] = {
203 { .compatible = "sirf,prima2-tick"},
206 MODULE_DEVICE_TABLE(of, sirfsoc_wdt_of_match);
208 static struct platform_driver sirfsoc_wdt_driver = {
210 .name = "sirfsoc-wdt",
211 .owner = THIS_MODULE,
212 .pm = &sirfsoc_wdt_pm_ops,
213 .of_match_table = of_match_ptr(sirfsoc_wdt_of_match),
215 .probe = sirfsoc_wdt_probe,
216 .remove = sirfsoc_wdt_remove,
217 .shutdown = sirfsoc_wdt_shutdown,
219 module_platform_driver(sirfsoc_wdt_driver);
221 MODULE_DESCRIPTION("SiRF SoC watchdog driver");
222 MODULE_AUTHOR("Xianglong Du <Xianglong.Du@csr.com>");
223 MODULE_LICENSE("GPL v2");
224 MODULE_ALIAS("platform:sirfsoc-wdt");