Pileus Git - ~andy/linux/blob - drivers/watchdog/omap_wdt.c

   1 /*
   2  * omap_wdt.c
   3  *
   4  * Watchdog driver for the TI OMAP 16xx & 24xx/34xx 32KHz (non-secure) watchdog
   5  *
   6  * Author: MontaVista Software, Inc.
   7  *       <gdavis@mvista.com> or <source@mvista.com>
   8  *
   9  * 2003 (c) MontaVista Software, Inc. This file is licensed under the
  10  * terms of the GNU General Public License version 2. This program is
  11  * licensed "as is" without any warranty of any kind, whether express
  12  * or implied.
  13  *
  14  * History:
  15  *
  16  * 20030527: George G. Davis <gdavis@mvista.com>
  17  *      Initially based on linux-2.4.19-rmk7-pxa1/drivers/char/sa1100_wdt.c
  18  *      (c) Copyright 2000 Oleg Drokin <green@crimea.edu>
  19  *      Based on SoftDog driver by Alan Cox <alan@lxorguk.ukuu.org.uk>
  20  *
  21  * Copyright (c) 2004 Texas Instruments.
  22  *      1. Modified to support OMAP1610 32-KHz watchdog timer
  23  *      2. Ported to 2.6 kernel
  24  *
  25  * Copyright (c) 2005 David Brownell
  26  *      Use the driver model and standard identifiers; handle bigger timeouts.
  27  */
  28
  29 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
  30
  31 #include <linux/module.h>
  32 #include <linux/types.h>
  33 #include <linux/kernel.h>
  34 #include <linux/mm.h>
  35 #include <linux/watchdog.h>
  36 #include <linux/reboot.h>
  37 #include <linux/init.h>
  38 #include <linux/err.h>
  39 #include <linux/platform_device.h>
  40 #include <linux/moduleparam.h>
  41 #include <linux/io.h>
  42 #include <linux/slab.h>
  43 #include <linux/pm_runtime.h>
  44 #include <linux/platform_data/omap-wd-timer.h>
  45
  46 #include "omap_wdt.h"
  47
  48 static bool nowayout = WATCHDOG_NOWAYOUT;
  49 module_param(nowayout, bool, 0);
  50 MODULE_PARM_DESC(nowayout, "Watchdog cannot be stopped once started "
  51         "(default=" __MODULE_STRING(WATCHDOG_NOWAYOUT) ")");
  52
  53 static unsigned timer_margin;
  54 module_param(timer_margin, uint, 0);
  55 MODULE_PARM_DESC(timer_margin, "initial watchdog timeout (in seconds)");
  56
  57 struct omap_wdt_dev {
  58         void __iomem    *base;          /* physical */
  59         struct device   *dev;
  60         bool            omap_wdt_users;
  61         struct resource *mem;
  62         int             wdt_trgr_pattern;
  63         struct mutex    lock;           /* to avoid races with PM */
  64 };
  65
  66 static void omap_wdt_reload(struct omap_wdt_dev *wdev)
  67 {
  68         void __iomem    *base = wdev->base;
  69
  70         /* wait for posted write to complete */
  71         while ((readl_relaxed(base + OMAP_WATCHDOG_WPS)) & 0x08)
  72                 cpu_relax();
  73
  74         wdev->wdt_trgr_pattern = ~wdev->wdt_trgr_pattern;
  75         writel_relaxed(wdev->wdt_trgr_pattern, (base + OMAP_WATCHDOG_TGR));
  76
  77         /* wait for posted write to complete */
  78         while ((readl_relaxed(base + OMAP_WATCHDOG_WPS)) & 0x08)
  79                 cpu_relax();
  80         /* reloaded WCRR from WLDR */
  81 }
  82
  83 static void omap_wdt_enable(struct omap_wdt_dev *wdev)
  84 {
  85         void __iomem *base = wdev->base;
  86
  87         /* Sequence to enable the watchdog */
  88         writel_relaxed(0xBBBB, base + OMAP_WATCHDOG_SPR);
  89         while ((readl_relaxed(base + OMAP_WATCHDOG_WPS)) & 0x10)
  90                 cpu_relax();
  91
  92         writel_relaxed(0x4444, base + OMAP_WATCHDOG_SPR);
  93         while ((readl_relaxed(base + OMAP_WATCHDOG_WPS)) & 0x10)
  94                 cpu_relax();
  95 }
  96
  97 static void omap_wdt_disable(struct omap_wdt_dev *wdev)
  98 {
  99         void __iomem *base = wdev->base;
 100
 101         /* sequence required to disable watchdog */
 102         writel_relaxed(0xAAAA, base + OMAP_WATCHDOG_SPR);       /* TIMER_MODE */
 103         while (readl_relaxed(base + OMAP_WATCHDOG_WPS) & 0x10)
 104                 cpu_relax();
 105
 106         writel_relaxed(0x5555, base + OMAP_WATCHDOG_SPR);       /* TIMER_MODE */
 107         while (readl_relaxed(base + OMAP_WATCHDOG_WPS) & 0x10)
 108                 cpu_relax();
 109 }
 110
 111 static void omap_wdt_set_timer(struct omap_wdt_dev *wdev,
 112                                    unsigned int timeout)
 113 {
 114         u32 pre_margin = GET_WLDR_VAL(timeout);
 115         void __iomem *base = wdev->base;
 116
 117         /* just count up at 32 KHz */
 118         while (readl_relaxed(base + OMAP_WATCHDOG_WPS) & 0x04)
 119                 cpu_relax();
 120
 121         writel_relaxed(pre_margin, base + OMAP_WATCHDOG_LDR);
 122         while (readl_relaxed(base + OMAP_WATCHDOG_WPS) & 0x04)
 123                 cpu_relax();
 124 }
 125
 126 static int omap_wdt_start(struct watchdog_device *wdog)
 127 {
 128         struct omap_wdt_dev *wdev = watchdog_get_drvdata(wdog);
 129         void __iomem *base = wdev->base;
 130
 131         mutex_lock(&wdev->lock);
 132
 133         wdev->omap_wdt_users = true;
 134
 135         pm_runtime_get_sync(wdev->dev);
 136
 137         /* initialize prescaler */
 138         while (readl_relaxed(base + OMAP_WATCHDOG_WPS) & 0x01)
 139                 cpu_relax();
 140
 141         writel_relaxed((1 << 5) | (PTV << 2), base + OMAP_WATCHDOG_CNTRL);
 142         while (readl_relaxed(base + OMAP_WATCHDOG_WPS) & 0x01)
 143                 cpu_relax();
 144
 145         omap_wdt_set_timer(wdev, wdog->timeout);
 146         omap_wdt_reload(wdev); /* trigger loading of new timeout value */
 147         omap_wdt_enable(wdev);
 148
 149         mutex_unlock(&wdev->lock);
 150
 151         return 0;
 152 }
 153
 154 static int omap_wdt_stop(struct watchdog_device *wdog)
 155 {
 156         struct omap_wdt_dev *wdev = watchdog_get_drvdata(wdog);
 157
 158         mutex_lock(&wdev->lock);
 159         omap_wdt_disable(wdev);
 160         pm_runtime_put_sync(wdev->dev);
 161         wdev->omap_wdt_users = false;
 162         mutex_unlock(&wdev->lock);
 163         return 0;
 164 }
 165
 166 static int omap_wdt_ping(struct watchdog_device *wdog)
 167 {
 168         struct omap_wdt_dev *wdev = watchdog_get_drvdata(wdog);
 169
 170         mutex_lock(&wdev->lock);
 171         omap_wdt_reload(wdev);
 172         mutex_unlock(&wdev->lock);
 173
 174         return 0;
 175 }
 176
 177 static int omap_wdt_set_timeout(struct watchdog_device *wdog,
 178                                 unsigned int timeout)
 179 {
 180         struct omap_wdt_dev *wdev = watchdog_get_drvdata(wdog);
 181
 182         mutex_lock(&wdev->lock);
 183         omap_wdt_disable(wdev);
 184         omap_wdt_set_timer(wdev, timeout);
 185         omap_wdt_enable(wdev);
 186         omap_wdt_reload(wdev);
 187         wdog->timeout = timeout;
 188         mutex_unlock(&wdev->lock);
 189
 190         return 0;
 191 }
 192
 193 static const struct watchdog_info omap_wdt_info = {
 194         .options = WDIOF_SETTIMEOUT | WDIOF_KEEPALIVEPING,
 195         .identity = "OMAP Watchdog",
 196 };
 197
 198 static const struct watchdog_ops omap_wdt_ops = {
 199         .owner          = THIS_MODULE,
 200         .start          = omap_wdt_start,
 201         .stop           = omap_wdt_stop,
 202         .ping           = omap_wdt_ping,
 203         .set_timeout    = omap_wdt_set_timeout,
 204 };
 205
 206 static int omap_wdt_probe(struct platform_device *pdev)
 207 {
 208         struct omap_wd_timer_platform_data *pdata = dev_get_platdata(&pdev->dev);
 209         struct watchdog_device *omap_wdt;
 210         struct resource *res, *mem;
 211         struct omap_wdt_dev *wdev;
 212         u32 rs;
 213         int ret;
 214
 215         omap_wdt = devm_kzalloc(&pdev->dev, sizeof(*omap_wdt), GFP_KERNEL);
 216         if (!omap_wdt)
 217                 return -ENOMEM;
 218
 219         /* reserve static register mappings */
 220         res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
 221         if (!res)
 222                 return -ENOENT;
 223
 224         mem = devm_request_mem_region(&pdev->dev, res->start,
 225                                       resource_size(res), pdev->name);
 226         if (!mem)
 227                 return -EBUSY;
 228
 229         wdev = devm_kzalloc(&pdev->dev, sizeof(*wdev), GFP_KERNEL);
 230         if (!wdev)
 231                 return -ENOMEM;
 232
 233         wdev->omap_wdt_users    = false;
 234         wdev->mem               = mem;
 235         wdev->dev               = &pdev->dev;
 236         wdev->wdt_trgr_pattern  = 0x1234;
 237         mutex_init(&wdev->lock);
 238
 239         wdev->base = devm_ioremap(&pdev->dev, res->start, resource_size(res));
 240         if (!wdev->base)
 241                 return -ENOMEM;
 242
 243         omap_wdt->info        = &omap_wdt_info;
 244         omap_wdt->ops         = &omap_wdt_ops;
 245         omap_wdt->min_timeout = TIMER_MARGIN_MIN;
 246         omap_wdt->max_timeout = TIMER_MARGIN_MAX;
 247
 248         if (timer_margin >= TIMER_MARGIN_MIN &&
 249             timer_margin <= TIMER_MARGIN_MAX)
 250                 omap_wdt->timeout = timer_margin;
 251         else
 252                 omap_wdt->timeout = TIMER_MARGIN_DEFAULT;
 253
 254         watchdog_set_drvdata(omap_wdt, wdev);
 255         watchdog_set_nowayout(omap_wdt, nowayout);
 256
 257         platform_set_drvdata(pdev, omap_wdt);
 258
 259         pm_runtime_enable(wdev->dev);
 260         pm_runtime_get_sync(wdev->dev);
 261
 262         if (pdata && pdata->read_reset_sources)
 263                 rs = pdata->read_reset_sources();
 264         else
 265                 rs = 0;
 266         omap_wdt->bootstatus = (rs & (1 << OMAP_MPU_WD_RST_SRC_ID_SHIFT)) ?
 267                                 WDIOF_CARDRESET : 0;
 268
 269         omap_wdt_disable(wdev);
 270
 271         ret = watchdog_register_device(omap_wdt);
 272         if (ret) {
 273                 pm_runtime_disable(wdev->dev);
 274                 return ret;
 275         }
 276
 277         pr_info("OMAP Watchdog Timer Rev 0x%02x: initial timeout %d sec\n",
 278                 readl_relaxed(wdev->base + OMAP_WATCHDOG_REV) & 0xFF,
 279                 omap_wdt->timeout);
 280
 281         pm_runtime_put_sync(wdev->dev);
 282
 283         return 0;
 284 }
 285
 286 static void omap_wdt_shutdown(struct platform_device *pdev)
 287 {
 288         struct watchdog_device *wdog = platform_get_drvdata(pdev);
 289         struct omap_wdt_dev *wdev = watchdog_get_drvdata(wdog);
 290
 291         mutex_lock(&wdev->lock);
 292         if (wdev->omap_wdt_users) {
 293                 omap_wdt_disable(wdev);
 294                 pm_runtime_put_sync(wdev->dev);
 295         }
 296         mutex_unlock(&wdev->lock);
 297 }
 298
 299 static int omap_wdt_remove(struct platform_device *pdev)
 300 {
 301         struct watchdog_device *wdog = platform_get_drvdata(pdev);
 302         struct omap_wdt_dev *wdev = watchdog_get_drvdata(wdog);
 303
 304         pm_runtime_disable(wdev->dev);
 305         watchdog_unregister_device(wdog);
 306
 307         return 0;
 308 }
 309
 310 #ifdef  CONFIG_PM
 311
 312 /* REVISIT ... not clear this is the best way to handle system suspend; and
 313  * it's very inappropriate for selective device suspend (e.g. suspending this
 314  * through sysfs rather than by stopping the watchdog daemon).  Also, this
 315  * may not play well enough with NOWAYOUT...
 316  */
 317
 318 static int omap_wdt_suspend(struct platform_device *pdev, pm_message_t state)
 319 {
 320         struct watchdog_device *wdog = platform_get_drvdata(pdev);
 321         struct omap_wdt_dev *wdev = watchdog_get_drvdata(wdog);
 322
 323         mutex_lock(&wdev->lock);
 324         if (wdev->omap_wdt_users) {
 325                 omap_wdt_disable(wdev);
 326                 pm_runtime_put_sync(wdev->dev);
 327         }
 328         mutex_unlock(&wdev->lock);
 329
 330         return 0;
 331 }
 332
 333 static int omap_wdt_resume(struct platform_device *pdev)
 334 {
 335         struct watchdog_device *wdog = platform_get_drvdata(pdev);
 336         struct omap_wdt_dev *wdev = watchdog_get_drvdata(wdog);
 337
 338         mutex_lock(&wdev->lock);
 339         if (wdev->omap_wdt_users) {
 340                 pm_runtime_get_sync(wdev->dev);
 341                 omap_wdt_enable(wdev);
 342                 omap_wdt_reload(wdev);
 343         }
 344         mutex_unlock(&wdev->lock);
 345
 346         return 0;
 347 }
 348
 349 #else
 350 #define omap_wdt_suspend        NULL
 351 #define omap_wdt_resume         NULL
 352 #endif
 353
 354 static const struct of_device_id omap_wdt_of_match[] = {
 355         { .compatible = "ti,omap3-wdt", },
 356         {},
 357 };
 358 MODULE_DEVICE_TABLE(of, omap_wdt_of_match);
 359
 360 static struct platform_driver omap_wdt_driver = {
 361         .probe          = omap_wdt_probe,
 362         .remove         = omap_wdt_remove,
 363         .shutdown       = omap_wdt_shutdown,
 364         .suspend        = omap_wdt_suspend,
 365         .resume         = omap_wdt_resume,
 366         .driver         = {
 367                 .owner  = THIS_MODULE,
 368                 .name   = "omap_wdt",
 369                 .of_match_table = omap_wdt_of_match,
 370         },
 371 };
 372
 373 module_platform_driver(omap_wdt_driver);
 374
 375 MODULE_AUTHOR("George G. Davis");
 376 MODULE_LICENSE("GPL");
 377 MODULE_ALIAS("platform:omap_wdt");